This source file includes following definitions.
- block_sv_cooking
- capt_seq_task
- sub_FF085EC8_my
- sub_FF1F5DB8_my
- exp_drv_task
- sub_FF0C8F84_my
- sub_FF0B657C_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9 #define NR_AUTO (0)
10 #define PAUSE_FOR_FILE_COUNTER 300
11
12 #include "../../../generic/capt_seq.c"
13
14 void __attribute__((naked,noinline)) block_sv_cooking()
15 {
16
17
18 asm volatile (
19 " MOV R2, #2 \n"
20 " ADD R1, PC, #4 \n"
21 " MOV R0, #77 \n"
22 " B _SetPropertyCase \n"
23 " .word 1 \n"
24 );
25 }
26
27
28
29 void __attribute__((naked,noinline)) capt_seq_task() {
30 asm volatile (
31 " STMFD SP!, {R3-R7,LR} \n"
32 " LDR R4, =0x43FA0 \n"
33 " LDR R7, =0x3A9C \n"
34 " MOV R6, #0 \n"
35
36 "loc_FF085A9C:\n"
37 " LDR R0, [R7, #4] \n"
38 " MOV R2, #0 \n"
39 " MOV R1, SP \n"
40 " BL sub_0068BDE0 /*_ReceiveMessageQueue*/ \n"
41 " TST R0, #1 \n"
42 " BEQ loc_FF085AC8 \n"
43 " LDR R1, =0x491 \n"
44 " LDR R0, =0xFF0853D8 /*'SsShootTask.c'*/ \n"
45 " BL _DebugAssert \n"
46 " BL _ExitTask \n"
47 " LDMFD SP!, {R3-R7,PC} \n"
48
49 "loc_FF085AC8:\n"
50 " LDR R0, [SP] \n"
51 " LDR R1, [R0] \n"
52 " CMP R1, #0x28 \n"
53 " ADDCC PC, PC, R1, LSL#2 \n"
54 " B loc_FF085D74 \n"
55 " B loc_FF085B7C \n"
56 " B loc_FF085B94 \n"
57 " B loc_FF085BA0 \n"
58 " B loc_FF085BC0 \n"
59 " B loc_FF085BB8 \n"
60 " B loc_FF085BCC \n"
61 " B loc_FF085BD4 \n"
62 " B loc_FF085BDC \n"
63 " B loc_FF085BF8 \n"
64 " B loc_FF085C4C \n"
65 " B loc_FF085C04 \n"
66 " B loc_FF085C10 \n"
67 " B loc_FF085C18 \n"
68 " B loc_FF085C34 \n"
69 " B loc_FF085C3C \n"
70 " B loc_FF085C44 \n"
71 " B loc_FF085C54 \n"
72 " B loc_FF085C5C \n"
73 " B loc_FF085C64 \n"
74 " B loc_FF085C6C \n"
75 " B loc_FF085C74 \n"
76 " B loc_FF085C7C \n"
77 " B loc_FF085C84 \n"
78 " B loc_FF085C8C \n"
79 " B loc_FF085C94 \n"
80 " B loc_FF085C9C \n"
81 " B loc_FF085CA8 \n"
82 " B loc_FF085CB0 \n"
83 " B loc_FF085CBC \n"
84 " B loc_FF085CC4 \n"
85 " B loc_FF085CF4 \n"
86 " B loc_FF085CFC \n"
87 " B loc_FF085D04 \n"
88 " B loc_FF085D0C \n"
89 " B loc_FF085D14 \n"
90 " B loc_FF085D1C \n"
91 " B loc_FF085D28 \n"
92 " B loc_FF085D30 \n"
93 " B loc_FF085D3C \n"
94 " B loc_FF085D80 \n"
95
96 "loc_FF085B7C:\n"
97 " BL shooting_expo_iso_override\n"
98 " BL block_sv_cooking\n"
99 " BL sub_FF086364 \n"
100 " BL shooting_expo_param_override\n"
101 " BL block_sv_cooking\n"
102 " BL sub_FF082A44 \n"
103 " MOV R0, #0\n"
104 " STR R0, [R4,#0x28]\n"
105
106
107
108 " B loc_FF085D80 \n"
109
110 "loc_FF085B94:\n"
111 " LDR R0, [R0, #0x10] \n"
112 " BL sub_FF085EC8_my \n"
113 " B loc_FF085D80 \n"
114
115 "loc_FF085BA0:\n"
116 " MOV R0, #1 \n"
117 " BL sub_FF0866F8 \n"
118 " LDR R0, [R4, #0xC] \n"
119 " CMP R0, #0 \n"
120 " BLNE sub_FF087594 \n"
121 " B loc_FF085D80 \n"
122
123 "loc_FF085BB8:\n"
124 " BL sub_FF08601C \n"
125 " B loc_FF085BC4 \n"
126
127 "loc_FF085BC0:\n"
128 " BL sub_FF086344 \n"
129
130 "loc_FF085BC4:\n"
131 " STR R6, [R4, #0x28] \n"
132 " B loc_FF085D80 \n"
133
134 "loc_FF085BCC:\n"
135 " BL sub_FF08634C \n"
136 " B loc_FF085D80 \n"
137
138 "loc_FF085BD4:\n"
139 " BL sub_FF0865A4 \n"
140 " B loc_FF085BFC \n"
141
142 "loc_FF085BDC:\n"
143 " LDR R5, [R0, #0x10] \n"
144 " MOV R0, R5 \n"
145 " BL sub_FF1F60FC \n"
146 " MOV R2, R5 \n"
147 " MOV R1, #9 \n"
148 " BL sub_FF0834FC \n"
149 " B loc_FF085D80 \n"
150
151 "loc_FF085BF8:\n"
152 " BL sub_FF086660 \n"
153
154 "loc_FF085BFC:\n"
155 " BL sub_FF082A44 \n"
156 " B loc_FF085D80 \n"
157
158 "loc_FF085C04:\n"
159 " LDR R0, [R4, #0x58] \n"
160 " BL sub_FF086F60 \n"
161 " B loc_FF085D80 \n"
162
163 "loc_FF085C10:\n"
164 " BL sub_FF0872F0 \n"
165 " B loc_FF085D80 \n"
166
167 "loc_FF085C18:\n"
168 " LDRH R0, [R4] \n"
169 " SUB R1, R0, #0x8200 \n"
170 " SUBS R1, R1, #0x39 \n"
171 " MOVNE R0, #0 \n"
172 " MOVEQ R0, #1 \n"
173 " BL sub_FF087354 \n"
174 " B loc_FF085D80 \n"
175
176 "loc_FF085C34:\n"
177 " BL sub_FF087684 \n"
178 " B loc_FF085D80 \n"
179
180 "loc_FF085C3C:\n"
181 " BL sub_FF087AF8 \n"
182 " B loc_FF085D80 \n"
183
184 "loc_FF085C44:\n"
185 " BL sub_FF087BAC \n"
186 " B loc_FF085D80 \n"
187
188 "loc_FF085C4C:\n"
189 " BL sub_FF086344 \n"
190 " B loc_FF085D80 \n"
191
192 "loc_FF085C54:\n"
193 " BL sub_FF1F3A18 \n"
194 " B loc_FF085D80 \n"
195
196 "loc_FF085C5C:\n"
197 " BL sub_FF1F3CAC \n"
198 " B loc_FF085D80 \n"
199
200 "loc_FF085C64:\n"
201 " BL sub_FF1F3D7C \n"
202 " B loc_FF085D80 \n"
203
204 "loc_FF085C6C:\n"
205 " BL sub_FF1F3E30 \n"
206 " B loc_FF085D80 \n"
207
208 "loc_FF085C74:\n"
209 " BL sub_FF1F3F08 \n"
210 " B loc_FF085D80 \n"
211
212 "loc_FF085C7C:\n"
213 " MOV R0, #0 \n"
214 " B loc_FF085CA0 \n"
215
216 "loc_FF085C84:\n"
217 " BL sub_FF1F4500 \n"
218 " B loc_FF085D80 \n"
219
220 "loc_FF085C8C:\n"
221 " BL sub_FF1F4594 \n"
222 " B loc_FF085D80 \n"
223
224 "loc_FF085C94:\n"
225 " BL sub_FF1F463C \n"
226 " B loc_FF085D80 \n"
227
228 "loc_FF085C9C:\n"
229 " MOV R0, #1 \n"
230
231 "loc_FF085CA0:\n"
232 " BL sub_FF1F439C \n"
233 " B loc_FF085D80 \n"
234
235 "loc_FF085CA8:\n"
236 " BL sub_FF086940 \n"
237 " B loc_FF085D80 \n"
238
239 "loc_FF085CB0:\n"
240 " BL sub_FF0869D4 \n"
241 " BL sub_FF1F74B0 \n"
242 " B loc_FF085D80 \n"
243
244 "loc_FF085CBC:\n"
245 " BL sub_FF1F41DC \n"
246 " B loc_FF085D80 \n"
247
248 "loc_FF085CC4:\n"
249 " MOV R2, #2 \n"
250 " ADD R1, R4, #0x6A \n"
251 " MOV R0, #0x6F \n"
252 " BL _GetPropertyCase \n"
253 " TST R0, #1 \n"
254 " LDRNE R1, =0x592 \n"
255 " LDRNE R0, =0xFF0853D8 /*'SsShootTask.c'*/ \n"
256 " BLNE _DebugAssert \n"
257 " LDRH R0, [R4, #0x6A] \n"
258 " CMP R0, #1 \n"
259 " BLEQ sub_FF1F41D0 \n"
260 " B loc_FF085D80 \n"
261
262 "loc_FF085CF4:\n"
263 " BL sub_FF1F42F8 \n"
264 " B loc_FF085D80 \n"
265
266 "loc_FF085CFC:\n"
267 " BL sub_FF1F7584 \n"
268 " B loc_FF085D80 \n"
269
270 "loc_FF085D04:\n"
271 " BL sub_FF01D9A8 \n"
272 " B loc_FF085D80 \n"
273
274 "loc_FF085D0C:\n"
275 " BL sub_FF08CA00 \n"
276 " B loc_FF085D80 \n"
277
278 "loc_FF085D14:\n"
279 " BL sub_FF08CB00 \n"
280 " B loc_FF085D80 \n"
281
282 "loc_FF085D1C:\n"
283 " LDR R0, [R0, #0xC] \n"
284 " BL sub_FF1F4744 \n"
285 " B loc_FF085D80 \n"
286
287 "loc_FF085D28:\n"
288 " BL sub_FF1F47B4 \n"
289 " B loc_FF085D80 \n"
290
291 "loc_FF085D30:\n"
292 " BL sub_FF08CC8C \n"
293 " BL sub_FF08CB58 \n"
294 " B loc_FF085D80 \n"
295
296 "loc_FF085D3C:\n"
297 " MOV R0, #1 \n"
298 " BL sub_FF1F692C \n"
299 " MOV R0, #1 \n"
300 " BL sub_FF1F6A60 \n"
301 " LDRH R0, [R4, #0xAC] \n"
302 " CMP R0, #4 \n"
303 " LDRNEH R0, [R4] \n"
304 " SUBNE R1, R0, #0x4200 \n"
305 " SUBNES R1, R1, #0x2E \n"
306 " BNE loc_FF085D80 \n"
307 " BL sub_FF08CB00 \n"
308 " BL sub_FF08D3A4 \n"
309 " BL sub_FF08D0AC \n"
310 " B loc_FF085D80 \n"
311
312 "loc_FF085D74:\n"
313 " LDR R1, =0x5F2 \n"
314 " LDR R0, =0xFF0853D8 /*'SsShootTask.c'*/ \n"
315 " BL _DebugAssert \n"
316
317 "loc_FF085D80:\n"
318 " LDR R0, [SP] \n"
319 " LDR R1, [R0, #4] \n"
320 " LDR R0, [R7] \n"
321 " BL sub_0068BB50 /*_SetEventFlag*/ \n"
322 " LDR R5, [SP] \n"
323 " LDR R0, [R5, #8] \n"
324 " CMP R0, #0 \n"
325 " LDREQ R1, =0x117 \n"
326 " LDREQ R0, =0xFF0853D8 /*'SsShootTask.c'*/ \n"
327 " BLEQ _DebugAssert \n"
328 " STR R6, [R5, #8] \n"
329 " B loc_FF085A9C \n"
330 );
331 }
332
333
334
335 void __attribute__((naked,noinline)) sub_FF085EC8_my() {
336 asm volatile (
337 " STMFD SP!, {R4-R6,LR} \n"
338 " LDR R5, =0x43FA0 \n"
339 " MOV R6, R0 \n"
340 " LDR R0, [R5, #0x28] \n"
341 " CMP R0, #0 \n"
342 " BNE loc_FF085F18 \n"
343 " LDR R0, [R5, #0x9C] \n"
344 " TST R0, #0x30 \n"
345 " BLNE sub_FF08A648 \n"
346 " BL sub_FF08A104 \n"
347 " MOV R1, R6 \n"
348 " BL sub_FF08A15C \n"
349 " LDR R0, =0x10F \n"
350 " MOV R2, #4 \n"
351 " ADD R1, R6, #0x78 \n"
352 " BL _SetPropertyCase \n"
353 " MOV R2, #4 \n"
354 " ADD R1, R6, #0x7C \n"
355 " MOV R0, #0x2C \n"
356 " BL _SetPropertyCase \n"
357
358 "loc_FF085F18:\n"
359 " LDR R0, [R5, #0x9C] \n"
360 " TST R0, #0x20 \n"
361 " MOV R0, R6 \n"
362 " BEQ loc_FF085F30 \n"
363 " BL sub_FF1F6EF8 \n"
364 " B loc_FF085F34 \n"
365
366 "loc_FF085F30:\n"
367 " BL sub_FF1F5DB8_my \n"
368 " BL capt_seq_hook_raw_here \n"
369
370 "loc_FF085F34:\n"
371 " MOV R4, R0 \n"
372 " MOV R2, R6 \n"
373 " MOV R1, #1 \n"
374 " BL sub_FF0834FC \n"
375 " TST R4, #1 \n"
376 " LDMNEFD SP!, {R4-R6,PC} \n"
377 " MOV R0, R6 \n"
378 " BL sub_FF1F4D68 \n"
379 " LDR R0, [R5, #0x9C] \n"
380 " TST R0, #2 \n"
381 " LDMEQFD SP!, {R4-R6,PC} \n"
382 " MOV R0, R6 \n"
383 " LDMFD SP!, {R4-R6,LR} \n"
384 " B sub_FF083800 \n"
385 );
386 }
387
388
389
390 void __attribute__((naked,noinline)) sub_FF1F5DB8_my() {
391 asm volatile (
392 " STMFD SP!, {R3-R7,LR} \n"
393 " LDR R6, =0x43FA0 \n"
394 " MOV R4, R0 \n"
395 " LDR R0, [R6, #0x28] \n"
396 " LDR R5, =0x420D \n"
397 " CMP R0, #0 \n"
398 " MOV R7, #0 \n"
399 " BNE loc_FF1F5E5C \n"
400 " LDR R1, [R6, #0x9C] \n"
401 " TST R1, #6 \n"
402 " BNE loc_FF1F5DF8 \n"
403 " MOV R0, #0xC \n"
404 " BL sub_FF08F82C \n"
405 " TST R0, #1 \n"
406 " BEQ loc_FF1F5E5C \n"
407 " B loc_FF1F5E54 \n"
408
409 "loc_FF1F5DF8:\n"
410 " LDRH R0, [R6] \n"
411 " CMP R0, R5 \n"
412 " LDRNEH R0, [R6, #0xAA] \n"
413 " CMPNE R0, #3 \n"
414 " LDRNE R0, [R4, #8] \n"
415 " CMPNE R0, #1 \n"
416 " BLS loc_FF1F5E3C \n"
417 " LDRH R0, [R6, #0xA6] \n"
418 " CMP R0, #3 \n"
419 " BNE loc_FF1F5E28 \n"
420 " TST R1, #2 \n"
421 " BNE loc_FF1F5E5C \n"
422
423 "loc_FF1F5E28:\n"
424 " BL sub_FF018814 \n"
425 " TST R0, #1 \n"
426 " BEQ loc_FF1F5E5C \n"
427 " BL sub_FF08F88C \n"
428 " B loc_FF1F5E54 \n"
429
430 "loc_FF1F5E3C:\n"
431 " MOV R0, #0xC \n"
432 " BL sub_FF08F82C \n"
433 " TST R0, #1 \n"
434 " BEQ loc_FF1F5E5C \n"
435 " BL sub_FF1F67A8 \n"
436 " BL sub_FF083118 \n"
437
438 "loc_FF1F5E54:\n"
439 " MOV R0, #1 \n"
440 " LDMFD SP!, {R3-R7,PC} \n"
441
442 "loc_FF1F5E5C:\n"
443 " MOV R0, R4 \n"
444 " BL sub_FF1F75F8 \n"
445 " BL sub_FF086354 \n"
446 " LDR R0, [R6, #0x28] \n"
447 " CMP R0, #0 \n"
448 " BNE loc_FF1F6018 \n"
449 " MOV R0, R4 \n"
450 " BL sub_FF1F4C40 \n"
451 " TST R0, #1 \n"
452 " LDMNEFD SP!, {R3-R7,PC} \n"
453 " LDR R0, [R6, #0x9C] \n"
454 " AND R0, R0, #0x40 \n"
455 " CMP R0, #0 \n"
456 " LDRNEH R0, [R6] \n"
457 " CMPNE R0, R5 \n"
458 " LDRNEH R0, [R6, #0xAA] \n"
459 " CMPNE R0, #3 \n"
460 " LDRNE R0, [R4, #8] \n"
461 " CMPNE R0, #1 \n"
462 " BLS loc_FF1F5EC8 \n"
463 " BL sub_FF1F6C20 \n"
464 " MOV R3, #0xB3 \n"
465 " STR R3, [SP] \n"
466 " LDR R2, =0x3A98 \n"
467 " LDR R3, =0xFF1F60D8 /*'SsCaptureSeq.c'*/ \n"
468 " MOV R1, #0x8000 \n"
469 " BL sub_FF08FAA0 \n"
470
471 "loc_FF1F5EC8:\n"
472 " LDR R0, [R6, #0x9C] \n"
473 " AND R0, R0, #4 \n"
474 " CMP R0, #0 \n"
475 " LDRNEH R0, [R6] \n"
476 " CMPNE R0, R5 \n"
477 " LDRNEH R0, [R6, #0xAA] \n"
478 " CMPNE R0, #3 \n"
479 " LDRNE R0, [R4, #8] \n"
480 " CMPNE R0, #1 \n"
481 " BLS loc_FF1F5EFC \n"
482 " LDR R0, [R6, #0xA0] \n"
483 " CMP R0, #2 \n"
484 " BNE loc_FF1F5F08 \n"
485
486 "loc_FF1F5EFC:\n"
487 " MOV R0, R4 \n"
488 " BL sub_FF1F5198 \n"
489 " BL sub_FF1F66EC \n"
490
491
492 " BL wait_until_remote_button_is_released\n"
493 " BL capt_seq_hook_set_nr\n"
494
495
496 "loc_FF1F5F08:\n"
497 " LDRH R0, [R6] \n"
498 " CMP R0, R5 \n"
499 " LDRNEH R0, [R6, #0xAA] \n"
500 " CMPNE R0, #3 \n"
501 " LDRNE R0, [R4, #8] \n"
502 " CMPNE R0, #1 \n"
503 " MOVLS R0, #4 \n"
504 " BLLS sub_FF13A6EC \n"
505 " LDR R0, [R6, #0x9C] \n"
506 " TST R0, #4 \n"
507 " BEQ loc_FF1F5F60 \n"
508 " LDR R0, [R6, #0xA0] \n"
509 " CMP R0, #2 \n"
510 " BNE loc_FF1F5F60 \n"
511 " LDRH R0, [R6] \n"
512 " CMP R0, R5 \n"
513 " LDRNEH R0, [R6, #0xAA] \n"
514 " CMPNE R0, #3 \n"
515 " LDRNE R0, [R4, #8] \n"
516 " CMPNE R0, #1 \n"
517 " MOVLS R0, #3 \n"
518 " BLLS sub_FF13A6EC \n"
519
520 "loc_FF1F5F60:\n"
521 " LDR R0, [R6, #0x9C] \n"
522 " TST R0, #0x40 \n"
523 " BEQ loc_FF1F5FC8 \n"
524 " LDR R0, =0x181 \n"
525 " MOV R2, #4 \n"
526 " MOV R1, SP \n"
527 " BL _GetPropertyCase \n"
528 " TST R0, #1 \n"
529 " MOVNE R1, #0xD4 \n"
530 " LDRNE R0, =0xFF1F60D8 /*'SsCaptureSeq.c'*/ \n"
531 " BLNE _DebugAssert \n"
532 " LDR R0, [SP] \n"
533 " CMP R0, #0 \n"
534 " BNE loc_FF1F5FA8 \n"
535 " BL sub_FF1F6C20 \n"
536 " MOV R1, #0x8000 \n"
537 " BL sub_0068BB50 /*_SetEventFlag*/ \n"
538 " B loc_FF1F5FC8 \n"
539
540 "loc_FF1F5FA8:\n"
541 " BL sub_FF1F6C20 \n"
542 " MOV R1, #0x8000 \n"
543 " BL sub_0068BB84 /*_ClearEventFlag*/ \n"
544 " LDR R2, =0xFF1F5DA4 \n"
545 " LDR R0, [SP] \n"
546 " MOV R3, #0x8000 \n"
547 " MOV R1, R2 \n"
548 " BL sub_FF020D10 /*_SetTimerAfter*/ \n"
549
550 "loc_FF1F5FC8:\n"
551 " LDR R0, [R6, #0x9C] \n"
552 " AND R0, R0, #6 \n"
553 " CMP R0, #0 \n"
554 " LDRNEH R0, [R6] \n"
555 " CMPNE R0, R5 \n"
556 " LDRNEH R0, [R6, #0xAA] \n"
557 " CMPNE R0, #3 \n"
558 " LDRNE R0, [R4, #8] \n"
559 " CMPNE R0, #1 \n"
560 " MOVLS R0, #2 \n"
561 " BLLS sub_FF091040 \n"
562 " LDR R0, [R6, #0x9C] \n"
563 " TST R0, #0x10 \n"
564 " MOV R0, R4 \n"
565 " BEQ loc_FF1F600C \n"
566 " BL sub_FF38E63C \n"
567 " B loc_FF1F6010 \n"
568
569 "loc_FF1F600C:\n"
570 " BL sub_FF1F57E0 \n"
571
572 "loc_FF1F6010:\n"
573 " MOV R7, R0 \n"
574 " B loc_FF1F6028 \n"
575
576 "loc_FF1F6018:\n"
577 " LDR R0, =0xA430 \n"
578 " LDR R0, [R0] \n"
579 " CMP R0, #0 \n"
580 " MOVNE R7, #0x1D \n"
581
582 "loc_FF1F6028:\n"
583 " MOV R0, R7 \n"
584 " LDMFD SP!, {R3-R7,PC} \n"
585 );
586 }
587
588
589
590 void __attribute__((naked,noinline)) exp_drv_task() {
591 asm volatile (
592 " STMFD SP!, {R4-R9,LR} \n"
593 " SUB SP, SP, #0x2C \n"
594 " LDR R6, =0x502C \n"
595 " LDR R7, =0xBB8 \n"
596 " LDR R4, =0x62050 \n"
597 " MOV R0, #0 \n"
598 " ADD R5, SP, #0x1C \n"
599 " STR R0, [SP, #0xC] \n"
600
601 "loc_FF0CCAAC:\n"
602 " LDR R0, [R6, #0x20] \n"
603 " MOV R2, #0 \n"
604 " ADD R1, SP, #0x28 \n"
605 " BL sub_0068BDE0 /*_ReceiveMessageQueue*/ \n"
606 " LDR R0, [SP, #0xC] \n"
607 " CMP R0, #1 \n"
608 " BNE loc_FF0CCAF8 \n"
609 " LDR R0, [SP, #0x28] \n"
610 " LDR R0, [R0] \n"
611 " CMP R0, #0x14 \n"
612 " CMPNE R0, #0x15 \n"
613 " CMPNE R0, #0x16 \n"
614 " CMPNE R0, #0x17 \n"
615 " BEQ loc_FF0CCC58 \n"
616 " CMP R0, #0x2A \n"
617 " BEQ loc_FF0CCBE0 \n"
618 " ADD R1, SP, #0xC \n"
619 " MOV R0, #0 \n"
620 " BL sub_FF0CCA3C \n"
621
622 "loc_FF0CCAF8:\n"
623 " LDR R0, [SP, #0x28] \n"
624 " LDR R1, [R0] \n"
625 " CMP R1, #0x30 \n"
626 " BNE loc_FF0CCB24 \n"
627 " BL sub_FF0CDFF8 \n"
628 " LDR R0, [R6, #0x1C] \n"
629 " MOV R1, #1 \n"
630 " BL sub_0068BB50 /*_SetEventFlag*/ \n"
631 " BL _ExitTask \n"
632 " ADD SP, SP, #0x2C \n"
633 " LDMFD SP!, {R4-R9,PC} \n"
634
635 "loc_FF0CCB24:\n"
636 " CMP R1, #0x2F \n"
637 " BNE loc_FF0CCB40 \n"
638 " LDR R2, [R0, #0x8C]! \n"
639 " LDR R1, [R0, #4] \n"
640 " MOV R0, R1 \n"
641 " BLX R2 \n"
642 " B loc_FF0CD114 \n"
643
644 "loc_FF0CCB40:\n"
645 " CMP R1, #0x28 \n"
646 " BNE loc_FF0CCB90 \n"
647 " LDR R0, [R6, #0x1C] \n"
648 " MOV R1, #0x80 \n"
649 " BL sub_0068BB84 /*_ClearEventFlag*/ \n"
650 " LDR R0, =0xFF0C7970 \n"
651 " MOV R1, #0x80 \n"
652 " BL sub_FF1DC3F8 \n"
653 " LDR R0, [R6, #0x1C] \n"
654 " MOV R2, R7 \n"
655 " MOV R1, #0x80 \n"
656 " BL sub_0068BA90 /*_WaitForAllEventFlag*/ \n"
657 " TST R0, #1 \n"
658 " LDRNE R1, =0x1643 \n"
659 " BNE loc_FF0CCC4C \n"
660
661 "loc_FF0CCB7C:\n"
662 " LDR R1, [SP, #0x28] \n"
663 " LDR R0, [R1, #0x90] \n"
664 " LDR R1, [R1, #0x8C] \n"
665 " BLX R1 \n"
666 " B loc_FF0CD114 \n"
667
668 "loc_FF0CCB90:\n"
669 " CMP R1, #0x29 \n"
670 " BNE loc_FF0CCBD8 \n"
671 " ADD R1, SP, #0xC \n"
672 " BL sub_FF0CCA3C \n"
673 " LDR R0, [R6, #0x1C] \n"
674 " MOV R1, #0x100 \n"
675 " BL sub_0068BB84 /*_ClearEventFlag*/ \n"
676 " LDR R0, =0xFF0C7980 \n"
677 " MOV R1, #0x100 \n"
678 " BL sub_FF1DD1AC \n"
679 " LDR R0, [R6, #0x1C] \n"
680 " MOV R2, R7 \n"
681 " MOV R1, #0x100 \n"
682 " BL sub_0068BA90 /*_WaitForAllEventFlag*/ \n"
683 " TST R0, #1 \n"
684 " BEQ loc_FF0CCB7C \n"
685 " LDR R1, =0x164D \n"
686 " B loc_FF0CCC4C \n"
687
688 "loc_FF0CCBD8:\n"
689 " CMP R1, #0x2A \n"
690 " BNE loc_FF0CCBF0 \n"
691
692 "loc_FF0CCBE0:\n"
693 " LDR R0, [SP, #0x28] \n"
694 " ADD R1, SP, #0xC \n"
695 " BL sub_FF0CCA3C \n"
696 " B loc_FF0CCB7C \n"
697
698 "loc_FF0CCBF0:\n"
699 " CMP R1, #0x2D \n"
700 " BNE loc_FF0CCC08 \n"
701 " BL sub_FF0B6830 \n"
702 " BL sub_FF0B7608 \n"
703 " BL sub_FF0B7118 \n"
704 " B loc_FF0CCB7C \n"
705
706 "loc_FF0CCC08:\n"
707 " CMP R1, #0x2E \n"
708 " BNE loc_FF0CCC58 \n"
709 " LDR R0, [R6, #0x1C] \n"
710 " MOV R1, #4 \n"
711 " BL sub_0068BB84 /*_ClearEventFlag*/ \n"
712 " LDR R1, =0xFF0C79A0 \n"
713 " LDR R0, =0xFFFFF400 \n"
714 " MOV R2, #4 \n"
715 " BL sub_FF0B6280 \n"
716 " BL sub_FF0B6510 \n"
717 " LDR R0, [R6, #0x1C] \n"
718 " MOV R2, R7 \n"
719 " MOV R1, #4 \n"
720 " BL sub_0068B9AC /*_WaitForAnyEventFlag*/ \n"
721 " TST R0, #1 \n"
722 " BEQ loc_FF0CCB7C \n"
723 " LDR R1, =0x1675 \n"
724
725 "loc_FF0CCC4C:\n"
726 " LDR R0, =0xFF0C81AC /*'ExpDrv.c'*/ \n"
727 " BL _DebugAssert \n"
728 " B loc_FF0CCB7C \n"
729
730 "loc_FF0CCC58:\n"
731 " LDR R0, [SP, #0x28] \n"
732 " MOV R8, #1 \n"
733 " LDR R1, [R0] \n"
734 " CMP R1, #0x12 \n"
735 " CMPNE R1, #0x13 \n"
736 " BNE loc_FF0CCCC0 \n"
737 " LDR R1, [R0, #0x7C] \n"
738 " ADD R1, R1, R1, LSL#1 \n"
739 " ADD R1, R0, R1, LSL#2 \n"
740 " SUB R1, R1, #8 \n"
741 " LDMIA R1, {R2,R3,R9} \n"
742 " STMIA R5, {R2,R3,R9} \n"
743 " BL sub_FF0CAC20 \n"
744 " LDR R0, [SP, #0x28] \n"
745 " LDR R1, [R0, #0x7C] \n"
746 " LDR R3, [R0, #0x8C] \n"
747 " LDR R2, [R0, #0x90] \n"
748 " ADD R0, R0, #4 \n"
749 " BLX R3 \n"
750 " LDR R0, [SP, #0x28] \n"
751 " BL sub_FF0CE3FC \n"
752 " LDR R0, [SP, #0x28] \n"
753 " LDR R1, [R0, #0x7C] \n"
754 " LDR R2, [R0, #0x98] \n"
755 " LDR R3, [R0, #0x94] \n"
756 " B loc_FF0CCFD8 \n"
757
758 "loc_FF0CCCC0:\n"
759 " CMP R1, #0x14 \n"
760 " CMPNE R1, #0x15 \n"
761 " CMPNE R1, #0x16 \n"
762 " CMPNE R1, #0x17 \n"
763 " BNE loc_FF0CCD78 \n"
764 " ADD R3, SP, #0xC \n"
765 " MOV R2, SP \n"
766 " ADD R1, SP, #0x1C \n"
767 " BL sub_FF0CAE84 \n"
768 " CMP R0, #1 \n"
769 " MOV R9, R0 \n"
770 " CMPNE R9, #5 \n"
771 " BNE loc_FF0CCD14 \n"
772 " LDR R0, [SP, #0x28] \n"
773 " MOV R2, R9 \n"
774 " LDR R1, [R0, #0x7C]! \n"
775 " LDR R12, [R0, #0x10]! \n"
776 " LDR R3, [R0, #4] \n"
777 " MOV R0, SP \n"
778 " BLX R12 \n"
779 " B loc_FF0CCD4C \n"
780
781 "loc_FF0CCD14:\n"
782 " LDR R0, [SP, #0x28] \n"
783 " CMP R9, #2 \n"
784 " LDR R3, [R0, #0x90] \n"
785 " CMPNE R9, #6 \n"
786 " BNE loc_FF0CCD60 \n"
787 " LDR R12, [R0, #0x8C] \n"
788 " MOV R2, R9 \n"
789 " MOV R1, #1 \n"
790 " MOV R0, SP \n"
791 " BLX R12 \n"
792 " LDR R0, [SP, #0x28] \n"
793 " MOV R2, SP \n"
794 " ADD R1, SP, #0x1C \n"
795 " BL sub_FF0CC78C \n"
796
797 "loc_FF0CCD4C:\n"
798 " LDR R0, [SP, #0x28] \n"
799 " LDR R2, [SP, #0xC] \n"
800 " MOV R1, R9 \n"
801 " BL sub_FF0CC9DC \n"
802 " B loc_FF0CCFE0 \n"
803
804 "loc_FF0CCD60:\n"
805 " LDR R1, [R0, #0x7C] \n"
806 " LDR R12, [R0, #0x8C] \n"
807 " MOV R2, R9 \n"
808 " ADD R0, R0, #4 \n"
809 " BLX R12 \n"
810 " B loc_FF0CCFE0 \n"
811
812 "loc_FF0CCD78:\n"
813 " CMP R1, #0x24 \n"
814 " CMPNE R1, #0x25 \n"
815 " BNE loc_FF0CCDC4 \n"
816 " LDR R1, [R0, #0x7C] \n"
817 " ADD R1, R1, R1, LSL#1 \n"
818 " ADD R1, R0, R1, LSL#2 \n"
819 " SUB R1, R1, #8 \n"
820 " LDMIA R1, {R2,R3,R9} \n"
821 " STMIA R5, {R2,R3,R9} \n"
822 " BL sub_FF0C9954 \n"
823 " LDR R0, [SP, #0x28] \n"
824 " LDR R1, [R0, #0x7C] \n"
825 " LDR R3, [R0, #0x8C] \n"
826 " LDR R2, [R0, #0x90] \n"
827 " ADD R0, R0, #4 \n"
828 " BLX R3 \n"
829 " LDR R0, [SP, #0x28] \n"
830 " BL sub_FF0C9E4C \n"
831 " B loc_FF0CCFE0 \n"
832
833 "loc_FF0CCDC4:\n"
834 " ADD R1, R0, #4 \n"
835 " LDMIA R1, {R2,R3,R9} \n"
836 " STMIA R5, {R2,R3,R9} \n"
837 " LDR R1, [R0] \n"
838 " CMP R1, #0x28 \n"
839 " ADDCC PC, PC, R1, LSL#2 \n"
840 " B loc_FF0CCFC8 \n"
841 " B loc_FF0CCE80 \n"
842 " B loc_FF0CCE80 \n"
843 " B loc_FF0CCE88 \n"
844 " B loc_FF0CCE90 \n"
845 " B loc_FF0CCE90 \n"
846 " B loc_FF0CCE90 \n"
847 " B loc_FF0CCE80 \n"
848 " B loc_FF0CCE88 \n"
849 " B loc_FF0CCE90 \n"
850 " B loc_FF0CCE90 \n"
851 " B loc_FF0CCEA8 \n"
852 " B loc_FF0CCEA8 \n"
853 " B loc_FF0CCFB4 \n"
854 " B loc_FF0CCFBC \n"
855 " B loc_FF0CCFBC \n"
856 " B loc_FF0CCFBC \n"
857 " B loc_FF0CCFBC \n"
858 " B loc_FF0CCFC4 \n"
859 " B loc_FF0CCFC8 \n"
860 " B loc_FF0CCFC8 \n"
861 " B loc_FF0CCFC8 \n"
862 " B loc_FF0CCFC8 \n"
863 " B loc_FF0CCFC8 \n"
864 " B loc_FF0CCFC8 \n"
865 " B loc_FF0CCE98 \n"
866 " B loc_FF0CCEA0 \n"
867 " B loc_FF0CCEA0 \n"
868 " B loc_FF0CCEA0 \n"
869 " B loc_FF0CCEB4 \n"
870 " B loc_FF0CCEB4 \n"
871 " B loc_FF0CCEBC \n"
872 " B loc_FF0CCEF4 \n"
873 " B loc_FF0CCF2C \n"
874 " B loc_FF0CCF64 \n"
875 " B loc_FF0CCF9C \n"
876 " B loc_FF0CCF9C \n"
877 " B loc_FF0CCFC8 \n"
878 " B loc_FF0CCFC8 \n"
879 " B loc_FF0CCFA4 \n"
880 " B loc_FF0CCFAC \n"
881
882 "loc_FF0CCE80:\n"
883 " BL sub_FF0C7FBC \n"
884 " B loc_FF0CCFC8 \n"
885
886 "loc_FF0CCE88:\n"
887 " BL sub_FF0C8300 \n"
888 " B loc_FF0CCFC8 \n"
889
890 "loc_FF0CCE90:\n"
891 " BL sub_FF0C856C \n"
892 " B loc_FF0CCFC8 \n"
893
894 "loc_FF0CCE98:\n"
895 " BL sub_FF0C8864 \n"
896 " B loc_FF0CCFC8 \n"
897
898 "loc_FF0CCEA0:\n"
899 " BL sub_FF0C8A80 \n"
900 " B loc_FF0CCFC8 \n"
901
902 "loc_FF0CCEA8:\n"
903 " BL sub_FF0C8F84_my \n"
904 " MOV R8, #0 \n"
905 " B loc_FF0CCFC8 \n"
906
907 "loc_FF0CCEB4:\n"
908 " BL sub_FF0C9158 \n"
909 " B loc_FF0CCFC8 \n"
910
911 "loc_FF0CCEBC:\n"
912 " LDRH R1, [R0, #4] \n"
913 " STRH R1, [SP, #0x1C] \n"
914 " LDRH R1, [R4, #2] \n"
915 " STRH R1, [SP, #0x1E] \n"
916 " LDRH R1, [R4, #4] \n"
917 " STRH R1, [SP, #0x20] \n"
918 " LDRH R1, [R4, #6] \n"
919 " STRH R1, [SP, #0x22] \n"
920 " LDRH R1, [R0, #0xC] \n"
921 " STRH R1, [SP, #0x24] \n"
922 " LDRH R1, [R4, #0xA] \n"
923 " STRH R1, [SP, #0x26] \n"
924 " BL sub_FF0CE08C \n"
925 " B loc_FF0CCFC8 \n"
926
927 "loc_FF0CCEF4:\n"
928 " LDRH R1, [R0, #4] \n"
929 " STRH R1, [SP, #0x1C] \n"
930 " LDRH R1, [R4, #2] \n"
931 " STRH R1, [SP, #0x1E] \n"
932 " LDRH R1, [R4, #4] \n"
933 " STRH R1, [SP, #0x20] \n"
934 " LDRH R1, [R4, #6] \n"
935 " STRH R1, [SP, #0x22] \n"
936 " LDRH R1, [R4, #8] \n"
937 " STRH R1, [SP, #0x24] \n"
938 " LDRH R1, [R4, #0xA] \n"
939 " STRH R1, [SP, #0x26] \n"
940 " BL sub_FF0CE1FC \n"
941 " B loc_FF0CCFC8 \n"
942
943 "loc_FF0CCF2C:\n"
944 " LDRH R1, [R4] \n"
945 " STRH R1, [SP, #0x1C] \n"
946 " LDRH R1, [R0, #6] \n"
947 " STRH R1, [SP, #0x1E] \n"
948 " LDRH R1, [R4, #4] \n"
949 " STRH R1, [SP, #0x20] \n"
950 " LDRH R1, [R4, #6] \n"
951 " STRH R1, [SP, #0x22] \n"
952 " LDRH R1, [R4, #8] \n"
953 " STRH R1, [SP, #0x24] \n"
954 " LDRH R1, [R4, #0xA] \n"
955 " STRH R1, [SP, #0x26] \n"
956 " BL sub_FF0CE2B0 \n"
957 " B loc_FF0CCFC8 \n"
958
959 "loc_FF0CCF64:\n"
960 " LDRH R1, [R4] \n"
961 " STRH R1, [SP, #0x1C] \n"
962 " LDRH R1, [R4, #2] \n"
963 " STRH R1, [SP, #0x1E] \n"
964 " LDRH R1, [R4, #4] \n"
965 " STRH R1, [SP, #0x20] \n"
966 " LDRH R1, [R4, #6] \n"
967 " STRH R1, [SP, #0x22] \n"
968 " LDRH R1, [R0, #0xC] \n"
969 " STRH R1, [SP, #0x24] \n"
970 " LDRH R1, [R4, #0xA] \n"
971 " STRH R1, [SP, #0x26] \n"
972 " BL sub_FF0CE358 \n"
973 " B loc_FF0CCFC8 \n"
974
975 "loc_FF0CCF9C:\n"
976 " BL sub_FF0C96E8 \n"
977 " B loc_FF0CCFC8 \n"
978
979 "loc_FF0CCFA4:\n"
980 " BL sub_FF0C9F50 \n"
981 " B loc_FF0CCFC8 \n"
982
983 "loc_FF0CCFAC:\n"
984 " BL sub_FF0CA4C4 \n"
985 " B loc_FF0CCFC8 \n"
986
987 "loc_FF0CCFB4:\n"
988 " BL sub_FF0CA6EC \n"
989 " B loc_FF0CCFC8 \n"
990
991 "loc_FF0CCFBC:\n"
992 " BL sub_FF0CA8AC \n"
993 " B loc_FF0CCFC8 \n"
994
995 "loc_FF0CCFC4:\n"
996 " BL sub_FF0CAA14 \n"
997
998 "loc_FF0CCFC8:\n"
999 " LDR R0, [SP, #0x28] \n"
1000 " LDR R1, [R0, #0x7C] \n"
1001 " LDR R2, [R0, #0x90] \n"
1002 " LDR R3, [R0, #0x8C] \n"
1003
1004 "loc_FF0CCFD8:\n"
1005 " ADD R0, R0, #4 \n"
1006 " BLX R3 \n"
1007
1008 "loc_FF0CCFE0:\n"
1009 " LDR R0, [SP, #0x28] \n"
1010 " LDR R0, [R0] \n"
1011 " CMP R0, #0x10 \n"
1012 " BEQ loc_FF0CD018 \n"
1013 " BGT loc_FF0CD008 \n"
1014 " CMP R0, #1 \n"
1015 " CMPNE R0, #4 \n"
1016 " CMPNE R0, #0xE \n"
1017 " BNE loc_FF0CD04C \n"
1018 " B loc_FF0CD018 \n"
1019
1020 "loc_FF0CD008:\n"
1021 " CMP R0, #0x13 \n"
1022 " CMPNE R0, #0x17 \n"
1023 " CMPNE R0, #0x1A \n"
1024 " BNE loc_FF0CD04C \n"
1025
1026 "loc_FF0CD018:\n"
1027 " LDRSH R0, [R4] \n"
1028 " CMN R0, #0xC00 \n"
1029 " LDRNESH R1, [R4, #8] \n"
1030 " CMNNE R1, #0xC00 \n"
1031 " STRNEH R0, [SP, #0x1C] \n"
1032 " STRNEH R1, [SP, #0x24] \n"
1033 " BNE loc_FF0CD04C \n"
1034 " ADD R0, SP, #0x10 \n"
1035 " BL sub_FF0CE608 /*_get_current_exp*/ \n"
1036 " LDRH R0, [SP, #0x10] \n"
1037 " STRH R0, [SP, #0x1C] \n"
1038 " LDRH R0, [SP, #0x18] \n"
1039 " STRH R0, [SP, #0x24] \n"
1040
1041 "loc_FF0CD04C:\n"
1042 " LDR R0, [SP, #0x28] \n"
1043 " CMP R8, #1 \n"
1044 " BNE loc_FF0CD09C \n"
1045 " LDR R1, [R0, #0x7C] \n"
1046 " MOV R2, #0xC \n"
1047 " ADD R1, R1, R1, LSL#1 \n"
1048 " ADD R0, R0, R1, LSL#2 \n"
1049 " SUB R8, R0, #8 \n"
1050 " LDR R0, =0x62050 \n"
1051 " ADD R1, SP, #0x1C \n"
1052 " BL sub_00690174 \n"
1053 " LDR R0, =0x6205C \n"
1054 " MOV R2, #0xC \n"
1055 " ADD R1, SP, #0x1C \n"
1056 " BL sub_00690174 \n"
1057 " LDR R0, =0x62068 \n"
1058 " MOV R2, #0xC \n"
1059 " MOV R1, R8 \n"
1060 " BL sub_00690174 \n"
1061 " B loc_FF0CD114 \n"
1062
1063 "loc_FF0CD09C:\n"
1064 " LDR R0, [R0] \n"
1065 " MOV R3, #1 \n"
1066 " CMP R0, #0xB \n"
1067 " BNE loc_FF0CD0E0 \n"
1068 " MOV R2, #0 \n"
1069 " STRD R2, [SP] \n"
1070 " MOV R2, R3 \n"
1071 " MOV R1, R3 \n"
1072 " MOV R0, #0 \n"
1073 " BL sub_FF0C7D90 \n"
1074 " MOV R3, #1 \n"
1075 " MOV R2, #0 \n"
1076 " STRD R2, [SP] \n"
1077 " MOV R2, R3 \n"
1078 " MOV R1, R3 \n"
1079 " MOV R0, #0 \n"
1080 " B loc_FF0CD110 \n"
1081
1082 "loc_FF0CD0E0:\n"
1083 " MOV R2, #1 \n"
1084 " STRD R2, [SP] \n"
1085 " MOV R3, R2 \n"
1086 " MOV R1, R2 \n"
1087 " MOV R0, R2 \n"
1088 " BL sub_FF0C7D90 \n"
1089 " MOV R3, #1 \n"
1090 " MOV R2, R3 \n"
1091 " MOV R1, R3 \n"
1092 " MOV R0, R3 \n"
1093 " STR R3, [SP] \n"
1094 " STR R3, [SP, #4] \n"
1095
1096 "loc_FF0CD110:\n"
1097 " BL sub_FF0C7F08 \n"
1098
1099 "loc_FF0CD114:\n"
1100 " LDR R0, [SP, #0x28] \n"
1101 " BL sub_FF0CDFF8 \n"
1102 " B loc_FF0CCAAC \n"
1103 );
1104 }
1105
1106
1107
1108 void __attribute__((naked,noinline)) sub_FF0C8F84_my() {
1109 asm volatile (
1110 " STMFD SP!, {R4-R8,LR} \n"
1111 " LDR R7, =0x502C \n"
1112 " MOV R4, R0 \n"
1113 " LDR R0, [R7, #0x1C] \n"
1114 " MOV R1, #0x3E \n"
1115 " BL sub_0068BB84 /*_ClearEventFlag*/ \n"
1116 " MOV R2, #0 \n"
1117 " LDRSH R0, [R4, #4] \n"
1118 " MOV R1, R2 \n"
1119 " BL sub_FF0C7A08 \n"
1120 " MOV R6, R0 \n"
1121 " LDRSH R0, [R4, #6] \n"
1122 " BL sub_FF0C7BBC \n"
1123 " LDRSH R0, [R4, #8] \n"
1124 " BL sub_FF0C7C14 \n"
1125 " LDRSH R0, [R4, #0xA] \n"
1126 " BL sub_FF0C7C6C \n"
1127 " LDRSH R0, [R4, #0xC] \n"
1128 " MOV R1, #0 \n"
1129 " BL sub_FF0C7CC4 \n"
1130 " MOV R5, R0 \n"
1131 " LDR R0, [R4] \n"
1132 " LDR R8, =0x62068 \n"
1133 " CMP R0, #0xB \n"
1134 " MOVEQ R6, #0 \n"
1135 " MOVEQ R5, R6 \n"
1136 " BEQ loc_FF0C9018 \n"
1137 " CMP R6, #1 \n"
1138 " BNE loc_FF0C9018 \n"
1139 " LDRSH R0, [R4, #4] \n"
1140 " LDR R1, =0xFF0C7960 \n"
1141 " MOV R2, #2 \n"
1142 " BL sub_FF1DC718 \n"
1143 " STRH R0, [R4, #4] \n"
1144 " MOV R0, #0 \n"
1145 " STR R0, [R7, #0x28] \n"
1146 " B loc_FF0C9020 \n"
1147
1148 "loc_FF0C9018:\n"
1149 " LDRH R0, [R8] \n"
1150 " STRH R0, [R4, #4] \n"
1151
1152 "loc_FF0C9020:\n"
1153 " CMP R5, #1 \n"
1154 " LDRNEH R0, [R8, #8] \n"
1155 " BNE loc_FF0C903C \n"
1156 " LDRSH R0, [R4, #0xC] \n"
1157 " LDR R1, =0xFF0C79E4 \n"
1158 " MOV R2, #0x20 \n"
1159 " BL sub_FF0CE048 \n"
1160
1161 "loc_FF0C903C:\n"
1162 " STRH R0, [R4, #0xC] \n"
1163 " LDRSH R0, [R4, #6] \n"
1164 " BL sub_FF0B657C_my \n"
1165 " LDRSH R0, [R4, #8] \n"
1166 " MOV R1, #1 \n"
1167 " BL sub_FF0B6DD0 \n"
1168 " MOV R1, #0 \n"
1169 " ADD R0, R4, #8 \n"
1170 " BL sub_FF0B6E58 \n"
1171 " LDRSH R0, [R4, #0xE] \n"
1172 " BL sub_FF0C1BCC \n"
1173 " LDR R4, =0xBB8 \n"
1174 " CMP R6, #1 \n"
1175 " BNE loc_FF0C9094 \n"
1176 " LDR R0, [R7, #0x1C] \n"
1177 " MOV R2, R4 \n"
1178 " MOV R1, #2 \n"
1179 " BL sub_0068BA90 /*_WaitForAllEventFlag*/ \n"
1180 " TST R0, #1 \n"
1181 " LDRNE R0, =0xFF0C81AC /*'ExpDrv.c'*/ \n"
1182 " MOVNE R1, #0x820 \n"
1183 " BLNE _DebugAssert \n"
1184
1185 "loc_FF0C9094:\n"
1186 " CMP R5, #1 \n"
1187 " LDMNEFD SP!, {R4-R8,PC} \n"
1188 " LDR R0, [R7, #0x1C] \n"
1189 " MOV R2, R4 \n"
1190 " MOV R1, #0x20 \n"
1191 " BL sub_0068BA90 /*_WaitForAllEventFlag*/ \n"
1192 " TST R0, #1 \n"
1193 " LDMEQFD SP!, {R4-R8,PC} \n"
1194 " LDMFD SP!, {R4-R8,LR} \n"
1195 " LDR R1, =0x825 \n"
1196 " LDR R0, =0xFF0C81AC /*'ExpDrv.c'*/ \n"
1197 " B _DebugAssert \n"
1198 );
1199 }
1200
1201
1202
1203 void __attribute__((naked,noinline)) sub_FF0B657C_my() {
1204 asm volatile (
1205 " STMFD SP!, {R4-R6,LR} \n"
1206 " LDR R5, =0x4C98 \n"
1207 " MOV R4, R0 \n"
1208 " LDR R0, [R5, #4] \n"
1209 " CMP R0, #1 \n"
1210 " MOVNE R1, #0x154 \n"
1211 " LDRNE R0, =0xFF0B63B4 /*'Shutter.c'*/ \n"
1212 " BLNE _DebugAssert \n"
1213 " CMN R4, #0xC00 \n"
1214 " LDREQSH R4, [R5, #2] \n"
1215 " CMN R4, #0xC00 \n"
1216 " LDREQ R1, =0x15A \n"
1217 " LDREQ R0, =0xFF0B63B4 /*'Shutter.c'*/ \n"
1218 " STRH R4, [R5, #2] \n"
1219 " BLEQ _DebugAssert \n"
1220 " MOV R0, R4 \n"
1221 " BL apex2us \n"
1222 " MOV R4, R0 \n"
1223
1224 " MOV R0, R4 \n"
1225 " BL sub_FF143808 \n"
1226 " TST R0, #1 \n"
1227 " LDMEQFD SP!, {R4-R6,PC} \n"
1228 " LDMFD SP!, {R4-R6,LR} \n"
1229 " LDR R1, =0x15F \n"
1230 " LDR R0, =0xFF0B63B4 /*'Shutter.c'*/ \n"
1231 " B _DebugAssert \n"
1232 );
1233 }