root/platform/sx280hs/sub/102b/capt_seq.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. capt_seq_task
  2. sub_fc1a9b00_my
  3. sub_fc334892_my
  4. sub_fc334694_my
  5. sub_fc1a996e_my
  6. developseq_task
  7. exp_drv_task
  8. sub_fc1e661e_my
  9. sub_fc2a664e_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 //#define NR_AUTO (0) // not needed (in fact, it makes the camera crash)
   6 static long *nrflag = (long*)(0x1cc20 + 4); // look below
   7 //#define PAUSE_FOR_FILE_COUNTER 150  // Enable delay in capt_seq_hook_raw_here to ensure file counter is updated
   8 
   9 #include "../../../generic/capt_seq.c"
  10 
  11 // capt_seq_task 0xfc0cdb9e
  12 
  13 void __attribute__((naked,noinline)) capt_seq_task() {
  14     asm volatile (
  15 "    push    {r3, r4, r5, r6, r7, lr}\n"
  16 "    ldr     r4, =0x322f0\n"
  17 "    movs    r5, #0\n"
  18 "    ldr     r6, =0x9ffc\n"
  19 "loc_fc0cdba6:\n"
  20 "    movs    r2, #0\n"
  21 "    mov     r1, sp\n"
  22 "    ldr     r0, [r6, #4]\n"
  23 "    blx     sub_fc251bfc\n"
  24 "    lsls    r0, r0, #31\n"
  25 "    beq.n   loc_fc0cdbc8\n"
  26 "    movw    r2, #0x479\n"
  27 "    ldr     r1, =0xfc0cd89c\n" // "SsShootTask.c"
  28 "    movs    r0, #0\n"
  29 "    blx     sub_fc251d14\n"
  30 "    blx     sub_fc251c1c\n"
  31 "    pop     {r3, r4, r5, r6, r7, pc}\n"
  32 "loc_fc0cdbc8:\n"
  33 "    ldr     r0, [sp, #0]\n"
  34 "    ldr     r1, [r0, #0]\n"
  35 "    cmp     r1, #41\n"
  36 "    bcs.n   loc_fc0cdcb0\n"
  37 "    tbb     [pc, r1]\n" // (jumptable: r1, 41 elements)
  38 "branchtable_fc0cdbd4:\n"
  39 "    .byte   ((loc_fc0cdbfe - branchtable_fc0cdbd4) / 2)\n" // (case 0)
  40 "    .byte   ((loc_fc0cdc12 - branchtable_fc0cdbd4) / 2)\n" // (case 1)
  41 "    .byte   ((loc_fc0cdc1a - branchtable_fc0cdbd4) / 2)\n" // (case 2)
  42 "    .byte   ((loc_fc0cdc28 - branchtable_fc0cdbd4) / 2)\n" // (case 3)
  43 "    .byte   ((loc_fc0cdc22 - branchtable_fc0cdbd4) / 2)\n" // (case 4)
  44 "    .byte   ((loc_fc0cdc30 - branchtable_fc0cdbd4) / 2)\n" // (case 5)
  45 "    .byte   ((loc_fc0cdc36 - branchtable_fc0cdbd4) / 2)\n" // (case 6)
  46 "    .byte   ((loc_fc0cdc3c - branchtable_fc0cdbd4) / 2)\n" // (case 7)
  47 "    .byte   ((loc_fc0cdc44 - branchtable_fc0cdbd4) / 2)\n" // (case 8)
  48 "    .byte   ((loc_fc0cdc8c - branchtable_fc0cdbd4) / 2)\n" // (case 9)
  49 "    .byte   ((loc_fc0cdc4e - branchtable_fc0cdbd4) / 2)\n" // (case 10)
  50 "    .byte   ((loc_fc0cdc56 - branchtable_fc0cdbd4) / 2)\n" // (case 11)
  51 "    .byte   ((loc_fc0cdc5c - branchtable_fc0cdbd4) / 2)\n" // (case 12)
  52 "    .byte   ((loc_fc0cdc7a - branchtable_fc0cdbd4) / 2)\n" // (case 13)
  53 "    .byte   ((loc_fc0cdc80 - branchtable_fc0cdbd4) / 2)\n" // (case 14)
  54 "    .byte   ((loc_fc0cdc86 - branchtable_fc0cdbd4) / 2)\n" // (case 15)
  55 "    .byte   ((loc_fc0cdc92 - branchtable_fc0cdbd4) / 2)\n" // (case 16)
  56 "    .byte   ((loc_fc0cdc98 - branchtable_fc0cdbd4) / 2)\n" // (case 17)
  57 "    .byte   ((loc_fc0cdc9e - branchtable_fc0cdbd4) / 2)\n" // (case 18)
  58 "    .byte   ((loc_fc0cdca4 - branchtable_fc0cdbd4) / 2)\n" // (case 19)
  59 "    .byte   ((loc_fc0cdcaa - branchtable_fc0cdbd4) / 2)\n" // (case 20)
  60 "    .byte   ((loc_fc0cdcb2 - branchtable_fc0cdbd4) / 2)\n" // (case 21)
  61 "    .byte   ((loc_fc0cdcb6 - branchtable_fc0cdbd4) / 2)\n" // (case 22)
  62 "    .byte   ((loc_fc0cdcbc - branchtable_fc0cdbd4) / 2)\n" // (case 23)
  63 "    .byte   ((loc_fc0cdcc2 - branchtable_fc0cdbd4) / 2)\n" // (case 24)
  64 "    .byte   ((loc_fc0cdcc8 - branchtable_fc0cdbd4) / 2)\n" // (case 25)
  65 "    .byte   ((loc_fc0cdcd0 - branchtable_fc0cdbd4) / 2)\n" // (case 26)
  66 "    .byte   ((loc_fc0cdcd6 - branchtable_fc0cdbd4) / 2)\n" // (case 27)
  67 "    .byte   ((loc_fc0cdce0 - branchtable_fc0cdbd4) / 2)\n" // (case 28)
  68 "    .byte   ((loc_fc0cdce6 - branchtable_fc0cdbd4) / 2)\n" // (case 29)
  69 "    .byte   ((loc_fc0cdcec - branchtable_fc0cdbd4) / 2)\n" // (case 30)
  70 "    .byte   ((loc_fc0cdcfc - branchtable_fc0cdbd4) / 2)\n" // (case 31)
  71 "    .byte   ((loc_fc0cdd02 - branchtable_fc0cdbd4) / 2)\n" // (case 32)
  72 "    .byte   ((loc_fc0cdd08 - branchtable_fc0cdbd4) / 2)\n" // (case 33)
  73 "    .byte   ((loc_fc0cdd0e - branchtable_fc0cdbd4) / 2)\n" // (case 34)
  74 "    .byte   ((loc_fc0cdd16 - branchtable_fc0cdbd4) / 2)\n" // (case 35)
  75 "    .byte   ((loc_fc0cdd1c - branchtable_fc0cdbd4) / 2)\n" // (case 36)
  76 "    .byte   ((loc_fc0cdd26 - branchtable_fc0cdbd4) / 2)\n" // (case 37)
  77 "    .byte   ((loc_fc0cdd52 - branchtable_fc0cdbd4) / 2)\n" // (case 38)
  78 "    .byte   ((loc_fc0cdd58 - branchtable_fc0cdbd4) / 2)\n" // (case 39)
  79 "    .byte   ((loc_fc0cdd72 - branchtable_fc0cdbd4) / 2)\n" // (case 40)
  80 ".align 1\n" // dumb assembler would happily continue with unaligned instructions...
  81 "loc_fc0cdbfe:\n"
  82 "    bl      sub_fc0ce0c2\n"
  83 "    BL      shooting_expo_param_override\n" // +
  84 "    bl      sub_fc0cbf1e\n"
  85 "    ldr     r0, [r4, #40]\n"
  86 "    cmp     r0, #0\n"
  87 "    beq.n   loc_fc0cdc10\n"
  88 "    bl      sub_fc1a9b00_my\n" // -> (only if the short press workaround is not needed)
  89 "loc_fc0cdc10:\n"
  90 "    b.n     loc_fc0cdd72\n"
  91 "loc_fc0cdc12:\n"
  92 "    ldr     r0, [r0, #16]\n"
  93 "    bl      sub_fc1a996e_my\n" // ->
  94 "    b.n     loc_fc0cdd72\n"
  95 "loc_fc0cdc1a:\n"
  96 "    movs    r0, #1\n"
  97 "    bl      sub_fc0ce34e\n"
  98 "    b.n     loc_fc0cdd72\n"
  99 "loc_fc0cdc22:\n"
 100 "    bl      sub_fc0cde76\n"
 101 "    b.n     loc_fc0cdc2c\n"
 102 "loc_fc0cdc28:\n"
 103 "    bl      sub_fc0ce0ae\n"
 104 "loc_fc0cdc2c:\n"
 105 "    str     r5, [r4, #40]\n"
 106 "    b.n     loc_fc0cdd72\n"
 107 "loc_fc0cdc30:\n"
 108 "    bl      sub_fc0ce0b2\n"
 109 "    b.n     loc_fc0cdd72\n"
 110 "loc_fc0cdc36:\n"
 111 "    bl      sub_fc0ce246\n"
 112 "    b.n     loc_fc0cdc48\n"
 113 "loc_fc0cdc3c:\n"
 114 "    ldr     r0, [r0, #16]\n"
 115 "    bl      sub_fc1a9b6c\n"
 116 "    b.n     loc_fc0cdd72\n"
 117 "loc_fc0cdc44:\n"
 118 "    bl      sub_fc0ce2da\n"
 119 "loc_fc0cdc48:\n"
 120 "    bl      sub_fc0cbf1e\n"
 121 "    b.n     loc_fc0cdd72\n"
 122 "loc_fc0cdc4e:\n"
 123 "    ldr     r0, [r4, #88]\n"
 124 "    bl      sub_fc13dd62\n"
 125 "    b.n     loc_fc0cdd72\n"
 126 "loc_fc0cdc56:\n"
 127 "    bl      sub_fc13e002\n"
 128 "    b.n     loc_fc0cdd72\n"
 129 "loc_fc0cdc5c:\n"
 130 "    ldrh    r0, [r4, #0]\n"
 131 "    sub.w   r1, r0, #0x8200\n"
 132 "    subs    r1, #0x3b\n"
 133 "    beq.n   loc_fc0cdc6e\n"
 134 "    sub.w   r1, r0, #0x8000\n"
 135 "    subs    r1, #0x10\n"
 136 "    bne.n   loc_fc0cdc72\n"
 137 "loc_fc0cdc6e:\n"
 138 "    movs    r0, #1\n"
 139 "    b.n     loc_fc0cdc74\n"
 140 "loc_fc0cdc72:\n"
 141 "    movs    r0, #0\n"
 142 "loc_fc0cdc74:\n"
 143 "    bl      sub_fc13e04e\n"
 144 "    b.n     loc_fc0cdd72\n"
 145 "loc_fc0cdc7a:\n"
 146 "    bl      sub_fc13e1c6\n"
 147 "    b.n     loc_fc0cdd72\n"
 148 "loc_fc0cdc80:\n"
 149 "    bl      sub_fc13e5ec\n"
 150 "    b.n     loc_fc0cdd72\n"
 151 "loc_fc0cdc86:\n"
 152 "    bl      sub_fc13e67c\n"
 153 "    b.n     loc_fc0cdd72\n"
 154 "loc_fc0cdc8c:\n"
 155 "    bl      sub_fc0ce0ae\n"
 156 "    b.n     loc_fc0cdd72\n"
 157 "loc_fc0cdc92:\n"
 158 "    bl      sub_fc1a9220\n"
 159 "    b.n     loc_fc0cdd72\n"
 160 "loc_fc0cdc98:\n"
 161 "    bl      sub_fc1a93ae\n"
 162 "    b.n     loc_fc0cdd72\n"
 163 "loc_fc0cdc9e:\n"
 164 "    bl      sub_fc1a9422\n"
 165 "    b.n     loc_fc0cdd72\n"
 166 "loc_fc0cdca4:\n"
 167 "    bl      sub_fc1a94b4\n"
 168 "    b.n     loc_fc0cdd72\n"
 169 "loc_fc0cdcaa:\n"
 170 "    bl      sub_fc1a9550\n"
 171 "    b.n     loc_fc0cdd72\n"
 172 "loc_fc0cdcb0:\n"
 173 "    b.n     loc_fc0cdd64\n"
 174 "loc_fc0cdcb2:\n"
 175 "    movs    r0, #0\n"
 176 "    b.n     loc_fc0cdcca\n"
 177 "loc_fc0cdcb6:\n"
 178 "    bl      sub_fc1a96f6\n"
 179 "    b.n     loc_fc0cdd72\n"
 180 "loc_fc0cdcbc:\n"
 181 "    bl      sub_fc1a9760\n"
 182 "    b.n     loc_fc0cdd72\n"
 183 "loc_fc0cdcc2:\n"
 184 "    bl      sub_fc1a97d8\n"
 185 "    b.n     loc_fc0cdd72\n"
 186 "loc_fc0cdcc8:\n"
 187 "    movs    r0, #1\n"
 188 "loc_fc0cdcca:\n"
 189 "    bl      sub_fc1a95e8\n"
 190 "    b.n     loc_fc0cdd72\n"
 191 "loc_fc0cdcd0:\n"
 192 "    bl      sub_fc0ce482\n"
 193 "    b.n     loc_fc0cdd72\n"
 194 "loc_fc0cdcd6:\n"
 195 "    bl      sub_fc0ce4a4\n"
 196 "    bl      sub_fc1aa512\n"
 197 "    b.n     loc_fc0cdd72\n"
 198 "loc_fc0cdce0:\n"
 199 "    bl      sub_fc0ce692\n"
 200 "    b.n     loc_fc0cdd72\n"
 201 "loc_fc0cdce6:\n"
 202 "    bl      sub_fc0ce75e\n"
 203 "    b.n     loc_fc0cdd72\n"
 204 "loc_fc0cdcec:\n"
 205 "    bl      sub_fc1aa5a8\n"
 206 "    b.n     loc_fc0cdd72\n"
 207 "    movs    r0, r0\n"
 208 "    movs    r2, #0xf0\n"
 209 "    movs    r3, r0\n"
 210 "    ldr     r7, [sp, #0x3f0]\n"
 211 "    movs    r0, r0\n"
 212 "loc_fc0cdcfc:\n"
 213 "    bl      sub_fc0cc74c\n"
 214 "    b.n     loc_fc0cdd72\n"
 215 "loc_fc0cdd02:\n"
 216 "    bl      sub_fc254a34\n"
 217 "    b.n     loc_fc0cdd72\n"
 218 "loc_fc0cdd08:\n"
 219 "    bl      sub_fc254af0\n"
 220 "    b.n     loc_fc0cdd72\n"
 221 "loc_fc0cdd0e:\n"
 222 "    ldr     r0, [r0, #12]\n"
 223 "    bl      sub_fc1a9898\n"
 224 "    b.n     loc_fc0cdd72\n"
 225 "loc_fc0cdd16:\n"
 226 "    bl      sub_fc1a98ec\n"
 227 "    b.n     loc_fc0cdd72\n"
 228 "loc_fc0cdd1c:\n"
 229 "    bl      sub_fc254bec\n"
 230 "    bl      sub_fc254b32\n"
 231 "    b.n     loc_fc0cdd72\n"
 232 "loc_fc0cdd26:\n"
 233 "    movs    r0, #1\n"
 234 "    bl      sub_fc1aa1e8\n"
 235 "    movs    r0, #1\n"
 236 "    bl      sub_fc1aa2ba\n"
 237 "    ldrh.w  r0, [r4, #404]\n"
 238 "    cmp     r0, #4\n"
 239 "    beq.n   loc_fc0cdd44\n"
 240 "    ldrh    r0, [r4, #0]\n"
 241 "    sub.w   r1, r0, #0x4200\n"
 242 "    subs    r1, #0x30\n"
 243 "    bne.n   loc_fc0cdd72\n"
 244 "loc_fc0cdd44:\n"
 245 "    bl      sub_fc254af0\n"
 246 "    bl      sub_fc254fb2\n"
 247 "    bl      sub_fc254e06\n"
 248 "    b.n     loc_fc0cdd72\n"
 249 "loc_fc0cdd52:\n"
 250 "    movs    r2, #0\n"
 251 "    movs    r1, #13\n"
 252 "    b.n     loc_fc0cdd5c\n"
 253 "loc_fc0cdd58:\n"
 254 "    movs    r2, #0\n"
 255 "    movs    r1, #12\n"
 256 "loc_fc0cdd5c:\n"
 257 "    movs    r0, #0\n"
 258 "    bl      sub_fc0cc8dc\n"
 259 "    b.n     loc_fc0cdd72\n"
 260 "loc_fc0cdd64:\n"
 261 "    movw    r2, #0x5de\n"
 262 "    ldr     r1, =0xfc0cd89c\n" // "SsShootTask.c"
 263 "    movs    r0, #0\n"
 264 "    blx     sub_fc251d14\n"
 265 "loc_fc0cdd72:\n"
 266 "    ldr     r0, [sp, #0]\n"
 267 "    ldr     r1, [r0, #4]\n"
 268 "    ldr     r0, [r6, #0]\n"
 269 "    blx     sub_fc251c14\n"
 270 "    ldr     r7, [sp, #0]\n"
 271 "    ldr     r0, [r7, #8]\n"
 272 "    cbnz    r0, loc_fc0cdd90\n"
 273 "    movw    r2, #0x116\n"
 274 "    ldr     r1, =0xfc0cd89c\n" // "SsShootTask.c"
 275 "    movs    r0, #0\n"
 276 "    blx     sub_fc251d14\n"
 277 "loc_fc0cdd90:\n"
 278 "    str     r5, [r7, #8]\n"
 279 "    b.n     loc_fc0cdba6\n"
 280 ".ltorg\n"
 281     );
 282 }
 283 
 284 //fc1a9b00
 285 void __attribute__((naked,noinline)) sub_fc1a9b00_my() {
 286     asm volatile (
 287 "    push    {r4, r5, r6, lr}\n"
 288 "    bl      sub_fc13d978\n"
 289 "    mov     r4, r0\n"
 290 "    movs    r0, #12\n"
 291 "    bl      sub_fc2792fc\n"
 292 "    ldr     r6, =0x1157c\n"
 293 "    lsls    r0, r0, #31\n"
 294 "    mov.w   r5, #1\n"
 295 "    bne.n   loc_fc1a9b68\n"
 296 "    bl      sub_fc0ce0b6\n"
 297 "    bl      sub_fc13fa6c\n"
 298 "    mov     r1, r4\n"
 299 "    bl      sub_fc13fab2\n"
 300 "    movs    r2, #4\n"
 301 "    movw    r0, #0x10e\n"
 302 "    add.w   r1, r4, #0x68\n"
 303 "    bl      sub_fc297712\n"    // SetPropertyCase
 304 "    movs    r2, #4\n"
 305 "    movs    r0, #0x2c\n"
 306 "    add.w   r1, r4, #0x6c\n"
 307 "    bl      sub_fc297712\n"    // SetPropertyCase
 308 "    movs    r2, #4\n"
 309 "    movs    r0, #0x3f\n"
 310 "    add.w   r1, r4, #8\n"
 311 "    bl      sub_fc297712\n"    // SetPropertyCase
 312 "    bl      sub_fc1aa3aa\n"
 313 "    mvn.w   r1, #0x1000\n"
 314 "    blx     sub_fc251b94\n"
 315 "    mov     r0, r4\n"
 316 "    bl      sub_fc3345d2\n"
 317 "    mov     r0, r4\n"
 318 "    bl      sub_fc334892_my\n" // ->
 319 "    lsls    r0, r0, #31\n"
 320 "    beq.n   loc_fc1a9b6a\n"
 321 "loc_fc1a9b68:\n"
 322 "    str     r5, [r6, #0]\n"
 323 "loc_fc1a9b6a:\n"
 324 //"    BL      capt_seq_hook_raw_here \n" // disabled, hook is now in dvlpseqtask
 325 "    pop     {r4, r5, r6, pc}\n"
 326 ".ltorg\n"
 327     );
 328 }
 329 
 330 //loc_fc334892: @ 2 refs
 331 void __attribute__((naked,noinline)) sub_fc334892_my() {
 332     asm volatile (
 333 "    stmdb   sp!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}\n"
 334 "    ldr     r7, =0x322f0\n"
 335 "    mov     r4, r0\n"
 336 "    movw    r8, #0x820d\n"
 337 "    ldr.w   r0, [r7, #0x164]\n"
 338 "    cbz     r0, loc_fc3348b8\n"
 339 "    ldrh    r0, [r7, #0]\n"
 340 "    cmp     r0, r8\n"
 341 "    beq.n   loc_fc3348b8\n"
 342 "    ldrh.w  r0, [r7, #0x192]\n"
 343 "    cmp     r0, #3\n"
 344 "    beq.n   loc_fc3348b8\n"
 345 "    ldr     r0, [r4, #8]\n"
 346 "    cmp     r0, #1\n"
 347 "    bhi.n   loc_fc3348c2\n"
 348 "loc_fc3348b8:\n"
 349 "    mov     r0, r4\n"
 350 "    bl      sub_fc334542\n"
 351 "    bl      sub_fc1aa00a\n"
 352 "loc_fc3348c2:\n"
 353 "    ldr.w   r0, [r7, #0x15c]\n"
 354 "    cbz     r0, loc_fc3348e0\n"
 355 "    ldrh    r1, [r7, #0]\n"
 356 "    cmp     r1, r8\n"
 357 "    beq.n   loc_fc3348dc\n"
 358 "    ldrh.w  r0, [r7, #0x192]\n"
 359 "    cmp     r0, #3\n"
 360 "    beq.n   loc_fc3348dc\n"
 361 "    ldr     r0, [r4, #8]\n"
 362 "    cmp     r0, #1\n"
 363 "    bhi.n   loc_fc3348e0\n"
 364 "loc_fc3348dc:\n"
 365 "    movs    r0, #3\n"
 366 "    b.n     loc_fc3348fe\n"
 367 "loc_fc3348e0:\n"
 368 "    ldr.w   r0, [r7, #0x188]\n"
 369 "    cmp     r0, #2\n"
 370 "    bne.n   loc_fc334902\n"
 371 "    ldrh    r0, [r7, #0]\n"
 372 "    cmp     r0, r8\n"
 373 "    beq.n   loc_fc3348fc\n"
 374 "    ldrh.w  r0, [r7, #0x192]\n"
 375 "    cmp     r0, #3\n"
 376 "    beq.n   loc_fc3348fc\n"
 377 "    ldr     r0, [r4, #8]\n"
 378 "    cmp     r0, #1\n"
 379 "    bhi.n   loc_fc334902\n"
 380 "loc_fc3348fc:\n"
 381 "    movs    r0, #4\n"
 382 "loc_fc3348fe:\n"
 383 "    bl      sub_fc1a9c72\n"
 384 "loc_fc334902:\n"
 385 "    movs    r2, #4\n"
 386 "    movw    r0, #0x12f\n"
 387 "    add     r1, sp, #4\n"
 388 "    bl      sub_fc297838\n"
 389 "    lsls    r0, r0, #31\n"
 390 "    beq.n   loc_fc33491e\n"
 391 "    movs    r0, #0\n"
 392 "    movw    r2, #0x170\n"
 393 "    ldr     r1, =0xfc334c4c\n" // "SsStandardCaptureSeq.c"
 394 "    blx     sub_fc251d14\n"
 395 "loc_fc33491e:\n"
 396 "    ldr     r0, [sp, #4]\n"
 397 "    ubfx    r0, r0, #8, #8\n"
 398 "    cmp     r0, #6\n"
 399 "    bne.n   loc_fc33492e\n"
 400 "    ldr     r0, =0xfc33482b\n"
 401 "    movs    r1, #0\n"
 402 "    b.n     loc_fc334932\n"
 403 "loc_fc33492e:\n"
 404 "    ldr     r0, =0xfc3342a1\n"
 405 "    mov     r1, r4\n"
 406 "loc_fc334932:\n"
 407 "    bl      sub_fc16137e\n"
 408 "    mov     r0, r4\n"
 409 "    bl      sub_fc334694_my\n" // ->
 410 "    ldr     pc, =0xfc33493d\n" // continue in ROM, thumb
 411 ".ltorg\n"
 412     );
 413 }
 414 
 415 //loc_fc334694: ; 2 refs
 416 void __attribute__((naked,noinline)) sub_fc334694_my() {
 417     asm volatile (
 418 "    push    {r1, r2, r3, r4, r5, r6, r7, lr}\n"
 419 "    ldr     r6, =0x324c8\n"
 420 "    mov     r4, r0\n"
 421 "    ldr     r5, =0x322f0\n"
 422 "    ldrsh.w r2, [r6, #0x0c]\n"
 423 "    ldrsh.w r1, [r6, #0x0e]\n"
 424 "    ldr     r3, [r6, #0]\n"
 425 "    ldr.w   r0, [r5, #0x90]\n"
 426 "    bl      sub_fc20ce04\n"
 427 "    movs    r2, #2\n"
 428 "    movs    r0, #0xfa\n"
 429 "    add     r1, sp, #8\n"
 430 "    bl      sub_fc297838\n"
 431 "    lsls    r0, r0, #31\n"
 432 "    beq.n   loc_fc3346ca\n"
 433 "    movw    r2, #0x2e5\n"
 434 "    ldr     r1, =0xfc334588\n" // "SsCaptureCommon.c"
 435 "    movs    r0, #0\n"
 436 "    blx     sub_fc251d14\n"
 437 "loc_fc3346ca:\n"
 438 "    ldrsh.w r0, [r6, #0x0c]\n"
 439 "    ldrsh.w r1, [sp, #8]\n"
 440 "    bl      sub_fc180438\n"
 441 "    ldr.w   r0, [r5, #0xec]\n"
 442 "    cbz     r0, loc_fc3346f4\n"
 443 "    ldrh    r0, [r5, #0]\n"
 444 "    sub.w   r1, r0, #0x8200\n"
 445 "    subs    r1, #0x0d\n"
 446 "    beq.n   loc_fc3346f4\n"
 447 "    ldrh.w  r0, [r5, #0x192]\n"
 448 "    cmp     r0, #3\n"
 449 "    beq.n   loc_fc3346f4\n"
 450 "    ldr     r0, [r4, #8]\n"
 451 "    cmp     r0, #1\n"
 452 "    bhi.n   loc_fc334714\n"
 453 "loc_fc3346f4:\n"
 454 "    bl      sub_fc138db8\n"    // GetCCDTemperature
 455 "    ldr     r3, =0x1cc20\n"
 456 "    mov     r1, r0\n"
 457 "    strh.w  r0, [r4, #0xe8]\n"
 458 "    subs    r2, r3, #4\n"
 459 "    strd    r2, r3, [sp]\n"
 460 "    ldrsh.w r2, [r6, #0x0c]\n"
 461 "    adds    r3, r3, #4\n"      // 0x1cc20 + 4 : darksubtype is written here
 462 "    ldrh.w  r0, [r5, #0x5e]\n"
 463 "    bl      sub_fc3a9830\n"    // GetDarkSubType
 464 "loc_fc334714:\n"
 465 "    BL      capt_seq_hook_set_nr\n"                 // +
 466 "    BL      wait_until_remote_button_is_released\n" // +
 467 "    ldr     pc, =0xfc334715\n" // continue in ROM, thumb
 468 ".ltorg\n"
 469     );
 470 //fc334714:   ldrh.w  r0, [r4, #0xe8]
 471 //fc334718:   bl      loc_fc16141e
 472 }
 473 
 474 //loc_fc1a996e:
 475 void __attribute__((naked,noinline)) sub_fc1a996e_my() {
 476     asm volatile (
 477 "    stmdb   sp!, {r2, r3, r4, r5, r6, r7, r8, lr}\n"
 478 "    mov     r5, r0\n"
 479 "    ldr     r0, =0x1157c\n"
 480 "    ldr     r6, =0x322f0\n"
 481 "    movs    r4, #0\n"
 482 "    ldr     r0, [r0, #0]\n"
 483 "    cbz     r0, loc_fc1a9982\n"
 484 "    movs    r4, #29\n"
 485 "loc_fc1a9980:\n"
 486 "    b.n     loc_fc1a9ac4\n"
 487 "loc_fc1a9982:\n"
 488 "    ldr     r0, [r6, #40]\n"
 489 "    cmp     r0, #0\n"
 490 "    bne.n   loc_fc1a9980\n"
 491 "    bl      sub_fc13fa6c\n"
 492 "    mov     r1, r5\n"
 493 "    bl      sub_fc13fab2\n"
 494 "    movs    r2, #4\n"
 495 "    movw    r0, #0x10e\n"
 496 "    add.w   r1, r5, #0x68\n"
 497 "    bl      sub_fc297712\n"
 498 "    movs    r2, #4\n"
 499 "    movs    r0, #0x2c\n"
 500 "    add.w   r1, r5, #0x6c\n"
 501 "    bl      sub_fc297712\n"
 502 "    ldr.w   r0, [r6, #292]\n"
 503 "    movw    r7, #0x820d\n"
 504 "    cbz     r0, loc_fc1a99de\n"
 505 "    ldrh    r0, [r6, #0]\n"
 506 "    cmp     r0, r7\n"
 507 "    beq.n   loc_fc1a99de\n"
 508 "    ldrh.w  r0, [r6, #402]\n"
 509 "    cmp     r0, #3\n"
 510 "    beq.n   loc_fc1a99de\n"
 511 "    ldr     r0, [r5, #8]\n"
 512 "    cmp     r0, #1\n"
 513 "    bls.n   loc_fc1a99de\n"
 514 "    ldr.w   r0, [r6, #220]\n"
 515 "    cbnz    r0, loc_fc1a99ee\n"
 516 "    bl      sub_fc12eae0\n"
 517 "    lsls    r0, r0, #31\n"
 518 "    beq.n   loc_fc1a99ee\n"
 519 "    bl      sub_fc279334\n"
 520 "    b.n     loc_fc1a99ec\n"
 521 "loc_fc1a99de:\n"
 522 "    movs    r0, #12\n"
 523 "    bl      sub_fc2792fc\n"
 524 "    lsls    r0, r0, #31\n"
 525 "    beq.n   loc_fc1a99ee\n"
 526 "    bl      sub_fc0cc742\n"
 527 "loc_fc1a99ec:\n"
 528 "    movs    r4, #1\n"
 529 "loc_fc1a99ee:\n"
 530 "    lsls    r0, r4, #31\n"
 531 "    bne.n   loc_fc1a9ac4\n"
 532 "    mov     r0, r5\n"
 533 "    bl      sub_fc1aa5f2\n"
 534 "    bl      sub_fc1aa3aa\n"
 535 "    mvn.w   r1, #0x1000\n"
 536 "    blx     sub_fc251b94\n"
 537 "    mov     r0, r5\n"
 538 "    bl      sub_fc333e9c\n"
 539 "    mov     r4, r0\n"
 540 "    lsls    r0, r0, #31\n"
 541 "    bne.n   loc_fc1a9ac4\n"
 542 "    bl      sub_fc0ce0b6\n"
 543 "    mov     r0, r5\n"
 544 "    bl      sub_fc3345d2\n"
 545 "    ldr.w   r0, [r6, #288]\n"
 546 "    cbnz    r0, loc_fc1a9a34\n"
 547 "    ldrh    r0, [r6, #0]\n"
 548 "    cmp     r0, r7\n"
 549 "    beq.n   loc_fc1a9a34\n"
 550 "    ldrh.w  r0, [r6, #402]\n"
 551 "    cmp     r0, #3\n"
 552 "    beq.n   loc_fc1a9a34\n"
 553 "    ldr     r0, [r5, #8]\n"
 554 "    cmp     r0, #1\n"
 555 "    bhi.n   loc_fc1a9a3a\n"
 556 "loc_fc1a9a34:\n"
 557 "    movs    r0, #2\n"
 558 "    bl      sub_fc0d0e12\n"
 559 "loc_fc1a9a3a:\n"
 560 "    ldr.w   r0, [r6, #168]\n"
 561 "    cmp     r0, #0\n"
 562 "    beq.n   loc_fc1a9aae\n"
 563 "    ldrh    r0, [r6, #0]\n"
 564 "    movw    r4, #0x1000\n"
 565 "    cmp     r0, r7\n"
 566 "    beq.n   loc_fc1a9a6e\n"
 567 "    ldrh.w  r0, [r6, #402]\n"
 568 "    cmp     r0, #3\n"
 569 "    beq.n   loc_fc1a9a6e\n"
 570 "    ldr     r0, [r5, #8]\n"
 571 "    cmp     r0, #1\n"
 572 "    bls.n   loc_fc1a9a6e\n"
 573 "    bl      sub_fc1aa3aa\n"
 574 "    movs    r3, #0xdb\n"
 575 "    movw    r2, #15000\n"
 576 "    mov     r1, r4\n"
 577 "    str     r3, [sp, #0]\n"
 578 "    ldr     r3, =0xfc1a9c40\n" // "SsCaptureCtrl.c"
 579 "    bl      sub_fc27949c\n"
 580 "loc_fc1a9a6e:\n"
 581 "    movs    r2, #4\n"
 582 "    movw    r0, #0x180\n"
 583 "    add     r1, sp, #4\n"
 584 "    bl      sub_fc297838\n"
 585 "    lsls    r0, r0, #31\n"
 586 "    beq.n   loc_fc1a9a88\n"
 587 "    movs    r2, #0xdf\n"
 588 "    movs    r0, #0\n"
 589 "    ldr     r1, =0xfc1a9c40\n" // "SsCaptureCtrl.c"
 590 "    blx     sub_fc251d14\n"
 591 "loc_fc1a9a88:\n"
 592 "    ldr     r0, [sp, #4]\n"
 593 "    cbnz    r0, loc_fc1a9a98\n"
 594 "    bl      sub_fc1aa3aa\n"
 595 "    mov     r1, r4\n"
 596 "    blx     sub_fc251c14\n"
 597 "    b.n     loc_fc1a9aae\n"
 598 "loc_fc1a9a98:\n"
 599 "    bl      sub_fc1aa3aa\n"
 600 "    mov     r1, r4\n"
 601 "    blx     sub_fc251b94\n"
 602 "    ldr     r2, =0xfc1a995d\n"
 603 "    mov     r3, r4\n"
 604 "    ldr     r0, [sp, #4]\n"
 605 "    mov     r1, r2\n"
 606 "    bl      sub_fc2a5614\n"
 607 "loc_fc1a9aae:\n"
 608 "    ldr.w   r0, [r6, #180]\n"
 609 "    cmp     r0, #0\n"
 610 "    mov     r0, r5\n"
 611 "    beq.n   loc_fc1a9abe\n"
 612 "    bl      sub_fc334d44\n"
 613 "    b.n     loc_fc1a9ac2\n"
 614 "loc_fc1a9abe:\n"
 615 "    bl      sub_fc334892_my\n"         // ->
 616 //"    BL      capt_seq_hook_raw_here \n" // disabled, hook is now in dvlpseqtask
 617 "loc_fc1a9ac2:\n"
 618 "    mov     r4, r0\n"
 619 "loc_fc1a9ac4:\n"
 620 "    mov     r2, r5\n"
 621 "    movs    r1, #1\n"
 622 "    mov     r0, r4\n"
 623 "    bl      sub_fc0cc8dc\n"
 624 "    lsls    r0, r4, #31\n"
 625 "    bne.n   loc_fc1a9afc\n"
 626 "    ldr.w   r0, [r6, #392]\n"
 627 "    cmp     r0, #2\n"
 628 "    bne.n   loc_fc1a9ae6\n"
 629 "    ldr.w   r0, [r6, #344]\n"
 630 "    cbnz    r0, loc_fc1a9ae6\n"
 631 "    mov     r0, r5\n"
 632 "    bl      sub_fc1aa6f4\n"
 633 "loc_fc1a9ae6:\n"
 634 "    movs    r0, #0\n"
 635 "    str     r0, [r6, #40]\n"
 636 "    ldr.w   r0, [r6, #248]\n"
 637 "    cmp     r0, #0\n"
 638 "    beq.n   loc_fc1a9afc\n"
 639 "    mov     r0, r5\n"
 640 "    ldmia.w sp!, {r2, r3, r4, r5, r6, r7, r8, lr}\n"
 641 //"    b.w     loc_fc0cc74e\n"  // - (not recognized automatically yet, transformed into ldr pc)
 642 "    ldr     pc, =0xfc0cc74f\n" // + thumb address must be used
 643 "loc_fc1a9afc:\n"
 644 "    ldmia.w sp!, {r2, r3, r4, r5, r6, r7, r8, pc}\n"
 645 ".ltorg\n"
 646     );
 647 }
 648 
 649 // task_DvlpSeq 0xfc1aa7fa
 650 void __attribute__((naked,noinline)) developseq_task() {
 651     asm volatile (
 652 "    push    {r2, r3, r4, r5, r6, lr}\n"
 653 "    ldr     r5, =0x115ac\n"
 654 "loc_fc1aa7fe:\n"
 655 "    movs    r2, #0\n"
 656 "    ldr     r1, [r5, #0x10]\n"
 657 "    ldr     r0, [r5, #8]\n"
 658 "    blx     sub_fc251b6c\n" // <PostMessageQueue>
 659 "    ldr     r0, [r5, #4]\n"
 660 "    movs    r2, #0\n"
 661 "    add     r1, sp, #4\n"
 662 "    blx     sub_fc251bfc\n" // <ReceiveMessageQueue>
 663 "    lsls    r0, r0, #0x1f\n"
 664 "    beq.n   loc_fc1aa81c\n"
 665 "    movw    r2, #0x196\n"
 666 "    b.n     loc_fc1aa82c\n"
 667 "loc_fc1aa81c:\n"
 668 "    ldr     r0, [r5, #8]\n"
 669 "    mov     r1, sp\n"
 670 "    blx     sub_fc251aec\n" // <TryReceiveMessageQueue>
 671 "    lsls    r0, r0, #0x1f\n"
 672 "    beq.n   loc_fc1aa83a\n"
 673 "    movw    r2, #0x19c\n"
 674 "loc_fc1aa82c:\n"
 675 "    movs    r0, #0\n"
 676 "    ldr     r1, =0xfc1aaad8\n" // "SsDvlpSeq.c"
 677 "    blx     sub_fc251d14\n" // <DebugAssert>
 678 "    blx     sub_fc251c1c\n"
 679 "    pop     {r2, r3, r4, r5, r6, pc}\n"
 680 "loc_fc1aa83a:\n"
 681 "    movs    r4, #0\n"
 682 "loc_fc1aa83c:\n"
 683 "    ldr     r1, [sp, #4]\n"
 684 "    ldr     r0, [r1, #0]\n"
 685 "    cbz     r0, loc_fc1aa878\n"
 686 "    cmp     r0, #2\n"
 687 "    beq.n   loc_fc1aa880\n"
 688 "    cmp     r0, #3\n"
 689 "    beq.n   loc_fc1aa892\n"
 690 "    cmp     r0, #4\n"
 691 "    bne.n   loc_fc1aa858\n"
 692 "    movs    r2, #0\n"
 693 "    movs    r1, #0xe\n"
 694 "    mov     r0, r2\n"
 695 "    bl      sub_fc0cc8dc\n"
 696 "loc_fc1aa858:\n" // 4 refs
 697 "    ldr     r6, [sp, #4]\n"
 698 "    ldr     r0, [r6, #4]\n"
 699 "    cbnz    r0, loc_fc1aa868\n"
 700 "    movs    r2, #0x79\n"
 701 "    movs    r0, #0\n"
 702 "    ldr     r1, =0xfc1aaad8\n" // "SsDvlpSeq.c"
 703 "    blx     sub_fc251d14\n" // <DebugAssert>
 704 "loc_fc1aa868:\n"
 705 "    str     r4, [r6, #4]\n"
 706 "    add     r1, sp, #4\n"
 707 "    ldr     r0, [r5, #4]\n"
 708 "    blx     sub_fc251aec\n" // <TryReceiveMessageQueue>
 709 "    lsls    r0, r0, #0x1f\n"
 710 "    beq.n   loc_fc1aa83c\n"
 711 "    b.n     loc_fc1aa7fe\n"
 712 "loc_fc1aa878:\n"
 713 "    ldr     r0, [r1, #8]\n"
 714 "    bl      sub_fc13f702\n"
 715 "    b.n     loc_fc1aa858\n"
 716 "loc_fc1aa880:\n"
 717 "    ldr     r0, [r1, #8]\n"
 718 "    movs    r1, #1\n"
 719 "    bl      sub_fc13f718\n"
 720 "    BL      capt_seq_hook_raw_here\n" // +
 721 "    ldr     r0, [sp, #4]\n"
 722 "    ldr     r0, [r0, #8]\n"
 723 "    bl      sub_fc1aac12\n"
 724 "    b.n     loc_fc1aa858\n"
 725 "loc_fc1aa892:\n"
 726 "    bl      sub_fc13e408\n"
 727 "    b.n     loc_fc1aa858\n"
 728     );
 729 }
 730 
 731 
 732 // exp_drv_task 0xfc1e93c8
 733 void __attribute__((naked,noinline)) exp_drv_task() {
 734     asm volatile (
 735 "    stmdb   sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n"
 736 "    sub     sp, #44\n"
 737 "    ldr.w   r9, =0xbba4\n"
 738 "    ldr.w   sl, =0xfffff400\n" // reconstructed, check again in case of problems
 739 "    movs    r0, #0\n"
 740 "    ldr     r6, =0x530e4\n"
 741 "    add.w   r8, sp, #28\n"
 742 "    movw    fp, #3000\n"
 743 "    str     r0, [sp, #12]\n"
 744 "loc_fc1e93e4:\n"
 745 "    ldr.w   r0, [r9, #32]\n"
 746 "    movs    r2, #0\n"
 747 "    add     r1, sp, #40\n"
 748 "    mov     r4, r9\n"
 749 "    blx     sub_fc251bfc\n"
 750 "    ldr     r0, [sp, #12]\n"
 751 "    cmp     r0, #1\n"
 752 "    bne.n   loc_fc1e9418\n"
 753 "    ldr     r0, [sp, #40]\n"
 754 "    ldr     r0, [r0, #0]\n"
 755 "    cmp     r0, #20\n"
 756 "loc_fc1e93fe:\n" // 2 refs
 757 "    beq.n   loc_fc1e94fe\n"
 758 "    cmp     r0, #21\n"
 759 "    beq.n   loc_fc1e93fe\n"
 760 "    cmp     r0, #22\n"
 761 "    beq.n   loc_fc1e93fe\n"
 762 "    cmp     r0, #23\n"
 763 "    beq.n   loc_fc1e950a\n"
 764 "    cmp     r0, #0x2a\n"
 765 "    beq.n   loc_fc1e94b4\n"
 766 "    movs    r0, #0\n"
 767 "    add     r1, sp, #12\n"
 768 "    bl      sub_fc1e938c\n"
 769 "loc_fc1e9418:\n"
 770 "    ldr     r0, [sp, #40]\n"
 771 "    ldr     r1, [r0, #0]\n"
 772 "    cmp     r1, #0x30\n"
 773 "    bne.n   loc_fc1e9436\n"
 774 "    bl      sub_fc1ea0ee\n"
 775 "    ldr.w   r0, [r9, #28]\n"
 776 "    movs    r1, #1\n"
 777 "    blx     sub_fc251c14\n" // 0x10c5569, SetEventFlag
 778 "    blx     sub_fc251c1c\n" // 0x10c5369, ExitTask
 779 "    add     sp, #44\n"
 780 //"    b.n     loc_fc1e9156\n" // -
 781 "    ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n" // + @0xfc1e9156
 782 "loc_fc1e9436:\n"
 783 "    cmp     r1, #0x2f\n"
 784 "    bne.n   loc_fc1e9448\n"
 785 "    add.w   r0, r0, #0xa4\n"
 786 "    ldrd    r2, r1, [r0]\n"
 787 "    mov     r0, r1\n"
 788 "    blx     r2\n"
 789 "    b.n     loc_fc1e984a\n"
 790 "loc_fc1e9448:\n"
 791 "    cmp     r1, #0x28\n"
 792 "    bne.n   loc_fc1e947e\n"
 793 "    ldr     r0, [r4, #28]\n"
 794 "    movs    r1, #0x80\n"
 795 "    blx     sub_fc251b94\n"
 796 "    ldr     r0, =0xfc1e5431\n" // sub
 797 "    movs    r1, #0x80\n"
 798 "    bl      sub_fc19dc26\n"
 799 "    ldr     r0, [r4, #28]\n"
 800 "    movs    r1, #0x80\n"
 801 "    mov     r2, fp\n"
 802 "    blx     sub_fc251b34\n"
 803 "    lsls    r0, r0, #31\n"
 804 "    beq.n   loc_fc1e9470\n"
 805 "    movw    r2, #0x1690\n"
 806 "    b.n     loc_fc1e94fc\n"
 807 "loc_fc1e9470:\n" // 6 refs
 808 "    ldr     r1, [sp, #40]\n"
 809 "    add.w   r1, r1, #0xa4\n"
 810 "    ldrd    r1, r0, [r1]\n"
 811 "    blx     r1\n"
 812 "    b.n     loc_fc1e984a\n"
 813 "loc_fc1e947e:\n"
 814 "    cmp     r1, #0x29\n"
 815 "    bne.n   loc_fc1e94b0\n"
 816 "    add     r1, sp, #12\n"
 817 "    bl      sub_fc1e938c\n"
 818 "    movw    r5, #0x100\n"
 819 "    ldr     r0, [r4, #28]\n"
 820 "    mov     r1, r5\n"
 821 "    blx     sub_fc251b94\n"
 822 "    ldr     r0, =0xfc1e543b\n" // sub
 823 "    mov     r1, r5\n"
 824 "    bl      sub_fc19e5a6\n"
 825 "    ldr     r0, [r4, #28]\n"
 826 "    mov     r2, fp\n"
 827 "    mov     r1, r5\n"
 828 "    blx     sub_fc251b34\n"
 829 "    lsls    r0, r0, #31\n"
 830 "    beq.n   loc_fc1e9470\n"
 831 "    movw    r2, #0x169a\n"
 832 "    b.n     loc_fc1e94fc\n"
 833 "loc_fc1e94b0:\n"
 834 "    cmp     r1, #0x2a\n"
 835 "    bne.n   loc_fc1e94be\n"
 836 "loc_fc1e94b4:\n"
 837 "    ldr     r0, [sp, #40]\n"
 838 "    add     r1, sp, #12\n"
 839 "    bl      sub_fc1e938c\n"
 840 "    b.n     loc_fc1e9470\n"
 841 "loc_fc1e94be:\n"
 842 "    cmp     r1, #0x2d\n"
 843 "    bne.n   loc_fc1e94d0\n"
 844 "    bl      sub_fc2a6886\n"
 845 "    bl      sub_fc15b928\n"
 846 "    bl      sub_fc15b60e\n"
 847 "    b.n     loc_fc1e9470\n"
 848 "loc_fc1e94d0:\n"
 849 "    cmp     r1, #0x2e\n"
 850 "    bne.n   loc_fc1e950a\n"
 851 "    ldr     r0, [r4, #28]\n"
 852 "    movs    r1, #4\n"
 853 "    blx     sub_fc251b94\n"
 854 "    ldr     r1, =0xfc1e544f\n" // sub
 855 "    movs    r2, #4\n"
 856 "    mov     r0, sl\n"
 857 "    bl      sub_fc2a6468\n"
 858 "    bl      sub_fc2a65f4\n"
 859 "    ldr     r0, [r4, #28]\n"
 860 "    movs    r1, #4\n"
 861 "    mov     r2, fp\n"
 862 "    blx     sub_fc251cc4\n"
 863 "    lsls    r0, r0, #31\n"
 864 "    beq.n   loc_fc1e9470\n"
 865 "    movw    r2, #0x16c2\n"
 866 "loc_fc1e94fc:\n" // 2 refs
 867 "    b.n     loc_fc1e9500\n"
 868 "loc_fc1e94fe:\n"
 869 "    b.n     loc_fc1e950a\n"
 870 "loc_fc1e9500:\n"
 871 "    ldr     r1, =0xfc1e9734\n" // "ExpDrv.c"
 872 "    movs    r0, #0\n"
 873 "    blx     sub_fc251d14\n"
 874 "    b.n     loc_fc1e9470\n"
 875 "loc_fc1e950a:\n" // 3 refs
 876 "    ldr     r0, [sp, #40]\n"
 877 "    movs    r5, #1\n"
 878 "    ldr     r1, [r0, #0]\n"
 879 "    cmp     r1, #18\n"
 880 "    beq.n   loc_fc1e9518\n"
 881 "    cmp     r1, #19\n"
 882 "    bne.n   loc_fc1e9556\n"
 883 "loc_fc1e9518:\n"
 884 "    ldr.w   r1, [r0, #0x94]\n"
 885 "    mov     r4, r8\n"
 886 "    add.w   r1, r1, r1, lsl #1\n"
 887 "    add.w   r1, r0, r1, lsl #2\n"
 888 "    subs    r1, #8\n"
 889 "    ldmia   r1!, {r2, r3, r7}\n"
 890 "    stmia   r4!, {r2, r3, r7}\n"
 891 "    bl      sub_fc1e7cc0\n"
 892 "    ldr     r0, [sp, #40]\n"
 893 "    add.w   r0, r0, #0x94\n"
 894 "    ldrd    r3, r2, [r0, #0x10]\n"
 895 "    ldr     r1, [r0, #0]\n"
 896 "    sub.w   r0, r0, #0x90\n"
 897 "    blx     r3\n"
 898 "    ldr     r0, [sp, #40]\n"
 899 "    bl      sub_fc1ea2cc\n"
 900 "    ldr     r0, [sp, #40]\n"
 901 "    add.w   r0, r0, #0x94\n"
 902 "    ldr     r1, [r0, #0]\n"
 903 "    ldrd    r3, r2, [r0, #24]\n"
 904 "    b.n     loc_fc1e976c\n"
 905 "loc_fc1e9556:\n"
 906 "    cmp     r1, #20\n"
 907 "    beq.n   loc_fc1e9566\n"
 908 "    cmp     r1, #21\n"
 909 "    beq.n   loc_fc1e9566\n"
 910 "    cmp     r1, #22\n"
 911 "    beq.n   loc_fc1e9566\n"
 912 "    cmp     r1, #23\n"
 913 "    bne.n   loc_fc1e95d6\n"
 914 "loc_fc1e9566:\n" // 3 refs
 915 "    add     r3, sp, #12\n"
 916 "    mov     r2, sp\n"
 917 "    add     r1, sp, #28\n"
 918 "    bl      sub_fc1e7eb6\n"
 919 "    cmp     r0, #1\n"
 920 "    mov     r4, r0\n"
 921 "    beq.n   loc_fc1e957a\n"
 922 "    cmp     r4, #5\n"
 923 "    bne.n   loc_fc1e958e\n"
 924 "loc_fc1e957a:\n"
 925 "    ldr     r0, [sp, #40]\n"
 926 "    mov     r2, r4\n"
 927 "    add.w   r0, r0, #0x94\n"
 928 "    ldrd    r7, r3, [r0, #0x10]\n"
 929 "    ldr     r1, [r0, #0]\n"
 930 "    mov     r0, sp\n"
 931 "    blx     r7\n"
 932 "    b.n     loc_fc1e95b4\n"
 933 "loc_fc1e958e:\n"
 934 "    cmp     r4, #2\n"
 935 "    beq.n   loc_fc1e9596\n"
 936 "    cmp     r4, #6\n"
 937 "    bne.n   loc_fc1e95c0\n"
 938 "loc_fc1e9596:\n"
 939 "    ldr     r0, [sp, #40]\n"
 940 "    mov     r2, r4\n"
 941 "    mov.w   r1, #1\n"
 942 "    add.w   r0, r0, #0xa4\n"
 943 "    ldrd    r7, r3, [r0]\n"
 944 "    mov     r0, sp\n"
 945 "    blx     r7\n"
 946 "    ldr     r0, [sp, #40]\n"
 947 "    add     r1, sp, #28\n"
 948 "    mov     r2, sp\n"
 949 "    bl      sub_fc1e915a\n"
 950 "loc_fc1e95b4:\n"
 951 "    ldr     r2, [sp, #12]\n"
 952 "    mov     r1, r4\n"
 953 "    ldr     r0, [sp, #40]\n"
 954 "    bl      sub_fc1e9344\n"
 955 "    b.n     loc_fc1e9772\n"
 956 "loc_fc1e95c0:\n"
 957 "    ldr     r0, [sp, #40]\n"
 958 "    mov     r2, r4\n"
 959 "    add.w   r0, r0, #0x94\n"
 960 "    ldrd    r7, r3, [r0, #0x10]\n"
 961 "    ldr     r1, [r0, #0]\n"
 962 "    sub.w   r0, r0, #0x90\n"
 963 "    blx     r7\n"
 964 "    b.n     loc_fc1e9772\n"
 965 "loc_fc1e95d6:\n"
 966 "    cmp     r1, #0x24\n"
 967 "    beq.n   loc_fc1e95de\n"
 968 "    cmp     r1, #0x25\n"
 969 "    bne.n   loc_fc1e9610\n"
 970 "loc_fc1e95de:\n"
 971 "    ldr.w   r1, [r0, #0x94]\n"
 972 "    mov     r4, r8\n"
 973 "    add.w   r1, r1, r1, lsl #1\n"
 974 "    add.w   r1, r0, r1, lsl #2\n"
 975 "    subs    r1, #8\n"
 976 "    ldmia   r1!, {r2, r3, r7}\n"
 977 "    stmia   r4!, {r2, r3, r7}\n"
 978 "    bl      sub_fc1e6e64\n"
 979 "    ldr     r0, [sp, #40]\n"
 980 "    add.w   r0, r0, #0x94\n"
 981 "    ldrd    r3, r2, [r0, #16]\n"
 982 "    ldr     r1, [r0, #0]\n"
 983 "    sub.w   r0, r0, #0x90\n"
 984 "    blx     r3\n"
 985 "    ldr     r0, [sp, #40]\n"
 986 "    bl      sub_fc1e723e\n"
 987 "    b.n     loc_fc1e9772\n"
 988 "loc_fc1e9610:\n"
 989 "    adds    r1, r0, #4\n"
 990 "    mov     r4, r8\n"
 991 "    ldmia   r1!, {r2, r3, r7}\n"
 992 "    stmia   r4!, {r2, r3, r7}\n"
 993 "    ldr     r1, [r0, #0]\n"
 994 "    cmp     r1, #40\n"
 995 "    bcs.n   loc_fc1e964e\n"
 996 "    tbb     [pc, r1]\n" // (jumptable: r1, 40 elements)
 997 "branchtable_fc1e9622:\n"
 998 "    .byte ((loc_fc1e964a - branchtable_fc1e9622) / 2)\n" // (case 0)
 999 "    .byte ((loc_fc1e964a - branchtable_fc1e9622) / 2)\n" // (case 1)
1000 "    .byte ((loc_fc1e9650 - branchtable_fc1e9622) / 2)\n" // (case 2)
1001 "    .byte ((loc_fc1e9656 - branchtable_fc1e9622) / 2)\n" // (case 3)
1002 "    .byte ((loc_fc1e9656 - branchtable_fc1e9622) / 2)\n" // (case 4)
1003 "    .byte ((loc_fc1e9656 - branchtable_fc1e9622) / 2)\n" // (case 5)
1004 "    .byte ((loc_fc1e964a - branchtable_fc1e9622) / 2)\n" // (case 6)
1005 "    .byte ((loc_fc1e9650 - branchtable_fc1e9622) / 2)\n" // (case 7)
1006 "    .byte ((loc_fc1e9656 - branchtable_fc1e9622) / 2)\n" // (case 8)
1007 "    .byte ((loc_fc1e9656 - branchtable_fc1e9622) / 2)\n" // (case 9)
1008 "    .byte ((loc_fc1e9668 - branchtable_fc1e9622) / 2)\n" // (case 10)
1009 "    .byte ((loc_fc1e9668 - branchtable_fc1e9622) / 2)\n" // (case 11)
1010 "    .byte ((loc_fc1e9750 - branchtable_fc1e9622) / 2)\n" // (case 12)
1011 "    .byte ((loc_fc1e9756 - branchtable_fc1e9622) / 2)\n" // (case 13)
1012 "    .byte ((loc_fc1e9756 - branchtable_fc1e9622) / 2)\n" // (case 14)
1013 "    .byte ((loc_fc1e9756 - branchtable_fc1e9622) / 2)\n" // (case 15)
1014 "    .byte ((loc_fc1e9756 - branchtable_fc1e9622) / 2)\n" // (case 16)
1015 "    .byte ((loc_fc1e975c - branchtable_fc1e9622) / 2)\n" // (case 17)
1016 "    .byte ((loc_fc1e9760 - branchtable_fc1e9622) / 2)\n" // (case 18)
1017 "    .byte ((loc_fc1e9760 - branchtable_fc1e9622) / 2)\n" // (case 19)
1018 "    .byte ((loc_fc1e9760 - branchtable_fc1e9622) / 2)\n" // (case 20)
1019 "    .byte ((loc_fc1e9760 - branchtable_fc1e9622) / 2)\n" // (case 21)
1020 "    .byte ((loc_fc1e9760 - branchtable_fc1e9622) / 2)\n" // (case 22)
1021 "    .byte ((loc_fc1e9760 - branchtable_fc1e9622) / 2)\n" // (case 23)
1022 "    .byte ((loc_fc1e965c - branchtable_fc1e9622) / 2)\n" // (case 24)
1023 "    .byte ((loc_fc1e9662 - branchtable_fc1e9622) / 2)\n" // (case 25)
1024 "    .byte ((loc_fc1e9662 - branchtable_fc1e9622) / 2)\n" // (case 26)
1025 "    .byte ((loc_fc1e9662 - branchtable_fc1e9622) / 2)\n" // (case 27)
1026 "    .byte ((loc_fc1e9670 - branchtable_fc1e9622) / 2)\n" // (case 28)
1027 "    .byte ((loc_fc1e9670 - branchtable_fc1e9622) / 2)\n" // (case 29)
1028 "    .byte ((loc_fc1e9676 - branchtable_fc1e9622) / 2)\n" // (case 30)
1029 "    .byte ((loc_fc1e96a0 - branchtable_fc1e9622) / 2)\n" // (case 31)
1030 "    .byte ((loc_fc1e96ca - branchtable_fc1e9622) / 2)\n" // (case 32)
1031 "    .byte ((loc_fc1e96f4 - branchtable_fc1e9622) / 2)\n" // (case 33)
1032 "    .byte ((loc_fc1e971e - branchtable_fc1e9622) / 2)\n" // (case 34)
1033 "    .byte ((loc_fc1e971e - branchtable_fc1e9622) / 2)\n" // (case 35)
1034 "    .byte ((loc_fc1e9760 - branchtable_fc1e9622) / 2)\n" // (case 36)
1035 "    .byte ((loc_fc1e9760 - branchtable_fc1e9622) / 2)\n" // (case 37)
1036 "    .byte ((loc_fc1e9724 - branchtable_fc1e9622) / 2)\n" // (case 38)
1037 "    .byte ((loc_fc1e972a - branchtable_fc1e9622) / 2)\n" // (case 39)
1038 "    .align 1\n"
1039 "loc_fc1e964a:\n" // 3 refs
1040 "    bl      sub_fc1e590c\n"
1041 "loc_fc1e964e:\n"
1042 "    b.n     loc_fc1e9760\n"
1043 "loc_fc1e9650:\n" // 2 refs
1044 "    bl      sub_fc1e5b78\n"
1045 "    b.n     loc_fc1e9760\n"
1046 "loc_fc1e9656:\n" // 5 refs
1047 "    bl      sub_fc1e5d90\n"
1048 "    b.n     loc_fc1e9760\n"
1049 "loc_fc1e965c:\n"
1050 "    bl      sub_fc1e6012\n"
1051 "    b.n     loc_fc1e9760\n"
1052 "loc_fc1e9662:\n" // 3 refs
1053 "    bl      sub_fc1e61e0\n"
1054 "    b.n     loc_fc1e9760\n"
1055 "loc_fc1e9668:\n" // 2 refs
1056 "    bl      sub_fc1e661e_my\n" // ->
1057 "    movs    r5, #0\n"
1058 "    b.n     loc_fc1e9760\n"
1059 "loc_fc1e9670:\n" // 2 refs
1060 "    bl      sub_fc1e6718\n"
1061 "    b.n     loc_fc1e9760\n"
1062 "loc_fc1e9676:\n"
1063 "    ldrh    r1, [r0, #4]\n"
1064 "    strh.w  r1, [sp, #28]\n"
1065 "    ldrh    r1, [r6, #2]\n"
1066 "    strh.w  r1, [sp, #30]\n"
1067 "    ldrh    r1, [r6, #4]\n"
1068 "    strh.w  r1, [sp, #32]\n"
1069 "    ldrh    r1, [r6, #6]\n"
1070 "    strh.w  r1, [sp, #34]\n"
1071 "    ldrh    r1, [r0, #12]\n"
1072 "    strh.w  r1, [sp, #36]\n"
1073 "    ldrh    r1, [r6, #10]\n"
1074 "    strh.w  r1, [sp, #38]\n"
1075 "    bl      sub_fc1e6baa\n"
1076 "    b.n     loc_fc1e9760\n"
1077 "loc_fc1e96a0:\n"
1078 "    ldrh    r1, [r0, #4]\n"
1079 "    strh.w  r1, [sp, #28]\n"
1080 "    ldrh    r1, [r6, #2]\n"
1081 "    strh.w  r1, [sp, #30]\n"
1082 "    ldrh    r1, [r6, #4]\n"
1083 "    strh.w  r1, [sp, #32]\n"
1084 "    ldrh    r1, [r6, #6]\n"
1085 "    strh.w  r1, [sp, #34]\n"
1086 "    ldrh    r1, [r6, #8]\n"
1087 "    strh.w  r1, [sp, #36]\n"
1088 "    ldrh    r1, [r6, #10]\n"
1089 "    strh.w  r1, [sp, #38]\n"
1090 "    bl      sub_fc1ea16a\n"
1091 "    b.n     loc_fc1e9760\n"
1092 "loc_fc1e96ca:\n"
1093 "    ldrh    r1, [r6, #0]\n"
1094 "    strh.w  r1, [sp, #28]\n"
1095 "    ldrh    r1, [r0, #6]\n"
1096 "    strh.w  r1, [sp, #30]\n"
1097 "    ldrh    r1, [r6, #4]\n"
1098 "    strh.w  r1, [sp, #32]\n"
1099 "    ldrh    r1, [r6, #6]\n"
1100 "    strh.w  r1, [sp, #34]\n"
1101 "    ldrh    r1, [r6, #8]\n"
1102 "    strh.w  r1, [sp, #36]\n"
1103 "    ldrh    r1, [r6, #10]\n"
1104 "    strh.w  r1, [sp, #38]\n"
1105 "    bl      sub_fc1ea1e6\n"
1106 "    b.n     loc_fc1e9760\n"
1107 "loc_fc1e96f4:\n"
1108 "    ldrh    r1, [r6, #0]\n"
1109 "    strh.w  r1, [sp, #28]\n"
1110 "    ldrh    r1, [r6, #2]\n"
1111 "    strh.w  r1, [sp, #30]\n"
1112 "    ldrh    r1, [r6, #4]\n"
1113 "    strh.w  r1, [sp, #32]\n"
1114 "    ldrh    r1, [r6, #6]\n"
1115 "    strh.w  r1, [sp, #34]\n"
1116 "    ldrh    r1, [r0, #12]\n"
1117 "    strh.w  r1, [sp, #36]\n"
1118 "    ldrh    r1, [r6, #10]\n"
1119 "    strh.w  r1, [sp, #38]\n"
1120 "    bl      sub_fc1ea25c\n"
1121 "    b.n     loc_fc1e9760\n"
1122 "loc_fc1e971e:\n" // 2 refs
1123 "    bl      sub_fc1e6c64\n"
1124 "    b.n     loc_fc1e9760\n"
1125 "loc_fc1e9724:\n"
1126 "    bl      sub_fc1e7306\n"
1127 "    b.n     loc_fc1e9760\n"
1128 "loc_fc1e972a:\n"
1129 "    bl      sub_fc1e76f4\n"
1130 "    b.n     loc_fc1e9760\n"
1131 ".ltorg\n" //fc1e9730: literal pool
1132 "loc_fc1e9750:\n" // objdump lost sync, reconstructed
1133 "    bl      sub_FC1E789E\n"
1134 "    b.n     loc_fc1e9760\n"
1135 "loc_fc1e9756:\n" // 4 refs
1136 "    bl      sub_fc1e7a12\n"
1137 "    b.n     loc_fc1e9760\n"
1138 "loc_fc1e975c:\n"
1139 "    bl      sub_fc1e7b2e\n"
1140 "loc_fc1e9760:\n" // 23 refs
1141 "    ldr     r0, [sp, #40]\n"
1142 "    add.w   r0, r0, #0x94\n"
1143 "    ldrd    r3, r2, [r0, #16]\n"
1144 "    ldr     r1, [r0, #0]\n"
1145 "loc_fc1e976c:\n"
1146 "    sub.w   r0, r0, #0x90\n"
1147 "    blx     r3\n"
1148 "loc_fc1e9772:\n" // 3 refs
1149 "    ldr     r0, [sp, #40]\n"
1150 "    ldr     r0, [r0, #0]\n"
1151 "    cmp     r0, #16\n"
1152 "    beq.n   loc_fc1e9796\n"
1153 "    bgt.n   loc_fc1e978a\n"
1154 "    cmp     r0, #1\n"
1155 "    beq.n   loc_fc1e9796\n"
1156 "    cmp     r0, #4\n"
1157 "    beq.n   loc_fc1e9796\n"
1158 "    cmp     r0, #14\n"
1159 "    bne.n   loc_fc1e97c8\n"
1160 "    b.n     loc_fc1e9796\n"
1161 "loc_fc1e978a:\n"
1162 "    cmp     r0, #19\n"
1163 "    beq.n   loc_fc1e9796\n"
1164 "    cmp     r0, #23\n"
1165 "    beq.n   loc_fc1e9796\n"
1166 "    cmp     r0, #26\n"
1167 "    bne.n   loc_fc1e97c8\n"
1168 "loc_fc1e9796:\n" // 6 refs
1169 "    ldrsh.w r0, [r6]\n"
1170 "    mov     r2, sl\n"
1171 "    cmp     r0, sl\n"
1172 "    beq.n   loc_fc1e97a8\n"
1173 "    ldrsh.w r1, [r6, #8]\n"
1174 "    cmp     r1, r2\n"
1175 "    bne.n   loc_fc1e97c0\n"
1176 "loc_fc1e97a8:\n"
1177 "    add     r0, sp, #16\n"
1178 "    bl      sub_fc28879a\n"
1179 "    ldrh.w  r0, [sp, #16]\n"
1180 "    strh.w  r0, [sp, #28]\n"
1181 "    ldrh.w  r0, [sp, #24]\n"
1182 "    strh.w  r0, [sp, #36]\n"
1183 "    b.n     loc_fc1e97c8\n"
1184 "loc_fc1e97c0:\n"
1185 "    strh.w  r0, [sp, #28]\n"
1186 "    strh.w  r1, [sp, #36]\n"
1187 "loc_fc1e97c8:\n" // 3 refs
1188 "    cmp     r5, #1\n"
1189 "    ldr     r0, [sp, #40]\n"
1190 "    bne.n   loc_fc1e9800\n"
1191 "    movs    r2, #12\n"
1192 "    ldr.w   r1, [r0, #0x94]\n"
1193 "    add.w   r1, r1, r1, lsl #1\n"
1194 "    add.w   r4, r0, r1, lsl #2\n"
1195 "    ldr     r0, =0x530e4\n"
1196 "    subs    r4, #8\n"
1197 "    add     r1, sp, #28\n"
1198 "    blx     sub_fc251d34\n"
1199 "    ldr     r0, =0x530e4\n"
1200 "    movs    r2, #12\n"
1201 "    add     r1, sp, #28\n"
1202 "    adds    r0, #12\n"
1203 "    blx     sub_fc251d34\n"
1204 "    ldr     r0, =0x530e4\n"
1205 "    movs    r2, #12\n"
1206 "    mov     r1, r4\n"
1207 "    adds    r0, #24\n"
1208 "    blx     sub_fc251d34\n"
1209 "    b.n     loc_fc1e984a\n"
1210 "loc_fc1e9800:\n"
1211 "    ldr     r0, [r0, #0]\n"
1212 "    mov.w   r3, #1\n"
1213 "    cmp     r0, #11\n"
1214 "    bne.n   loc_fc1e982a\n"
1215 "    movs    r2, #0\n"
1216 "    mov     r1, r3\n"
1217 "    strd    r2, r3, [sp]\n"
1218 "    movs    r0, #0\n"
1219 "    mov     r2, r3\n"
1220 "    bl      sub_fc1e5752\n"
1221 "    movs    r3, #1\n"
1222 "    movs    r2, #0\n"
1223 "    mov     r1, r3\n"
1224 "    movs    r0, #0\n"
1225 "    strd    r2, r3, [sp]\n"
1226 "    mov     r2, r3\n"
1227 "    b.n     loc_fc1e9846\n"
1228 "loc_fc1e982a:\n"
1229 "    movs    r2, #1\n"
1230 "    strd    r2, r3, [sp]\n"
1231 "    mov     r3, r2\n"
1232 "    mov     r1, r2\n"
1233 "    mov     r0, r2\n"
1234 "    bl      sub_fc1e5752\n"
1235 "    movs    r3, #1\n"
1236 "    str     r3, [sp, #0]\n"
1237 "    mov     r2, r3\n"
1238 "    mov     r1, r3\n"
1239 "    mov     r0, r3\n"
1240 "    str     r3, [sp, #4]\n"
1241 "loc_fc1e9846:\n"
1242 "    bl      sub_fc1e5890\n"
1243 "loc_fc1e984a:\n" // 3 refs
1244 "    ldr     r0, [sp, #40]\n"
1245 "    bl      sub_fc1ea0ee\n"
1246 "    b.n     loc_fc1e93e4\n"
1247 ".ltorg\n"
1248     );
1249 }
1250 
1251 //loc_fc1e661e:
1252 void __attribute__((naked,noinline)) sub_fc1e661e_my() {
1253 asm volatile (
1254 "    stmdb   sp!, {r4, r5, r6, r7, r8, lr}\n"
1255 "    ldr     r7, =0xbba4\n"
1256 "    movs    r1, #0x3e\n"
1257 "    mov     r4, r0\n"
1258 "    ldr     r0, [r7, #28]\n"
1259 "    blx     sub_fc251b94\n"
1260 "    movs    r2, #0\n"
1261 "    ldrsh.w r0, [r4, #4]\n"
1262 "    movs    r3, #1\n"
1263 "    mov     r1, r2\n"
1264 "    bl      sub_fc1e5490\n"
1265 "    mov     r6, r0\n"
1266 "    ldrsh.w r0, [r4, #6]\n"
1267 "    bl      sub_fc1e55e2\n"
1268 "    ldrsh.w r0, [r4, #8]\n"
1269 "    bl      sub_fc1e5626\n"
1270 "    ldrsh.w r0, [r4, #10]\n"
1271 "    bl      sub_fc1e566a\n"
1272 "    ldrsh.w r0, [r4, #12]\n"
1273 "    movs    r1, #0\n"
1274 "    bl      sub_fc1e56ae\n"
1275 "    mov     r5, r0\n"
1276 "    ldr     r0, [r4, #0]\n"
1277 "    ldr.w   r8, =0x530fc\n"
1278 "    cmp     r0, #11\n"
1279 "    bne.n   loc_fc1e6672\n"
1280 "    movs    r6, #0\n"
1281 "    mov     r5, r6\n"
1282 "    b.n     loc_fc1e668a\n"
1283 "loc_fc1e6672:\n"
1284 "    cmp     r6, #1\n"
1285 "    bne.n   loc_fc1e668a\n"
1286 "    ldrsh.w r0, [r4, #4]\n"
1287 "    movs    r2, #2\n"
1288 "    ldr     r1, =0xfc1e5427\n" // sub
1289 "    bl      sub_fc19de16\n"
1290 "    strh    r0, [r4, #4]\n"
1291 "    movs    r0, #0\n"
1292 "    str     r0, [r7, #40]\n"
1293 "    b.n     loc_fc1e6690\n"
1294 "loc_fc1e668a:\n"
1295 "    ldrh.w  r0, [r8]\n"
1296 "    strh    r0, [r4, #4]\n"
1297 "loc_fc1e6690:\n"
1298 "    cmp     r5, #1\n"
1299 "    bne.n   loc_fc1e66a2\n"
1300 "    ldrsh.w r0, [r4, #12]\n"
1301 "    movs    r2, #32\n"
1302 "    ldr     r1, =0xfc1e547b\n" // sub
1303 "    bl      sub_fc1ea140\n"
1304 "    b.n     loc_fc1e66a6\n"
1305 "loc_fc1e66a2:\n"
1306 "    ldrh.w  r0, [r8, #8]\n"
1307 "loc_fc1e66a6:\n"
1308 "    strh    r0, [r4, #12]\n"
1309 "    ldrsh.w r0, [r4, #6]\n"
1310 "    bl      sub_fc2a664e_my\n" // ->
1311 "    ldr     pc, =0xfc1e66b1\n" // continue in ROM, thumb
1312 ".ltorg\n"
1313     );
1314 }
1315 
1316 //loc_fc2a664e:
1317 void __attribute__((naked,noinline)) sub_fc2a664e_my() {
1318 asm volatile (
1319 "    push    {r4, r5, r6, lr}\n"
1320 "    ldr     r5, =0xb7c8\n"
1321 "    mov     r4, r0\n"
1322 "    ldr     r0, [r5, #4]\n"
1323 "    cmp     r0, #1\n"
1324 "    beq.n   loc_fc2a6666\n"
1325 "    movs    r0, #0\n"
1326 "    movw    r2, #0x154\n"
1327 "    ldr     r1, =0xfc2a6784\n" // "Shutter.c"
1328 "    blx     sub_fc251d14\n"
1329 "loc_fc2a6666:\n"
1330 "    ldr     r0, =0xfffff400\n"
1331 "    cmp     r4, r0\n"
1332 "    bne.n   loc_fc2a6670\n"
1333 "    ldrsh.w r4, [r5, #2]\n"
1334 "loc_fc2a6670:\n"
1335 "    strh    r4, [r5, #2]\n"
1336 "    cmp     r4, r0\n"
1337 "    bne.n   loc_fc2a6682\n"
1338 "    movs    r0, #0\n"
1339 "    movw    r2, #0x15a\n"
1340 "    ldr     r1, =0xfc2a6784\n" // "Shutter.c"
1341 "    blx     sub_fc251d14\n"
1342 "loc_fc2a6682:\n"
1343 "    mov     r0, r4\n"
1344 //"    bl      sub_fc0a950e\n"  // - _apex2us
1345 "    bl      apex2us\n"         // +
1346 
1347 //"    mov     r4, r0\n"        // - removed due to below nullsub
1348 //"    bl      sub_fc0db264\n"  // - nullsub
1349 //"    mov     r0, r4\n"        // - 
1350 "    bl      sub_fc0db7f2\n"
1351 "    lsls    r0, r0, #31\n"
1352 "    beq.n   loc_fc2a66a8\n"
1353 "    ldmia.w sp!, {r4, r5, r6, lr}\n"
1354 "    movs    r0, #0\n"
1355 "    movw    r2, #0x15f\n"
1356 "    ldr     r1, =0xfc2a6784\n" // "Shutter.c"
1357 //"    b.w     loc_fc251344\n"  // - sub_10c5c3d, DebugAssert
1358 "    ldr     pc, =0xfc251345\n" // + replacement for the above b.w instruction, thumb address
1359 "loc_fc2a66a8:\n"
1360 "    pop     {r4, r5, r6, pc}\n"
1361 ".ltorg\n"
1362     );
1363 }
1364 

/* [<][>][^][v][top][bottom][index][help] */