This source file includes following definitions.
- taskHook
- boot
- sub_FF810380_my
- sub_FF8111D8_my
- sub_FF814278_my
- sub_FF81A698_my
- taskcreate_Startup_my
- task_Startup_my
- taskcreatePhySw_my
- CreateTask_spytask
- init_file_modules_task
1 #include "lolevel.h"
2 #include "platform.h"
3 #include "core.h"
4 #include "dryos31.h"
5 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
6
7 const char * const new_sa = &_end;
8
9 void CreateTask_PhySw();
10 void CreateTask_spytask();
11
12 extern void task_CaptSeq();
13 extern void task_InitFileModules();
14 extern void task_MovieRecord();
15 extern void task_ExpDrv();
16 extern void task_PhySw();
17 extern void task_FileWrite();
18
19 void taskHook(context_t **context) {
20
21 task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
22
23 if(tcb->entry == (void*)task_PhySw) tcb->entry = (void*)mykbd_task;
24 if(tcb->entry == (void*)task_CaptSeq) tcb->entry = (void*)capt_seq_task;
25 if(tcb->entry == (void*)task_InitFileModules) tcb->entry = (void*)init_file_modules_task;
26 if(tcb->entry == (void*)task_MovieRecord) tcb->entry = (void*)movie_record_task;
27 if(tcb->entry == (void*)task_ExpDrv) tcb->entry = (void*)exp_drv_task;
28 if(tcb->entry == (void*)task_FileWrite) tcb->entry = (void*)filewritetask;
29 }
30
31
32
33
34
35 void __attribute__((naked,noinline)) boot( ) {
36 asm volatile (
37 "LDR R1, =0xC0410000\n"
38 "MOV R0, #0\n"
39 "STR R0, [R1]\n"
40 "MOV R1, #0x78\n"
41 "MCR p15, 0, R1, c1, c0\n"
42 "MOV R1, #0\n"
43 "MCR p15, 0, R1, c7, c10, 4\n"
44 "MCR p15, 0, R1, c7, c5\n"
45 "MCR p15, 0, R1, c7, c6\n"
46 "MOV R0, #0x3D\n"
47 "MCR p15, 0, R0, c6, c0\n"
48 "MOV R0, #0xC000002F\n"
49 "MCR p15, 0, R0, c6, c1\n"
50 "MOV R0, #0x33\n"
51 "MCR p15, 0, R0, c6, c2\n"
52 "MOV R0, #0x40000033\n"
53 "MCR p15, 0, R0, c6, c3\n"
54 "MOV R0, #0x80000017\n"
55 "MCR p15, 0, R0, c6, c4\n"
56 "LDR R0, =0xFF80002D\n"
57 "MCR p15, 0, R0, c6, c5\n"
58 "MOV R0, #0x34\n"
59 "MCR p15, 0, R0, c2, c0\n"
60 "MOV R0, #0x34\n"
61 "MCR p15, 0, R0, c2, c0, 1\n"
62 "MOV R0, #0x34\n"
63 "MCR p15, 0, R0, c3, c0\n"
64 "LDR R0, =0x3333330\n"
65 "MCR p15, 0, R0, c5, c0, 2\n"
66 "LDR R0, =0x3333330\n"
67 "MCR p15, 0, R0, c5, c0, 3\n"
68 "MRC p15, 0, R0, c1, c0\n"
69 "ORR R0, R0, #0x1000\n"
70 "ORR R0, R0, #4\n"
71 "ORR R0, R0, #1\n"
72 "MCR p15, 0, R0, c1, c0\n"
73 "MOV R1, #0x80000006\n"
74 "MCR p15, 0, R1, c9, c1\n"
75 "MOV R1, #6\n"
76 "MCR p15, 0, R1, c9, c1, 1\n"
77 "MRC p15, 0, R1, c1, c0\n"
78 "ORR R1, R1, #0x50000\n"
79 "MCR p15, 0, R1, c1, c0\n"
80 "LDR R2, =0xC0200000\n"
81 "MOV R1, #1\n"
82 "STR R1, [R2, #0x10C]\n"
83 "MOV R1, #0xFF\n"
84 "STR R1, [R2, #0xC]\n"
85 "STR R1, [R2, #0x1C]\n"
86 "STR R1, [R2, #0x2C]\n"
87 "STR R1, [R2, #0x3C]\n"
88 "STR R1, [R2, #0x4C]\n"
89 "STR R1, [R2, #0x5C]\n"
90 "STR R1, [R2, #0x6C]\n"
91 "STR R1, [R2, #0x7C]\n"
92 "STR R1, [R2, #0x8C]\n"
93 "STR R1, [R2, #0x9C]\n"
94 "STR R1, [R2, #0xAC]\n"
95 "STR R1, [R2, #0xBC]\n"
96 "STR R1, [R2, #0xCC]\n"
97 "STR R1, [R2, #0xDC]\n"
98 "STR R1, [R2, #0xEC]\n"
99 "STR R1, [R2, #0xFC]\n"
100 "LDR R1, =0xC0400008\n"
101 "LDR R2, =0x430005\n"
102 "STR R2, [R1]\n"
103 "MOV R1, #1\n"
104 "LDR R2, =0xC0243100\n"
105 "STR R2, [R1]\n"
106 "LDR R2, =0xC0242010\n"
107 "LDR R1, [R2]\n"
108 "ORR R1, R1, #1\n"
109 "STR R1, [R2]\n"
110 "LDR R0, =0xFFC06164\n"
111 "LDR R1, =0x3F1000\n"
112 "LDR R3, =0x4005D4\n"
113 "loc_FF81013C:\n"
114 "CMP R1, R3\n"
115 "LDRCC R2, [R0], #4\n"
116 "STRCC R2, [R1], #4\n"
117 "BCC loc_FF81013C\n"
118 "LDR R0, =0xFFBFA7C8\n"
119 "LDR R1, =0x1900\n"
120 "LDR R3, =0xD29C\n"
121 "loc_FF810158:\n"
122 "CMP R1, R3\n"
123 "LDRCC R2, [R0], #4\n"
124 "STRCC R2, [R1], #4\n"
125 "BCC loc_FF810158\n"
126 "LDR R1, =0x157CA4 \n"
127 "MOV R2, #0\n"
128 "loc_FF810170:\n"
129 "CMP R3, R1\n"
130 "STRCC R2, [R3], #4\n"
131 "BCC loc_FF810170\n"
132
133 "B sub_FF810380_my \n"
134 );
135 }
136
137
138
139
140 void __attribute__((naked,noinline)) sub_FF810380_my( ) {
141
142
143 *(int*)0x1934=(int)taskHook;
144 *(int*)0x1938=(int)taskHook;
145
146
147
148
149
150 if ((*(int*) 0xC02200F8) & 1)
151 *(int*)(0x24B0+4) = 0x200000;
152 else
153 *(int*)(0x24B0+4) = 0x100000;
154
155 asm volatile (
156 "LDR R0, =0xFF8103F8\n"
157 "MOV R1, #0\n"
158 "LDR R3, =0xFF810430\n"
159 "loc_FF81038C:\n"
160 "CMP R0, R3\n"
161 "LDRCC R2, [R0], #4\n"
162 "STRCC R2, [R1], #4\n"
163 "BCC loc_FF81038C\n"
164 "LDR R0, =0xFF810430\n"
165 "MOV R1, #0x4B0\n"
166 "LDR R3, =0xFF810644\n"
167 "loc_FF8103A8:\n"
168 "CMP R0, R3\n"
169 "LDRCC R2, [R0], #4\n"
170 "STRCC R2, [R1], #4\n"
171 "BCC loc_FF8103A8\n"
172 "MOV R0, #0xD2\n"
173 "MSR CPSR_cxsf, R0\n"
174 "MOV SP, #0x1000\n"
175 "MOV R0, #0xD3\n"
176 "MSR CPSR_cxsf, R0\n"
177 "MOV SP, #0x1000\n"
178 "LDR R0, =0x6C4\n"
179 "LDR R2, =0xEEEEEEEE\n"
180 "MOV R3, #0x1000\n"
181 "loc_FF8103DC:\n"
182 "CMP R0, R3\n"
183 "STRCC R2, [R0], #4\n"
184 "BCC loc_FF8103DC\n"
185
186 "BL sub_FF8111D8_my \n"
187 );
188 }
189
190
191
192
193 void __attribute__((naked,noinline)) sub_FF8111D8_my( ) {
194 asm volatile (
195 "STR LR, [SP, #-4]!\n"
196 "SUB SP, SP, #0x74\n"
197 "MOV R1, #0x74\n"
198 "MOV R0, SP\n"
199 "BL sub_003FC448\n"
200 "MOV R0, #0x57000\n"
201 "STR R0, [SP, #4]\n"
202 #if defined(CHDK_NOT_IN_CANON_HEAP)
203 "LDR R0, =0x157CA4 \n"
204 #else
205 "LDR R0, =new_sa \n"
206 "LDR R0, [R0] \n"
207 #endif
208 "LDR R2, =0x2ED440\n"
209 "STR R0, [SP, #8]\n"
210 "SUB R0, R2, R0\n"
211 "STR R0, [SP, #0xC]\n"
212 "MOV R0, #0x22\n"
213 "STR R0, [SP, #0x18]\n"
214 "MOV R0, #0x7C\n"
215 "STR R0, [SP, #0x1C]\n"
216 "LDR R1, =0x2F5C00\n"
217 "LDR R0, =0x1CD\n"
218 "STR R1, [SP]\n"
219 "STR R0, [SP, #0x20]\n"
220 "MOV R0, #0x96\n"
221 "STR R2, [SP, #0x10]\n"
222 "STR R1, [SP, #0x14]\n"
223 "STR R0, [SP, #0x24]\n"
224 "STR R0, [SP, #0x28]\n"
225 "MOV R0, #0x64\n"
226 "STR R0, [SP, #0x2C]\n"
227 "MOV R0, #0\n"
228 "STR R0, [SP, #0x30]\n"
229 "STR R0, [SP, #0x34]\n"
230 "MOV R0, #0x10\n"
231 "STR R0, [SP, #0x5C]\n"
232 "MOV R0, #0x800\n"
233 "STR R0, [SP, #0x60]\n"
234 "MOV R0, #0xA0\n"
235 "STR R0, [SP, #0x64]\n"
236 "MOV R0, #0x280\n"
237 "STR R0, [SP, #0x68]\n"
238
239 "LDR R1, =sub_FF814278_my \n"
240 "MOV R2, #0\n"
241 "MOV R0, SP\n"
242 "BL sub_003F2778\n"
243 "ADD SP, SP, #0x74\n"
244 "LDR PC, [SP], #4\n"
245 );
246 }
247
248
249
250
251 void __attribute__((naked,noinline)) sub_FF814278_my( ) {
252 asm volatile (
253 "STMFD SP!, {R4,LR}\n"
254 "BL sub_FF810B50\n"
255 "BL sub_FF815164\n"
256 "CMP R0, #0\n"
257 "LDRLT R0, =0xFF81438C\n"
258 "BLLT _err_init_task \n"
259 "BL sub_FF813EB0\n"
260 "CMP R0, #0\n"
261 "LDRLT R0, =0xFF814394 \n"
262 "BLLT _err_init_task \n"
263 "LDR R0, =0xFF8143A4 \n"
264 "BL sub_FF813F98\n"
265 "CMP R0, #0\n"
266 "LDRLT R0, =0xFF8143AC \n"
267 "BLLT _err_init_task \n"
268 "LDR R0, =0xFF8143A4 \n"
269 "BL sub_FF8129B8\n"
270 "CMP R0, #0\n"
271 "LDRLT R0, =0xFF8143C0 \n"
272 "BLLT _err_init_task \n"
273 "BL sub_FF814B00\n"
274 "CMP R0, #0\n"
275 "LDRLT R0, =0xFF8143CC \n"
276 "BLLT _err_init_task \n"
277 "BL sub_FF8116B8\n"
278 "CMP R0, #0\n"
279 "LDRLT R0, =0xFF8143D8 \n"
280 "BLLT _err_init_task \n"
281 "LDMFD SP!, {R4,LR}\n"
282
283 "B sub_FF81A698_my \n"
284 );
285 }
286
287
288
289
290 void __attribute__((naked,noinline)) sub_FF81A698_my( ) {
291 asm volatile (
292 "STMFD SP!, {R4,LR}\n"
293 "BL sub_FF82EAD8\n"
294
295 "BL taskcreate_Startup_my \n"
296 "MOV R0, #0\n"
297 "LDMFD SP!, {R4,PC}\n"
298 );
299 }
300
301
302
303
304 void __attribute__((naked,noinline)) taskcreate_Startup_my( ) {
305 asm volatile (
306 "STMFD SP!, {R3-R7,LR}\n"
307 "BL sub_FF835B84\n"
308 "LDR R6, =0xC0220000\n"
309 "MOVS R4, R0\n"
310 "MOV R5, #1\n"
311 "BNE loc_FF81A6FC\n"
312 "BL sub_FF830534\n"
313 "CMP R0, #0\n"
314 "BEQ loc_FF81A6FC\n"
315 "LDR R0, [R6, #0xFC]\n"
316 "BIC R1, R5, R0\n"
317 "LDR R0, [R6, #0xF8]\n"
318 "BIC R0, R5, R0\n"
319 "ORRS R2, R0, R1\n"
320 "BNE loc_FF81A70C\n"
321 "BL sub_FF82E1A4\n"
322 "MOV R0, #0x44\n"
323 "STR R0, [R6, #0x12C]\n"
324 "BL sub_FF82E2B4\n"
325 "loc_FF81A6F8:\n"
326 "B loc_FF81A6F8\n"
327 "loc_FF81A6FC:\n"
328 "LDR R0, [R6, #0xF8]\n"
329 "LDR R1, [R6, #0xFC]\n"
330 "BIC R0, R5, R0\n"
331 "BIC R1, R5, R1\n"
332 "loc_FF81A70C:\n"
333 "MOV R3, #0\n"
334 "MOV R2, R4\n"
335
336 "BL sub_FF82EADC\n"
337 "BL sub_003F77E0\n"
338 "LDR R1, =0x34E000\n"
339 "MOV R0, #0\n"
340 "BL sub_FF8341C0\n"
341 "BL sub_003F79F8\n"
342 "MOV R3, #0\n"
343 "STR R3, [SP]\n"
344
345 "LDR R3, =task_Startup_my \n"
346 "MOV R2, #0\n"
347 "MOV R1, #0x19\n"
348 "LDR R0, =0xFF81A760\n"
349 "BL _CreateTask \n"
350 "MOV R0, #0\n"
351 "LDMFD SP!, {R3-R7,PC}\n"
352 );
353 }
354
355
356
357
358 void __attribute__((naked,noinline)) task_Startup_my( ) {
359 asm volatile (
360 "STMFD SP!, {R4,LR}\n"
361 "BL sub_FF8148B8\n"
362 "BL sub_FF82FC00\n"
363 "BL sub_FF82DE4C\n"
364 "BL sub_FF835BCC\n"
365 "BL sub_FF835DB8\n"
366 "BL sub_FF82CC48\n"
367 "BL sub_FF82D810\n"
368
369 "BL sub_FF835F34\n"
370 "BL sub_FF836100\n"
371 "BL sub_FF835EF8\n"
372 "BL sub_FF835DE8\n"
373 "BL sub_FF8340F4\n"
374 "BL sub_FF836108\n"
375 "BL CreateTask_spytask \n"
376
377 "BL taskcreatePhySw_my \n"
378 "BL sub_FF83235C\n"
379 "BL sub_FF836120\n"
380 "BL sub_FF82B9C8\n"
381 "BL sub_FF82C510\n"
382 "BL sub_FF835940\n"
383 "BL sub_FF82CB38\n"
384 "BL sub_FF82C4AC\n"
385 "BL sub_FF835F24\n"
386 "BL sub_FF836C78 \n"
387 "BL sub_FF82C470\n"
388 "LDMFD SP!, {R4,LR}\n"
389 "B sub_FF8149D8\n"
390 );
391 }
392
393
394
395
396 void __attribute__((naked,noinline)) taskcreatePhySw_my( ) {
397 asm volatile (
398 "STMFD SP!, {R3-R5,LR}\n"
399 "LDR R4, =0x1C18\n"
400 "LDR R0, [R4, #4]\n"
401 "CMP R0, #0\n"
402 "BNE loc_FF82E9B0\n"
403 "MOV R3, #0\n"
404 "STR R3, [SP]\n"
405
406 "LDR R3, =task_PhySw \n"
407
408 "MOV R2, #0x2000 \n"
409 "MOV R1, #0x17\n"
410 "LDR R0, =0xFF82EBD8\n"
411 "BL sub_003F7A50\n"
412 "STR R0, [R4, #4]\n"
413 "loc_FF82E9B0:\n"
414 "BL sub_FF87EE60\n"
415 "BL sub_FF830484\n"
416 "CMP R0, #0\n"
417 "BNE loc_FF82E9CC\n"
418 "LDR R1, =0x3129C\n"
419 "MOV R0, #0\n"
420 "BL sub_FF87EDD0\n"
421 "loc_FF82E9CC:\n"
422 "LDMFD SP!, {R3-R5,PC}\n"
423 );
424 }
425
426 void CreateTask_spytask() {
427
428 _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
429 };
430
431
432
433
434 void __attribute__((naked,noinline)) init_file_modules_task( ) {
435 asm volatile (
436 "STMFD SP!, {R4-R6,LR}\n"
437 "BL sub_FF8813CC\n"
438 "LDR R5, =0x5006\n"
439 "MOVS R4, R0\n"
440 "MOVNE R1, #0\n"
441 "MOVNE R0, R5\n"
442 "BLNE _PostLogicalEventToUI \n"
443 "BL sub_FF8813F8\n"
444 "BL core_spytask_can_start \n"
445 "CMP R4, #0\n"
446 "LDMNEFD SP!, {R4-R6,PC}\n"
447 "MOV R0, R5\n"
448 "LDMFD SP!, {R4-R6,LR}\n"
449 "MOV R1, #0\n"
450 "B _PostLogicalEventToUI \n"
451 );
452 }