This source file includes following definitions.
- filewritetask
- sub_FFA520F0_my
- sub_FFA52730_my
- sub_FFA5225C_my
1 #include "lolevel.h"
2 #include "platform.h"
3
4 typedef struct {
5 unsigned int address;
6 unsigned int length;
7 } cam_ptp_data_chunk;
8
9 #define MAX_CHUNKS_FOR_FWT 7
10
11
12
13
14
15
16
17 typedef struct
18 {
19 int unkn1;
20 int file_offset;
21 int full_size;
22 int unkn2, unkn3, unkn4;
23 cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_FWT];
24 int seek_flag;
25 char name[32];
26 } fwt_data_struct;
27 #define FWT_MUSTSEEK 2
28 #define FWT_SEEKMASK 0xffffffff
29
30 #include "../../../generic/filewrite.c"
31
32
33
34 void __attribute__((naked,noinline)) filewritetask( ) {
35 asm volatile (
36 " STMFD SP!, {R1-R7,LR} \n"
37 " LDR R7, =0x96B0 \n"
38 " MOV R6, #0 \n"
39 "loc_FFA52400:\n"
40 " LDR R0, [R7, #0x14] \n"
41 " MOV R2, #0 \n"
42 " ADD R1, SP, #8 \n"
43 " MOV R5, R7 \n"
44 " BL sub_003F7218 \n"
45 " CMP R0, #0 \n"
46 " LDRNE R1, =0x38E \n"
47 " LDRNE R0, =0xFFA52538 \n"
48 " BLNE _DebugAssert \n"
49 " LDR R0, [SP, #8] \n"
50 " LDR R1, [R0] \n"
51 " CMP R1, #0xB \n"
52 " ADDCC PC, PC, R1, LSL #2 \n"
53 " B loc_FFA52400 \n"
54 " B loc_FFA52508 \n"
55 " B loc_FFA52508 \n"
56 " B loc_FFA52508 \n"
57 " B loc_FFA52508 \n"
58 " B loc_FFA52508 \n"
59 " B loc_FFA52508 \n"
60 " B loc_FFA52508 \n"
61 " B loc_FFA52510 \n"
62 " B loc_FFA52464 \n"
63 " B loc_FFA524D4 \n"
64 " B loc_FFA524CC \n"
65 "loc_FFA52464:\n"
66 " STR R6, [SP] \n"
67 "loc_FFA52468:\n"
68 " LDR R0, [R5, #0x14] \n"
69 " MOV R1, SP \n"
70 " BL sub_003F745C \n"
71 " LDR R0, [SP] \n"
72 " CMP R0, #0 \n"
73 " BEQ loc_FFA52494 \n"
74 " LDR R0, [R5, #0x14] \n"
75 " MOV R2, #0 \n"
76 " ADD R1, SP, #4 \n"
77 " BL sub_003F7218 \n"
78 " B loc_FFA52468 \n"
79 "loc_FFA52494:\n"
80 " LDR R0, [R5, #8] \n"
81 " CMN R0, #1 \n"
82 " BEQ loc_FFA524C0 \n"
83 " BL fwt_close\n"
84 "loc_FFA524A4:\n"
85 " MVN R0, #0 \n"
86 " STR R0, [R5, #8] \n"
87 " LDR R0, =0x131D20 \n"
88 " STR R6, [R5, #4] \n"
89 " BL sub_FF86671C \n"
90 " MOV R1, #0 \n"
91 " BL sub_FF8647B8 \n"
92 "loc_FFA524C0:\n"
93 " LDR R0, [R5, #0x10] \n"
94 " BL sub_003F7704 \n"
95 " B loc_FFA52400 \n"
96 "loc_FFA524CC:\n"
97 " BL sub_FFA520F0_my \n"
98 " B loc_FFA52400 \n"
99 "loc_FFA524D4:\n"
100 " LDR R1, [R0, #4] \n"
101 " MOV R4, R0 \n"
102 " LDR R0, [R5, #8] \n"
103 " MOV R2, #0 \n"
104 " BL fwt_lseek\n"
105 " CMN R0, #1 \n"
106 " LDREQ R0, =0x9200013 \n"
107 " MOV R1, R4 \n"
108 " STREQ R0, [R4, #0x14] \n"
109 " MOVNE R0, #0 \n"
110 " MOVEQ R0, #7 \n"
111 " BL sub_FFA52034 \n"
112 " B loc_FFA52400 \n"
113 "loc_FFA52508:\n"
114 " BL sub_FFA52730_my \n"
115 " B loc_FFA52400 \n"
116 "loc_FFA52510:\n"
117 " BL sub_FFA5225C_my \n"
118 " B loc_FFA52400 \n"
119 );
120 }
121
122
123
124
125 void __attribute__((naked,noinline)) sub_FFA520F0_my( ) {
126 asm volatile (
127 " STMFD SP!, {R4-R9,LR} \n"
128 " LDR R6, =0x96B0 \n"
129 " MOV R4, R0 \n"
130
131 "STMFD SP!, {R4-R12,LR}\n"
132
133 "BL filewrite_main_hook\n"
134 "LDMFD SP!, {R4-R12,LR}\n"
135
136 " LDR R0, [R6, #4] \n"
137 " SUB SP, SP, #0x3C \n"
138 " CMP R0, #0 \n"
139 " BNE loc_FFA5222C \n"
140 " ADD R0, R4, #0x54 \n"
141 " BL sub_FF86671C \n"
142 " MOV R1, #0 \n"
143 " BL sub_FF86472C \n"
144 " LDR R0, [R4, #0x10] \n"
145 " BL sub_FF8636F0 \n"
146 " LDR R0, [R4, #0x50] \n"
147 " LDR R9, =0x1B6 \n"
148 " CMP R0, #1 \n"
149 " LDREQ R0, [R4, #0xC] \n"
150 " ADD R7, R4, #0x54 \n"
151 " ORREQ R0, R0, #0x8000 \n"
152 " STREQ R0, [R4, #0xC] \n"
153 " LDR R8, [R4, #0xC] \n"
154 " LDR R5, [R4, #0x10] \n"
155 " MOV R2, R9 \n"
156 " MOV R1, R8 \n"
157 " MOV R0, R7 \n"
158 " BL fwt_open\n"
159 " CMN R0, #1 \n"
160 " BNE loc_FFA521BC \n"
161 " MOV R0, R7 \n"
162 " BL sub_FF83083C \n"
163 " MOV R2, #0xF \n"
164 " MOV R1, R7 \n"
165 " ADD R0, SP, #4 \n"
166 " BL sub_003FC17C \n"
167 " MOV R0, #0 \n"
168 " LDR R1, =0x41FF \n"
169 " STRB R0, [SP, #0x13] \n"
170 " STR R1, [SP, #0x24] \n"
171 " MOV R1, #0x10 \n"
172 " STR R0, [SP, #0x2C] \n"
173 " STR R1, [SP, #0x28] \n"
174 " ADD R1, SP, #0x24 \n"
175 " ADD R0, SP, #4 \n"
176 " STR R5, [SP, #0x30] \n"
177 " STR R5, [SP, #0x34] \n"
178 " STR R5, [SP, #0x38] \n"
179 " BL sub_FF863FF8 \n"
180 " MOV R2, R9 \n"
181 " MOV R1, R8 \n"
182 " MOV R0, R7 \n"
183 " BL sub_FF830154 \n"
184 "loc_FFA521BC:\n"
185 " CMN R0, #1 \n"
186 " MOV R5, R0 \n"
187 " STR R0, [R6, #8] \n"
188 " BNE loc_FFA521F8 \n"
189 " ADD R0, R4, #0x54 \n"
190 " BL sub_FF86671C \n"
191 " LDR R1, [R6, #0x1C] \n"
192 " BL sub_FF8647B8 \n"
193 " LDR R1, [R6, #0x18] \n"
194 " CMP R1, #0 \n"
195 " BEQ loc_FFA52254 \n"
196 " ADD SP, SP, #0x3C \n"
197 " LDMFD SP!, {R4-R9,LR} \n"
198 " LDR R0, =0x9200001 \n"
199 " BX R1 \n"
200 "loc_FFA521F8:\n"
201 " MOV R0, #1 \n"
202 " STR R0, [R6, #4] \n"
203 " LDR R0, =0x131D20 \n"
204 " MOV R2, #0x20 \n"
205 " ADD R1, R4, #0x54 \n"
206 " BL sub_003FC364 \n"
207
208 "LDR R3, =current_write_ignored\n"
209 "LDR R3, [R3]\n"
210 "CMP R3, #0\n"
211 "BNE loc_FFA5222C\n"
212
213 " LDR R1, [R4, #8] \n"
214 " MOV R0, R5 \n"
215 " BL sub_FF830430 \n"
216 " CMP R0, #0 \n"
217 " MOVEQ R1, R4 \n"
218 " MOVEQ R0, #7 \n"
219 " BEQ loc_FFA52250 \n"
220 "loc_FFA5222C:\n"
221 " LDR R0, [R4, #0x50] \n"
222 " CMP R0, #2 \n"
223 " BEQ loc_FFA52248 \n"
224 " LDR R0, [R4, #4] \n"
225 " CMP R0, #0 \n"
226 " MOVEQ R1, R4 \n"
227 " BEQ loc_FFA52250 \n"
228 "loc_FFA52248:\n"
229 " MOV R1, R4 \n"
230 " MOV R0, #9 \n"
231 "loc_FFA52250:\n"
232 " BL sub_FFA52034 \n"
233 "loc_FFA52254:\n"
234 " ADD SP, SP, #0x3C \n"
235 " LDMFD SP!, {R4-R9,PC} \n"
236 );
237 }
238
239
240
241
242 void __attribute__((naked,noinline)) sub_FFA52730_my( ) {
243 asm volatile (
244 " STMFD SP!, {R4-R10,LR} \n"
245 " MOV R5, R0 \n"
246 " LDR R0, [R0] \n"
247 " CMP R0, #6 \n"
248 " BHI loc_FFA5275C \n"
249 " ADD R0, R5, R0, LSL #3 \n"
250 " LDR R8, [R0, #0x18]! \n"
251 " LDR R7, [R0, #4] \n"
252 " CMP R7, #0 \n"
253 " BNE loc_FFA52774 \n"
254 " B loc_FFA52768 \n"
255 "loc_FFA5275C:\n"
256 " LDR R1, =0x2DD \n"
257 " LDR R0, =0xFFA52538 \n"
258 " BL sub_003F6AFC \n"
259 "loc_FFA52768:\n"
260 " MOV R1, R5 \n"
261 " MOV R0, #7 \n"
262 " B loc_FFA52808 \n"
263 "loc_FFA52774:\n"
264 " LDR R9, =0x96B0 \n"
265 " MOV R4, R7 \n"
266 "loc_FFA5277C:\n"
267 " LDR R0, [R5, #4] \n"
268 " CMP R4, #0x1000000 \n"
269 " MOVLS R6, R4 \n"
270 " MOVHI R6, #0x1000000 \n"
271 " BIC R1, R0, #0xFF000000 \n"
272 " CMP R1, #0 \n"
273 " BICNE R0, R0, #0xFF000000 \n"
274 " RSBNE R0, R0, #0x1000000 \n"
275 " CMPNE R6, R0 \n"
276 " MOVHI R6, R0 \n"
277 " LDR R0, [R9, #8] \n"
278 " MOV R2, R6 \n"
279 " MOV R1, R8 \n"
280 " BL fwt_write\n"
281 " LDR R1, [R5, #4] \n"
282 " CMP R6, R0 \n"
283 " ADD R1, R1, R0 \n"
284 " STR R1, [R5, #4] \n"
285 " BEQ loc_FFA527DC \n"
286 " CMN R0, #1 \n"
287 " LDRNE R0, =0x9200015 \n"
288 " LDREQ R0, =0x9200005 \n"
289 " STR R0, [R5, #0x14] \n"
290 " B loc_FFA52768 \n"
291 "loc_FFA527DC:\n"
292 " SUB R4, R4, R0 \n"
293 " CMP R4, R7 \n"
294 " ADD R8, R8, R0 \n"
295 " MOVCS R1, #0x308 \n"
296 " LDRCS R0, =0xFFA52538 \n"
297 " BLCS sub_003F6AFC \n"
298 " CMP R4, #0 \n"
299 " BNE loc_FFA5277C \n"
300 " LDR R0, [R5] \n"
301 " MOV R1, R5 \n"
302 " ADD R0, R0, #1 \n"
303 "loc_FFA52808:\n"
304 " LDMFD SP!, {R4-R10,LR} \n"
305 " B sub_FFA52034 \n"
306 ".ltorg\n"
307 );
308 }
309
310
311
312
313 void __attribute__((naked,noinline)) sub_FFA5225C_my( ) {
314 asm volatile (
315 " STMFD SP!, {R4-R6,LR} \n"
316 " MOV R4, R0 \n"
317 " LDR R0, [R0, #0x50] \n"
318 " LDR R5, =0x96B0 \n"
319 " CMP R0, #3 \n"
320 " SUB SP, SP, #0x38 \n"
321 " BEQ loc_FFA523D4 \n"
322 " LDR R0, [R5, #8] \n"
323 " CMN R0, #1 \n"
324 " BEQ loc_FFA522B0 \n"
325 " LDR R1, [R4, #0xC] \n"
326 " LDR R6, =0x9200003 \n"
327 " TST R1, #0x8000 \n"
328 " BEQ loc_FFA5229C \n"
329
330 "LDR R3, =current_write_ignored\n"
331 "LDR R3, [R3]\n"
332 "CMP R3, #0\n"
333 "BNE loc_FFA5229C\n"
334
335 " BL sub_FF83015C \n"
336 " B loc_FFA522A0 \n"
337 "loc_FFA5229C:\n"
338 " BL fwt_close\n"
339 "loc_FFA522A0:\n"
340 " CMP R0, #0 \n"
341 " MVN R0, #0 \n"
342 " STRNE R6, [R4, #0x14] \n"
343 " STR R0, [R5, #8] \n"
344 "loc_FFA522B0:\n"
345 " LDR R0, [R4, #0x14] \n"
346 " TST R0, #1 \n"
347 " BNE loc_FFA523B8 \n"
348 " LDR R0, [R4, #0xC] \n"
349 " TST R0, #8 \n"
350 " BNE loc_FFA522D4 \n"
351 " LDR R0, [R4, #0x50] \n"
352 " CMP R0, #3 \n"
353 " BNE loc_FFA52304 \n"
354 "loc_FFA522D4:\n"
355 " ADD R1, SP, #0x20 \n"
356 " ADD R0, R4, #0x54 \n"
357 " BL sub_FF863F40 \n"
358 " CMP R0, #0 \n"
359 " LDREQ R1, =0x346 \n"
360 " LDREQ R0, =0xFFA52538 \n"
361 " BLEQ sub_003F6AFC \n"
362 " LDR R0, [SP, #0x28] \n"
363 " LDR R1, [R4, #4] \n"
364 " ADD R0, R0, R1 \n"
365 " STR R0, [SP, #0x28] \n"
366 " B loc_FFA52334 \n"
367 "loc_FFA52304:\n"
368 " LDR R0, =0x81FF \n"
369 " STR R0, [SP, #0x20] \n"
370 " MOV R0, #0x20 \n"
371 " STR R0, [SP, #0x24] \n"
372 " LDR R0, [R4, #4] \n"
373 " STR R0, [SP, #0x28] \n"
374 " LDR R0, [R4, #0x10] \n"
375 " STR R0, [SP, #0x2C] \n"
376 " LDR R0, [R4, #0x10] \n"
377 " STR R0, [SP, #0x30] \n"
378 " LDR R0, [R4, #0x10] \n"
379 " STR R0, [SP, #0x34] \n"
380 "loc_FFA52334:\n"
381 " LDR R0, [R4, #0x50] \n"
382 " CMP R0, #2 \n"
383 " BEQ loc_FFA523B8 \n"
384 " ADD R1, SP, #0x20 \n"
385 " ADD R0, R4, #0x54 \n"
386 " BL sub_FF863FF8 \n"
387 " LDR R0, [R4, #0x50] \n"
388 " CMP R0, #1 \n"
389 " BNE loc_FFA523B8 \n"
390 " MOV R2, #0x20 \n"
391 " ADD R1, R4, #0x54 \n"
392 " MOV R0, SP \n"
393 " BL sub_003FC364 \n"
394 " MOV R0, SP \n"
395 " BL sub_FF812E38 \n"
396 " MOV R2, #0x54 \n"
397 " ADD R0, R0, SP \n"
398 " MOV R1, #0x4D \n"
399 " STRB R2, [R0, #-3] \n"
400 " STRB R1, [R0, #-2] \n"
401 " MOV R1, #0x50 \n"
402 " STRB R1, [R0, #-1] \n"
403 " MOV R1, SP \n"
404 " ADD R0, R4, #0x54 \n"
405 " BL sub_FF863878 \n"
406 " CMP R0, #0 \n"
407 " MOVEQ R1, #0x164 \n"
408 " LDREQ R0, =0xFFA52538 \n"
409 " BLEQ sub_003F6AFC \n"
410 " MOV R0, SP \n"
411 " BL sub_FF864454 \n"
412 " ADD R0, R4, #0x54 \n"
413 " BL sub_FF864454 \n"
414 "loc_FFA523B8:\n"
415 " ADD R0, R4, #0x54 \n"
416 " BL sub_FF86671C \n"
417 " LDR R1, [R5, #0x1C] \n"
418 " BL sub_FF8647B8 \n"
419 " MOV R0, #0 \n"
420 " STR R0, [R5, #4] \n"
421 " B loc_FFA523DC \n"
422 "loc_FFA523D4:\n"
423 " LDR R0, [R5, #0x1C] \n"
424 " BLX R0 \n"
425 "loc_FFA523DC:\n"
426 " LDR R1, [R5, #0x18] \n"
427 " CMP R1, #0 \n"
428 " LDRNE R0, [R4, #0x14] \n"
429 " BLXNE R1 \n"
430 " ADD SP, SP, #0x38 \n"
431 " LDMFD SP!, {R4-R6,PC} \n"
432 );
433 }