This source file includes following definitions.
- filewritetask
- sub_FFA52B24_my
- sub_FFA53164_my
- sub_FFA52C90_my
1 #include "lolevel.h"
2 #include "platform.h"
3
4 typedef struct {
5 unsigned int address;
6 unsigned int length;
7 } cam_ptp_data_chunk;
8
9 #define MAX_CHUNKS_FOR_FWT 7
10
11
12
13
14
15
16
17 typedef struct
18 {
19 int unkn1;
20 int file_offset;
21 int full_size;
22 int unkn2, unkn3, unkn4;
23 cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_FWT];
24 int seek_flag;
25 char name[32];
26 } fwt_data_struct;
27 #define FWT_MUSTSEEK 2
28 #define FWT_SEEKMASK 0xffffffff
29
30 #include "../../../generic/filewrite.c"
31
32
33
34 void __attribute__((naked,noinline)) filewritetask( ) {
35 asm volatile (
36 " STMFD SP!, {R1-R7,LR} \n"
37 " LDR R7, =0x96D4 \n"
38 " MOV R6, #0 \n"
39 "loc_FFA52E34:\n"
40 " LDR R0, [R7, #0x14] \n"
41 " MOV R2, #0 \n"
42 " ADD R1, SP, #8 \n"
43 " MOV R5, R7 \n"
44 " BL sub_003F7218 \n"
45 " CMP R0, #0 \n"
46 " LDRNE R1, =0x38E \n"
47 " LDRNE R0, =0xFFA52F6C \n"
48 " BLNE sub_003F6AFC \n"
49 " LDR R0, [SP, #8] \n"
50 " LDR R1, [R0] \n"
51 " CMP R1, #0xB \n"
52 " ADDCC PC, PC, R1, LSL #2 \n"
53 " B loc_FFA52E34 \n"
54 " B loc_FFA52F3C \n"
55 " B loc_FFA52F3C \n"
56 " B loc_FFA52F3C \n"
57 " B loc_FFA52F3C \n"
58 " B loc_FFA52F3C \n"
59 " B loc_FFA52F3C \n"
60 " B loc_FFA52F3C \n"
61 " B loc_FFA52F44 \n"
62 " B loc_FFA52E98 \n"
63 " B loc_FFA52F08 \n"
64 " B loc_FFA52F00 \n"
65 "loc_FFA52E98:\n"
66 " STR R6, [SP] \n"
67 "loc_FFA52E9C:\n"
68 " LDR R0, [R5, #0x14] \n"
69 " MOV R1, SP \n"
70 " BL sub_003F745C \n"
71 " LDR R0, [SP] \n"
72 " CMP R0, #0 \n"
73 " BEQ loc_FFA52EC8 \n"
74 " LDR R0, [R5, #0x14] \n"
75 " MOV R2, #0 \n"
76 " ADD R1, SP, #4 \n"
77 " BL sub_003F7218 \n"
78 " B loc_FFA52E9C \n"
79 "loc_FFA52EC8:\n"
80 " LDR R0, [R5, #8] \n"
81 " CMN R0, #1 \n"
82 " BEQ loc_FFA52EF4 \n"
83 " BL fwt_close\n"
84 " MVN R0, #0 \n"
85 " STR R0, [R5, #8] \n"
86 " LDR R0, =0x132140 \n"
87 " STR R6, [R5, #4] \n"
88 " BL sub_FF86671C \n"
89 " MOV R1, #0 \n"
90 " BL sub_FF8647B8 \n"
91 "loc_FFA52EF4:\n"
92 " LDR R0, [R5, #0x10] \n"
93 " BL sub_003F7704 \n"
94 " B loc_FFA52E34 \n"
95 "loc_FFA52F00:\n"
96 " BL sub_FFA52B24_my \n"
97 " B loc_FFA52E34 \n"
98 "loc_FFA52F08:\n"
99 " LDR R1, [R0, #4] \n"
100 " MOV R4, R0 \n"
101 " LDR R0, [R5, #8] \n"
102 " MOV R2, #0 \n"
103 " BL fwt_lseek\n"
104 " CMN R0, #1 \n"
105 " LDREQ R0, =0x9200013 \n"
106 " MOV R1, R4 \n"
107 " STREQ R0, [R4, #0x14] \n"
108 " MOVNE R0, #0 \n"
109 " MOVEQ R0, #7 \n"
110 " BL sub_FFA52A68 \n"
111 " B loc_FFA52E34 \n"
112 "loc_FFA52F3C:\n"
113 " BL sub_FFA53164_my \n"
114 " B loc_FFA52E34 \n"
115 "loc_FFA52F44:\n"
116 " BL sub_FFA52C90_my \n"
117 " B loc_FFA52E34 \n"
118 );
119 }
120
121
122 void __attribute__((naked,noinline)) sub_FFA52B24_my( ) {
123 asm volatile (
124 " STMFD SP!, {R4-R9,LR} \n"
125 " LDR R6, =0x96D4 \n"
126 " MOV R4, R0 \n"
127
128 "STMFD SP!, {R4-R12,LR}\n"
129
130 "BL filewrite_main_hook\n"
131 "LDMFD SP!, {R4-R12,LR}\n"
132
133 " LDR R0, [R6, #4] \n"
134 " SUB SP, SP, #0x3C \n"
135 " CMP R0, #0 \n"
136 " BNE loc_FFA52C60 \n"
137 " ADD R0, R4, #0x54 \n"
138 " BL sub_FF86671C \n"
139 " MOV R1, #0 \n"
140 " BL sub_FF86472C \n"
141 " LDR R0, [R4, #0x10] \n"
142 " BL sub_FF8636F0 \n"
143 " LDR R0, [R4, #0x50] \n"
144 " LDR R9, =0x1B6 \n"
145 " CMP R0, #1 \n"
146 " LDREQ R0, [R4, #0xC] \n"
147 " ADD R7, R4, #0x54 \n"
148 " ORREQ R0, R0, #0x8000 \n"
149 " STREQ R0, [R4, #0xC] \n"
150 " LDR R8, [R4, #0xC] \n"
151 " LDR R5, [R4, #0x10] \n"
152 " MOV R2, R9 \n"
153 " MOV R1, R8 \n"
154 " MOV R0, R7 \n"
155 " BL fwt_open\n"
156 " CMN R0, #1 \n"
157 " BNE loc_FFA52BF0 \n"
158 " MOV R0, R7 \n"
159 " BL sub_FF83083C \n"
160 " MOV R2, #0xF \n"
161 " MOV R1, R7 \n"
162 " ADD R0, SP, #4 \n"
163 " BL sub_003FC17C \n"
164 " MOV R0, #0 \n"
165 " LDR R1, =0x41FF \n"
166 " STRB R0, [SP, #0x13] \n"
167 " STR R1, [SP, #0x24] \n"
168 " MOV R1, #0x10 \n"
169 " STR R0, [SP, #0x2C] \n"
170 " STR R1, [SP, #0x28] \n"
171 " ADD R1, SP, #0x24 \n"
172 " ADD R0, SP, #4 \n"
173 " STR R5, [SP, #0x30] \n"
174 " STR R5, [SP, #0x34] \n"
175 " STR R5, [SP, #0x38] \n"
176 " BL sub_FF863FF8 \n"
177 " MOV R2, R9 \n"
178 " MOV R1, R8 \n"
179 " MOV R0, R7 \n"
180 " BL sub_FF830154 \n"
181 "loc_FFA52BF0:\n"
182 " CMN R0, #1 \n"
183 " MOV R5, R0 \n"
184 " STR R0, [R6, #8] \n"
185 " BNE loc_FFA52C2C \n"
186 " ADD R0, R4, #0x54 \n"
187 " BL sub_FF86671C \n"
188 " LDR R1, [R6, #0x1C] \n"
189 " BL sub_FF8647B8 \n"
190 " LDR R1, [R6, #0x18] \n"
191 " CMP R1, #0 \n"
192 " BEQ loc_FFA52C88 \n"
193 " ADD SP, SP, #0x3C \n"
194 " LDMFD SP!, {R4-R9,LR} \n"
195 " LDR R0, =0x9200001 \n"
196 " BX R1 \n"
197 "loc_FFA52C2C:\n"
198 " MOV R0, #1 \n"
199 " STR R0, [R6, #4] \n"
200 " LDR R0, =0x132140 \n"
201 " MOV R2, #0x20 \n"
202 " ADD R1, R4, #0x54 \n"
203 " BL sub_003FC364 \n"
204
205 "LDR R3, =current_write_ignored\n"
206 "LDR R3, [R3]\n"
207 "CMP R3, #0\n"
208 "BNE loc_FFA52C60\n"
209
210 " LDR R1, [R4, #8] \n"
211 " MOV R0, R5 \n"
212 " BL sub_FF830430 \n"
213 " CMP R0, #0 \n"
214 " MOVEQ R1, R4 \n"
215 " MOVEQ R0, #7 \n"
216 " BEQ loc_FFA52C84 \n"
217 "loc_FFA52C60:\n"
218 " LDR R0, [R4, #0x50] \n"
219 " CMP R0, #2 \n"
220 " BEQ loc_FFA52C7C \n"
221 " LDR R0, [R4, #4] \n"
222 " CMP R0, #0 \n"
223 " MOVEQ R1, R4 \n"
224 " BEQ loc_FFA52C84 \n"
225 "loc_FFA52C7C:\n"
226 " MOV R1, R4 \n"
227 " MOV R0, #9 \n"
228 "loc_FFA52C84:\n"
229 " BL sub_FFA52A68 \n"
230 "loc_FFA52C88:\n"
231 " ADD SP, SP, #0x3C \n"
232 " LDMFD SP!, {R4-R9,PC} \n"
233 );
234 }
235
236
237 void __attribute__((naked,noinline)) sub_FFA53164_my( ) {
238 asm volatile (
239 " STMFD SP!, {R4-R10,LR} \n"
240 " MOV R5, R0 \n"
241 " LDR R0, [R0] \n"
242 " CMP R0, #6 \n"
243 " BHI loc_FFA53190 \n"
244 " ADD R0, R5, R0, LSL #3 \n"
245 " LDR R8, [R0, #0x18]! \n"
246 " LDR R7, [R0, #4] \n"
247 " CMP R7, #0 \n"
248 " BNE loc_FFA531A8 \n"
249 " B loc_FFA5319C \n"
250 "loc_FFA53190:\n"
251 " LDR R1, =0x2DD \n"
252 " LDR R0, =0xFFA52F6C \n"
253 " BL sub_003F6AFC \n"
254 "loc_FFA5319C:\n"
255 " MOV R1, R5 \n"
256 " MOV R0, #7 \n"
257 " B loc_FFA5323C \n"
258 "loc_FFA531A8:\n"
259 " LDR R9, =0x96D4 \n"
260 " MOV R4, R7 \n"
261 "loc_FFA531B0:\n"
262 " LDR R0, [R5, #4] \n"
263 " CMP R4, #0x1000000 \n"
264 " MOVLS R6, R4 \n"
265 " MOVHI R6, #0x1000000 \n"
266 " BIC R1, R0, #0xFF000000 \n"
267 " CMP R1, #0 \n"
268 " BICNE R0, R0, #0xFF000000 \n"
269 " RSBNE R0, R0, #0x1000000 \n"
270 " CMPNE R6, R0 \n"
271 " MOVHI R6, R0 \n"
272 " LDR R0, [R9, #8] \n"
273 " MOV R2, R6 \n"
274 " MOV R1, R8 \n"
275 " BL fwt_write\n"
276 " LDR R1, [R5, #4] \n"
277 " CMP R6, R0 \n"
278 " ADD R1, R1, R0 \n"
279 " STR R1, [R5, #4] \n"
280 " BEQ loc_FFA53210 \n"
281 " CMN R0, #1 \n"
282 " LDRNE R0, =0x9200015 \n"
283 " LDREQ R0, =0x9200005 \n"
284 " STR R0, [R5, #0x14] \n"
285 " B loc_FFA5319C \n"
286 "loc_FFA53210:\n"
287 " SUB R4, R4, R0 \n"
288 " CMP R4, R7 \n"
289 " ADD R8, R8, R0 \n"
290 " MOVCS R1, #0x308 \n"
291 " LDRCS R0, =0xFFA52F6C \n"
292 " BLCS sub_003F6AFC \n"
293 " CMP R4, #0 \n"
294 " BNE loc_FFA531B0 \n"
295 " LDR R0, [R5] \n"
296 " MOV R1, R5 \n"
297 " ADD R0, R0, #1 \n"
298 "loc_FFA5323C:\n"
299 " LDMFD SP!, {R4-R10,LR} \n"
300 " B sub_FFA52A68 \n"
301 ".ltorg\n"
302 );
303 }
304
305
306 void __attribute__((naked,noinline)) sub_FFA52C90_my( ) {
307 asm volatile (
308 " STMFD SP!, {R4-R6,LR} \n"
309 " MOV R4, R0 \n"
310 " LDR R0, [R0, #0x50] \n"
311 " LDR R5, =0x96D4 \n"
312 " CMP R0, #3 \n"
313 " SUB SP, SP, #0x38 \n"
314 " BEQ loc_FFA52E08 \n"
315 " LDR R0, [R5, #8] \n"
316 " CMN R0, #1 \n"
317 " BEQ loc_FFA52CE4 \n"
318 " LDR R1, [R4, #0xC] \n"
319 " LDR R6, =0x9200003 \n"
320 " TST R1, #0x8000 \n"
321 " BEQ loc_FFA52CD0 \n"
322
323 "LDR R3, =current_write_ignored\n"
324 "LDR R3, [R3]\n"
325 "CMP R3, #0\n"
326 "BNE loc_FFA52CD0\n"
327
328 " BL sub_FF83015C \n"
329 " B loc_FFA52CD4 \n"
330 "loc_FFA52CD0:\n"
331 " BL fwt_close\n"
332 "loc_FFA52CD4:\n"
333 " CMP R0, #0 \n"
334 " MVN R0, #0 \n"
335 " STRNE R6, [R4, #0x14] \n"
336 " STR R0, [R5, #8] \n"
337 "loc_FFA52CE4:\n"
338 " LDR R0, [R4, #0x14] \n"
339 " TST R0, #1 \n"
340 " BNE loc_FFA52DEC \n"
341 " LDR R0, [R4, #0xC] \n"
342 " TST R0, #8 \n"
343 " BNE loc_FFA52D08 \n"
344 " LDR R0, [R4, #0x50] \n"
345 " CMP R0, #3 \n"
346 " BNE loc_FFA52D38 \n"
347 "loc_FFA52D08:\n"
348 " ADD R1, SP, #0x20 \n"
349 " ADD R0, R4, #0x54 \n"
350 " BL sub_FF863F40 \n"
351 " CMP R0, #0 \n"
352 " LDREQ R1, =0x346 \n"
353 " LDREQ R0, =0xFFA52F6C \n"
354 " BLEQ sub_003F6AFC \n"
355 " LDR R0, [SP, #0x28] \n"
356 " LDR R1, [R4, #4] \n"
357 " ADD R0, R0, R1 \n"
358 " STR R0, [SP, #0x28] \n"
359 " B loc_FFA52D68 \n"
360 "loc_FFA52D38:\n"
361 " LDR R0, =0x81FF \n"
362 " STR R0, [SP, #0x20] \n"
363 " MOV R0, #0x20 \n"
364 " STR R0, [SP, #0x24] \n"
365 " LDR R0, [R4, #4] \n"
366 " STR R0, [SP, #0x28] \n"
367 " LDR R0, [R4, #0x10] \n"
368 " STR R0, [SP, #0x2C] \n"
369 " LDR R0, [R4, #0x10] \n"
370 " STR R0, [SP, #0x30] \n"
371 " LDR R0, [R4, #0x10] \n"
372 " STR R0, [SP, #0x34] \n"
373 "loc_FFA52D68:\n"
374 " LDR R0, [R4, #0x50] \n"
375 " CMP R0, #2 \n"
376 " BEQ loc_FFA52DEC \n"
377 " ADD R1, SP, #0x20 \n"
378 " ADD R0, R4, #0x54 \n"
379 " BL sub_FF863FF8 \n"
380 " LDR R0, [R4, #0x50] \n"
381 " CMP R0, #1 \n"
382 " BNE loc_FFA52DEC \n"
383 " MOV R2, #0x20 \n"
384 " ADD R1, R4, #0x54 \n"
385 " MOV R0, SP \n"
386 " BL sub_003FC364 \n"
387 " MOV R0, SP \n"
388 " BL sub_FF812E38 \n"
389 " MOV R2, #0x54 \n"
390 " ADD R0, R0, SP \n"
391 " MOV R1, #0x4D \n"
392 " STRB R2, [R0, #-3] \n"
393 " STRB R1, [R0, #-2] \n"
394 " MOV R1, #0x50 \n"
395 " STRB R1, [R0, #-1] \n"
396 " MOV R1, SP \n"
397 " ADD R0, R4, #0x54 \n"
398 " BL sub_FF863878 \n"
399 " CMP R0, #0 \n"
400 " MOVEQ R1, #0x164 \n"
401 " LDREQ R0, =0xFFA52F6C \n"
402 " BLEQ sub_003F6AFC \n"
403 " MOV R0, SP \n"
404 " BL sub_FF864454 \n"
405 " ADD R0, R4, #0x54 \n"
406 " BL sub_FF864454 \n"
407 "loc_FFA52DEC:\n"
408 " ADD R0, R4, #0x54 \n"
409 " BL sub_FF86671C \n"
410 " LDR R1, [R5, #0x1C] \n"
411 " BL sub_FF8647B8 \n"
412 " MOV R0, #0 \n"
413 " STR R0, [R5, #4] \n"
414 " B loc_FFA52E10 \n"
415 "loc_FFA52E08:\n"
416 " LDR R0, [R5, #0x1C] \n"
417 " BLX R0 \n"
418 "loc_FFA52E10:\n"
419 " LDR R1, [R5, #0x18] \n"
420 " CMP R1, #0 \n"
421 " LDRNE R0, [R4, #0x14] \n"
422 " BLXNE R1 \n"
423 " ADD SP, SP, #0x38 \n"
424 " LDMFD SP!, {R4-R6,PC} \n"
425 );
426 }