This source file includes following definitions.
- filewritetask
- sub_FF3C00C0_my
- sub_FF3C0780_my
- sub_FF3C024C_my
1
2
3
4
5 #include "lolevel.h"
6 #include "platform.h"
7
8 typedef struct {
9 unsigned int address;
10 unsigned int length;
11 } cam_ptp_data_chunk;
12
13 #define MAX_CHUNKS_FOR_FWT 7
14
15
16
17
18
19
20
21
22
23 typedef struct
24 {
25 int unkn1;
26 int file_offset;
27 int full_size;
28 int unkn2, unkn3;
29 cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_FWT];
30 int seek_flag;
31 int unkn4, unkn5;
32 char name[32];
33 } fwt_data_struct;
34
35
36
37
38
39 #define FWT_MUSTSEEK 0x40
40 #define FWT_SEEKMASK 0x40
41
42 #include "../../../generic/filewrite.c"
43
44
45
46
47
48
49 void __attribute__((naked,noinline)) filewritetask() {
50 asm volatile (
51 " STMFD SP!, {R1-R7,LR} \n"
52 " LDR R5, =0x11620 \n"
53 " MOV R6, #0 \n"
54
55 "loc_FF3C03E0:\n"
56 " LDR R0, [R5, #0x10] \n"
57 " MOV R2, #0 \n"
58 " ADD R1, SP, #8 \n"
59 " BL sub_0068BDE4 /*_ReceiveMessageQueue*/ \n"
60 " CMP R0, #0 \n"
61 " LDRNE R1, =0x3EF \n"
62 " LDRNE R0, =0xFF3C05A0 /*'dwFWrite.c'*/ \n"
63 " BLNE _DebugAssert \n"
64 " LDR R0, [SP, #8] \n"
65 " LDR R1, [R0] \n"
66 " CMP R1, #0xD \n"
67 " ADDCC PC, PC, R1, LSL#2 \n"
68 " B loc_FF3C03E0 \n"
69 " B loc_FF3C0568 \n"
70 " B loc_FF3C0568 \n"
71 " B loc_FF3C0568 \n"
72 " B loc_FF3C0568 \n"
73 " B loc_FF3C0568 \n"
74 " B loc_FF3C0568 \n"
75 " B loc_FF3C0568 \n"
76 " B loc_FF3C0570 \n"
77 " B loc_FF3C0448 \n"
78 " B loc_FF3C04E4 \n"
79 " B loc_FF3C0514 \n"
80 " B loc_FF3C04B0 \n"
81 " B loc_FF3C04DC \n"
82
83 "loc_FF3C0448:\n"
84 " MOV R4, R5 \n"
85 " STR R6, [SP] \n"
86
87 "loc_FF3C0450:\n"
88 " LDR R0, [R4, #0x10] \n"
89 " MOV R1, SP \n"
90 " BL sub_0068C028 /*_GetNumberOfPostedMessages*/ \n"
91 " LDR R0, [SP] \n"
92 " CMP R0, #0 \n"
93 " BEQ loc_FF3C047C \n"
94 " LDR R0, [R4, #0x10] \n"
95 " MOV R2, #0 \n"
96 " ADD R1, SP, #4 \n"
97 " BL sub_0068BDE4 /*_ReceiveMessageQueue*/ \n"
98 " B loc_FF3C0450 \n"
99
100 "loc_FF3C047C:\n"
101 " LDR R0, [R4, #4] \n"
102 " CMN R0, #1 \n"
103 " BEQ loc_FF3C04A4 \n"
104 " BL fwt_close \n"
105 " MVN R0, #0 \n"
106 " STR R0, [R4, #4] \n"
107 " LDR R0, =0x25B870 \n"
108 " BL sub_FF0ACBDC \n"
109 " MOV R1, #0 \n"
110 " BL sub_FF0AAB00 \n"
111
112 "loc_FF3C04A4:\n"
113 " LDR R0, [R4, #0xC] \n"
114 " BL _GiveSemaphore \n"
115 " B loc_FF3C03E0 \n"
116
117 "loc_FF3C04B0:\n"
118 " MOV R4, R0 \n"
119 " ADD R0, R0, #0x58 \n"
120 " BL sub_FF0ACBDC \n"
121 " MOV R1, #0 \n"
122 " BL sub_FF0AA9C4 \n"
123 " LDR R0, [R4, #0xC] \n"
124 " BL sub_FF0A98A0 \n"
125 " ADD R0, R4, #0x58 \n"
126
127
128 " LDR R3, =ignore_current_write\n"
129 " LDR R3, [R3]\n"
130 " CMP R3, #0\n"
131 " BNE loc_A\n"
132
133 " BL sub_FF0358B4 \n"
134 " ADD R0, R4, #0x58 \n"
135 " B loc_FF3C0548 \n"
136
137 "loc_FF3C04DC:\n"
138 " BL sub_FF3C00C0_my \n"
139 " B loc_FF3C03E0 \n"
140
141 "loc_FF3C04E4:\n"
142 " LDR R1, [R0, #4] \n"
143 " MOV R4, R0 \n"
144 " LDR R0, [R5, #4] \n"
145 " MOV R2, #0 \n"
146 " BL fwt_lseek \n"
147 " CMN R0, #1 \n"
148 " LDREQ R0, =0x9200013 \n"
149 " MOVEQ R1, R4 \n"
150 " STREQ R0, [R4, #0x10] \n"
151 " MOVEQ R0, #7 \n"
152 " BLEQ sub_FF3C0000 \n"
153 " B loc_FF3C03E0 \n"
154
155 "loc_FF3C0514:\n"
156 " MOV R4, R0 \n"
157 " LDRSB R0, [R0, #0x58] \n"
158 " CMP R0, #0 \n"
159 " BEQ loc_FF3C03E0 \n"
160 " STRB R0, [SP, #4] \n"
161 " ADD R0, R4, #0x58 \n"
162 " STRB R6, [SP, #5] \n"
163 " BL sub_FF0ACBDC \n"
164 " MOV R1, #0 \n"
165 " BL sub_FF0AA9C4 \n"
166
167
168 " LDR R3, =ignore_current_write\n"
169 " LDR R3, [R3]\n"
170 " CMP R3, #0\n"
171 " BNE loc_B\n"
172
173
174 " ADD R0, SP, #4 \n"
175 " BL sub_FF0A98B8 \n"
176 "loc_B:\n"
177 " ADD R0, R4, #0x58 \n"
178
179 "loc_FF3C0548:\n"
180 "loc_A:\n"
181 " BL sub_FF0ACBDC \n"
182 " LDR R1, [R5, #0x18] \n"
183 " BL sub_FF0AAB00 \n"
184 " LDR R1, [R5, #0x14] \n"
185 " CMP R1, #0 \n"
186 " LDRNE R0, [R4, #0x10] \n"
187 " BLXNE R1 \n"
188 " B loc_FF3C03E0 \n"
189
190 "loc_FF3C0568:\n"
191 " BL sub_FF3C0780_my \n"
192 " B loc_FF3C03E0 \n"
193
194 "loc_FF3C0570:\n"
195 " BL sub_FF3C024C_my \n"
196 " B loc_FF3C03E0 \n"
197 );
198 }
199
200
201
202 void __attribute__((naked,noinline)) sub_FF3C00C0_my() {
203 asm volatile (
204 " STMFD SP!, {R4-R8,LR} \n"
205 " MOV R4, R0 \n"
206
207
208 " BL filewrite_main_hook\n"
209 " MOV R0, R4\n"
210
211 " LDR R0, [R0, #0x4C] \n"
212 " SUB SP, SP, #0x38 \n"
213 " TST R0, #1 \n"
214 " BEQ loc_FF3C021C \n"
215 " ADD R0, R4, #0x58 \n"
216 " BL sub_FF0ACBDC \n"
217 " MOV R1, #0 \n"
218 " BL sub_FF0AA9C4 \n"
219 " LDR R0, [R4, #0xC] \n"
220 " BL sub_FF0A98A0 \n"
221 " LDR R0, [R4, #0x4C] \n"
222 " LDR R5, =0x301 \n"
223 " TST R0, #0x10 \n"
224 " MOVNE R5, #9 \n"
225 " BNE loc_FF3C010C \n"
226 " TST R0, #0x40 \n"
227 " MOVNE R5, #1 \n"
228
229 "loc_FF3C010C:\n"
230 " TST R0, #0x20 \n"
231 " BNE loc_FF3C0120 \n"
232 " LDR R0, [R4, #0x54] \n"
233 " CMP R0, #1 \n"
234 " BNE loc_FF3C0124 \n"
235
236 "loc_FF3C0120:\n"
237 " ORR R5, R5, #0x8000 \n"
238
239 "loc_FF3C0124:\n"
240 " LDR R8, =0x1B6 \n"
241 " ADD R7, R4, #0x58 \n"
242 " LDR R6, [R4, #0xC] \n"
243 " MOV R2, R8 \n"
244 " MOV R1, R5 \n"
245 " MOV R0, R7 \n"
246 " BL fwt_open \n"
247 " CMN R0, #1 \n"
248 " BNE loc_FF3C01A4 \n"
249 " MOV R0, R7 \n"
250 " BL sub_FF0358B4 \n"
251 " MOV R2, #0xF \n"
252 " MOV R1, R7 \n"
253 " MOV R0, SP \n"
254 " BL sub_006A90D8 \n"
255 " MOV R0, #0 \n"
256 " LDR R1, =0x41FF \n"
257 " STRB R0, [SP, #0xF] \n"
258 " STR R1, [SP, #0x20] \n"
259 " MOV R1, #0x10 \n"
260 " STR R0, [SP, #0x28] \n"
261 " STR R1, [SP, #0x24] \n"
262 " ADD R1, SP, #0x20 \n"
263 " MOV R0, SP \n"
264 " STR R6, [SP, #0x2C] \n"
265 " STR R6, [SP, #0x30] \n"
266 " STR R6, [SP, #0x34] \n"
267 " BL sub_FF0AA340 \n"
268 " MOV R2, R8 \n"
269 " MOV R1, R5 \n"
270 " MOV R0, R7 \n"
271 " BL _Open \n"
272
273 "loc_FF3C01A4:\n"
274 " LDR R6, =0x11620 \n"
275 " CMN R0, #1 \n"
276 " MOV R5, R0 \n"
277 " STR R0, [R6, #4] \n"
278 " BNE loc_FF3C01E4 \n"
279 " ADD R0, R4, #0x58 \n"
280 " BL sub_FF0ACBDC \n"
281 " LDR R1, [R6, #0x18] \n"
282 " BL sub_FF0AAB00 \n"
283 " LDR R1, [R6, #0x14] \n"
284 " CMP R1, #0 \n"
285 " BEQ loc_FF3C0244 \n"
286 " ADD SP, SP, #0x38 \n"
287 " LDMFD SP!, {R4-R8,LR} \n"
288 " LDR R0, =0x9200001 \n"
289 " BX R1 \n"
290
291 "loc_FF3C01E4:\n"
292 " LDR R0, =0x25B870 \n"
293 " MOV R2, #0x20 \n"
294 " ADD R1, R4, #0x58 \n"
295 " BL sub_006A92C0 \n"
296
297
298 " LDR R3, =current_write_ignored\n"
299 " LDR R3, [R3]\n"
300 " CMP R3, #0\n"
301 " BNE loc_C\n"
302
303
304 " LDR R0, [R4, #0x4C] \n"
305 " TST R0, #0x80 \n"
306 " BEQ loc_FF3C021C \n"
307 " LDR R1, [R4, #8] \n"
308 " MOV R0, R5 \n"
309 " BL sub_FF035584 \n"
310 " CMP R0, #0 \n"
311 " MOVEQ R1, R4 \n"
312 " MOVEQ R0, #7 \n"
313 " BEQ loc_FF3C0240 \n"
314
315 "loc_FF3C021C:\n"
316 "loc_C:\n"
317 " LDR R0, [R4, #0x4C] \n"
318 " TST R0, #0x40 \n"
319 " LDREQ R0, [R4, #4] \n"
320 " CMPEQ R0, #0 \n"
321 " MOVNE R1, R4 \n"
322 " MOVNE R0, #9 \n"
323 " BLNE sub_FF3C0000 \n"
324 " MOV R1, R4 \n"
325 " MOV R0, #0 \n"
326
327 "loc_FF3C0240:\n"
328 " BL sub_FF3C0000 \n"
329
330 "loc_FF3C0244:\n"
331 " ADD SP, SP, #0x38 \n"
332 " LDMFD SP!, {R4-R8,PC} \n"
333 );
334 }
335
336
337
338 void __attribute__((naked,noinline)) sub_FF3C0780_my() {
339 asm volatile (
340 " STMFD SP!, {R4-R10,LR} \n"
341 " MOV R5, R0 \n"
342 " LDR R0, [R0] \n"
343 " CMP R0, #6 \n"
344 " BHI loc_FF3C07AC \n"
345 " ADD R0, R5, R0, LSL#3 \n"
346 " LDR R8, [R0, #0x14]! \n"
347 " LDR R7, [R0, #4] \n"
348 " CMP R7, #0 \n"
349 " BNE loc_FF3C07C4 \n"
350 " B loc_FF3C07B8 \n"
351
352 "loc_FF3C07AC:\n"
353 " MOV R1, #0x344 \n"
354 " LDR R0, =0xFF3C05A0 /*'dwFWrite.c'*/ \n"
355 " BL _DebugAssert \n"
356
357 "loc_FF3C07B8:\n"
358 " MOV R1, R5 \n"
359 " MOV R0, #7 \n"
360 " B loc_FF3C0858 \n"
361
362 "loc_FF3C07C4:\n"
363 " LDR R9, =0x11620 \n"
364 " MOV R4, R7 \n"
365
366 "loc_FF3C07CC:\n"
367 " LDR R0, [R5, #4] \n"
368 " CMP R4, #0x1000000 \n"
369 " MOVLS R6, R4 \n"
370 " MOVHI R6, #0x1000000 \n"
371 " BIC R1, R0, #0xFF000000 \n"
372 " CMP R1, #0 \n"
373 " BICNE R0, R0, #0xFF000000 \n"
374 " RSBNE R0, R0, #0x1000000 \n"
375 " CMPNE R6, R0 \n"
376 " MOVHI R6, R0 \n"
377 " LDR R0, [R9, #4] \n"
378 " MOV R2, R6 \n"
379 " MOV R1, R8 \n"
380 " BL fwt_write \n"
381 " LDR R1, [R5, #4] \n"
382 " CMP R6, R0 \n"
383 " ADD R1, R1, R0 \n"
384 " STR R1, [R5, #4] \n"
385 " BEQ loc_FF3C082C \n"
386 " CMN R0, #1 \n"
387 " LDRNE R0, =0x9200015 \n"
388 " LDREQ R0, =0x9200005 \n"
389 " STR R0, [R5, #0x10] \n"
390 " B loc_FF3C07B8 \n"
391
392 "loc_FF3C082C:\n"
393 " SUB R4, R4, R0 \n"
394 " CMP R4, R7 \n"
395 " LDRCS R1, =0x36F \n"
396 " ADD R8, R8, R0 \n"
397 " LDRCS R0, =0xFF3C05A0 /*'dwFWrite.c'*/ \n"
398 " BLCS _DebugAssert \n"
399 " CMP R4, #0 \n"
400 " BNE loc_FF3C07CC \n"
401 " LDR R0, [R5] \n"
402 " MOV R1, R5 \n"
403 " ADD R0, R0, #1 \n"
404
405 "loc_FF3C0858:\n"
406 " LDMFD SP!, {R4-R10,LR} \n"
407 " B sub_FF3C0000 \n"
408 " .ltorg\n"
409 );
410 }
411
412
413
414 void __attribute__((naked,noinline)) sub_FF3C024C_my() {
415 asm volatile (
416 " STMFD SP!, {R4-R6,LR} \n"
417 " MOV R4, R0 \n"
418 " LDR R0, [R0, #0x4C] \n"
419 " LDR R5, =0x11620 \n"
420 " TST R0, #2 \n"
421 " SUB SP, SP, #0x38 \n"
422 " BEQ sub_FF3C03B4 \n"
423 " LDR R0, [R5, #4] \n"
424 " CMN R0, #1 \n"
425 " BEQ sub_FF3C02A0 \n"
426 " LDR R1, [R4, #0x54] \n"
427 " LDR R6, =0x9200003 \n"
428 " CMP R1, #1 \n"
429 " BNE loc_FF3C028C \n"
430
431 " LDR R3, =current_write_ignored\n"
432 " LDR R3, [R3]\n"
433 " CMP R3, #0\n"
434 " BNE loc_D\n"
435
436
437 " BL sub_FF0352D8 \n"
438 " B sub_FF3C0290 \n"
439
440 "loc_FF3C028C:\n"
441 "loc_D:\n"
442 " BL fwt_close \n"
443 " LDR PC, =0xFF3C0290 \n"
444 );
445 }