This source file includes following definitions.
- taskHook
- CreateTask_spytask
- boot
- sub_FFC001A4_my
- sub_FFC00FC8_my
- sub_FFC04D3C_my
- taskcreate_Startup_my
- task_Startup_my
- init_file_modules_task
- sub_FFC52210_my
- sub_FFC3A55C_my
- sub_FFC3A2FC_my
- sub_FFC3A08C_my
1 #include "lolevel.h"
2 #include "platform.h"
3 #include "core.h"
4 #include "dryos31.h"
5
6 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
7
8 const char * const new_sa = &_end;
9
10 extern void task_PhySw();
11 extern void task_CaptSeq();
12 extern void task_InitFileModules();
13 extern void task_MovieRecord();
14 extern void task_ExpDrv();
15 extern void task_FileWrite();
16
17 void taskHook(context_t **context) {
18
19 task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
20
21 if(tcb->entry == (void*)task_PhySw) tcb->entry = (void*)mykbd_task;
22 if(tcb->entry == (void*)task_CaptSeq) tcb->entry = (void*)capt_seq_task;
23 if(tcb->entry == (void*)task_InitFileModules) tcb->entry = (void*)init_file_modules_task;
24 if(tcb->entry == (void*)task_MovieRecord) tcb->entry = (void*)movie_record_task;
25 if(tcb->entry == (void*)task_ExpDrv) tcb->entry = (void*)exp_drv_task;
26 if(tcb->entry == (void*)task_FileWrite) tcb->entry = (void*)filewritetask;
27 }
28
29 void CreateTask_spytask() {
30 _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
31 };
32
33
34 void __attribute__((naked,noinline)) boot() {
35 asm volatile (
36 "LDR R1, =0xC0410000\n"
37 "MOV R0, #0\n"
38 "STR R0, [R1]\n"
39 "MOV R1, #0x78\n"
40 "MCR p15, 0, R1,c1,c0\n"
41 "MOV R1, #0\n"
42 "MCR p15, 0, R1,c7,c10, 4\n"
43 "loc_FFC00028:\n"
44 "MCR p15, 0, R1,c7,c5\n"
45 "MCR p15, 0, R1,c7,c6\n"
46 "MOV R0, #0x3D\n"
47 "MCR p15, 0, R0,c6,c0\n"
48 "MOV R0, #0xC000002F\n"
49 "MCR p15, 0, R0,c6,c1\n"
50 "MOV R0, #0x31\n"
51 "MCR p15, 0, R0,c6,c2\n"
52 "LDR R0, =0x10000031\n"
53 "MCR p15, 0, R0,c6,c3\n"
54 "MOV R0, #0x40000017\n"
55 "MCR p15, 0, R0,c6,c4\n"
56 "LDR R0, =0xFFC0002B\n"
57 "MCR p15, 0, R0,c6,c5\n"
58 "MOV R0, #0x34\n"
59 "MCR p15, 0, R0,c2,c0\n"
60 "MOV R0, #0x34\n"
61 "MCR p15, 0, R0,c2,c0, 1\n"
62 "MOV R0, #0x34\n"
63 "MCR p15, 0, R0,c3,c0\n"
64 "LDR R0, =0x3333330\n"
65 "MCR p15, 0, R0,c5,c0, 2\n"
66 "LDR R0, =0x3333330\n"
67 "MCR p15, 0, R0,c5,c0, 3\n"
68 "MRC p15, 0, R0,c1,c0\n"
69 "ORR R0, R0, #0x1000\n"
70 "ORR R0, R0, #4\n"
71 "ORR R0, R0, #1\n"
72 "MCR p15, 0, R0,c1,c0\n"
73 "MOV R1, #0x40000006\n"
74 "MCR p15, 0, R1,c9,c1\n"
75 "MOV R1, #6\n"
76 "MCR p15, 0, R1,c9,c1, 1\n"
77 "MRC p15, 0, R1,c1,c0\n"
78 "ORR R1, R1, #0x50000\n"
79 "MCR p15, 0, R1,c1,c0\n"
80 "LDR R2, =0xC0200000\n"
81 "MOV R1, #1\n"
82 "STR R1, [R2,#0x10C]\n"
83 "MOV R1, #0xFF\n"
84 "STR R1, [R2,#0xC]\n"
85 "STR R1, [R2,#0x1C]\n"
86 "STR R1, [R2,#0x2C]\n"
87 "STR R1, [R2,#0x3C]\n"
88 "STR R1, [R2,#0x4C]\n"
89 "STR R1, [R2,#0x5C]\n"
90 "STR R1, [R2,#0x6C]\n"
91 "STR R1, [R2,#0x7C]\n"
92 "STR R1, [R2,#0x8C]\n"
93 "STR R1, [R2,#0x9C]\n"
94 "STR R1, [R2,#0xAC]\n"
95 "STR R1, [R2,#0xBC]\n"
96 "STR R1, [R2,#0xCC]\n"
97 "STR R1, [R2,#0xDC]\n"
98 "STR R1, [R2,#0xEC]\n"
99 "STR R1, [R2,#0xFC]\n"
100 "LDR R1, =0xC0400008\n"
101 "LDR R2, =0x430005\n"
102 "STR R2, [R1]\n"
103 "MOV R1, #1\n"
104 "LDR R2, =0xC0243100\n"
105 "STR R2, [R1]\n"
106 "LDR R2, =0xC0242010\n"
107 "LDR R1, [R2]\n"
108 "ORR R1, R1, #1\n"
109 "STR R1, [R2]\n"
110 "LDR R0, =0xFFE88E20\n"
111 "LDR R1, =0x1900\n"
112 "LDR R3, =0xBA68\n"
113 "loc_FFC0013C:\n"
114 "CMP R1, R3\n"
115 "LDRCC R2, [R0],#4\n"
116 "STRCC R2, [R1],#4\n"
117 "BCC loc_FFC0013C\n"
118 "LDR R1, =0x102438\n"
119 "MOV R2, #0\n"
120 "loc_FFC00154:\n"
121 "CMP R3, R1\n"
122 "STRCC R2, [R3],#4\n"
123 "BCC loc_FFC00154\n"
124 "B sub_FFC001A4_my\n"
125 );
126 };
127
128
129 void __attribute__((naked,noinline)) sub_FFC001A4_my() {
130 *(int*)0x1934=(int)taskHook;
131 *(int*)0x1938=(int)taskHook;
132 *(int*)(0x2164)= (*(int*)0xC022005C)&1 ? 0x400000 : 0x200000;
133 asm volatile (
134 "LDR R0, =0xFFC0021C\n"
135 "MOV R1, #0\n"
136 "LDR R3, =0xFFC00254\n"
137 "loc_FFC001B0:\n"
138 "CMP R0, R3\n"
139 "LDRCC R2, [R0],#4\n"
140 "STRCC R2, [R1],#4\n"
141 "BCC loc_FFC001B0\n"
142 "LDR R0, =0xFFC00254\n"
143 "MOV R1, #0x4B0\n"
144 "LDR R3, =0xFFC00468\n"
145 "loc_FFC001CC:\n"
146 "CMP R0, R3\n"
147 "LDRCC R2, [R0],#4\n"
148 "STRCC R2, [R1],#4\n"
149 "BCC loc_FFC001CC\n"
150 "MOV R0, #0xD2\n"
151 "MSR CPSR_cxsf, R0\n"
152 "MOV SP, #0x1000\n"
153 "MOV R0, #0xD3\n"
154 "MSR CPSR_cxsf, R0\n"
155 "MOV SP, #0x1000\n"
156 "LDR R0, =0x6C4\n"
157 "LDR R2, =0xEEEEEEEE\n"
158 "MOV R3, #0x1000\n"
159 "loc_FFC00200:\n"
160 "CMP R0, R3\n"
161 "STRCC R2, [R0],#4\n"
162 "BCC loc_FFC00200\n"
163 "BL sub_FFC00FC8_my\n"
164 );
165 }
166
167 void __attribute__((naked,noinline)) sub_FFC00FC8_my() {
168 asm volatile (
169 "STR LR, [SP,#-4]!\n"
170 "SUB SP, SP, #0x74\n"
171 "MOV R0, SP\n"
172 "MOV R1, #0x74\n"
173 "BL sub_FFE315E8\n"
174 "MOV R0, #0x53000\n"
175 "STR R0, [SP,#4]\n"
176
177 #if defined(CHDK_NOT_IN_CANON_HEAP)
178 "LDR R0, =0x102438\n"
179 #else
180 "LDR R0, =new_sa\n"
181 "LDR R0, [R0]\n"
182 #endif
183 "LDR R2, =0x279C00\n"
184 "LDR R1, =0x2724A8\n"
185 "STR R0, [SP,#8]\n"
186 "SUB R0, R1, R0\n"
187 "ADD R3, SP, #0xC\n"
188 "STR R2, [SP]\n"
189 "STMIA R3, {R0-R2}\n"
190 "MOV R0, #0x22\n"
191 "STR R0, [SP,#0x18]\n"
192 "MOV R0, #0x68\n"
193 "STR R0, [SP,#0x1C]\n"
194 "LDR R0, =0x19B\n"
195 "LDR R1, =sub_FFC04D3C_my\n"
196 "STR R0, [SP,#0x20]\n"
197 "MOV R0, #0x96\n"
198 "STR R0, [SP,#0x24]\n"
199 "MOV R0, #0x78\n"
200 "STR R0, [SP,#0x28]\n"
201 "MOV R0, #0x64\n"
202 "STR R0, [SP,#0x2C]\n"
203 "MOV R0, #0\n"
204 "STR R0, [SP,#0x30]\n"
205 "STR R0, [SP,#0x34]\n"
206 "MOV R0, #0x10\n"
207 "STR R0, [SP,#0x5C]\n"
208 "MOV R0, #0x800\n"
209 "STR R0, [SP,#0x60]\n"
210 "MOV R0, #0xA0\n"
211 "STR R0, [SP,#0x64]\n"
212 "MOV R0, #0x280\n"
213 "STR R0, [SP,#0x68]\n"
214 "MOV R0, SP\n"
215 "MOV R2, #0\n"
216 "BL sub_FFC02D6C\n"
217 "ADD SP, SP, #0x74\n"
218 "LDR PC, [SP],#4\n"
219 );
220 }
221
222
223 void __attribute__((naked,noinline)) sub_FFC04D3C_my() {
224 asm volatile (
225 "STMFD SP!, {R4,LR}\n"
226 "BL sub_FFC00958\n"
227 "BL sub_FFC097EC\n"
228 "CMP R0, #0\n"
229 "LDRLT R0, =0xFFC04E50\n"
230 "BLLT sub_FFC04E30\n"
231 "BL sub_FFC04978\n"
232 "CMP R0, #0\n"
233 "LDRLT R0, =0xFFC04E58\n"
234 "BLLT sub_FFC04E30\n"
235 "LDR R0, =0xFFC04E68\n"
236 "BL sub_FFC04A60\n"
237 "CMP R0, #0\n"
238 "LDRLT R0, =0xFFC04E70\n"
239 "BLLT sub_FFC04E30\n"
240 "LDR R0, =0xFFC04E68\n"
241 "BL sub_FFC0357C\n"
242 "CMP R0, #0\n"
243 "LDRLT R0, =0xFFC04E84\n"
244 "BLLT sub_FFC04E30\n"
245 "BL sub_FFC09304\n"
246 "CMP R0, #0\n"
247 "LDRLT R0, =0xFFC04E90\n"
248 "BLLT sub_FFC04E30\n"
249 "BL sub_FFC014AC\n"
250 "CMP R0, #0\n"
251 "LDRLT R0, =0xFFC04E9C\n"
252 "BLLT sub_FFC04E30\n"
253 "LDMFD SP!, {R4,LR}\n"
254 "B taskcreate_Startup_my\n"
255 );
256 };
257
258
259 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
260 asm volatile (
261 "STMFD SP!, {R3,LR}\n"
262
263 "BL sub_FFC17F38\n"
264 "CMP R0, #0\n"
265 "BNE loc_FFC0CEA0\n"
266 "BL sub_FFC11104\n"
267 "CMP R0, #0\n"
268 "BNE loc_FFC0CEA0\n"
269 "LDR R1, =0xC0220000\n"
270 "MOV R0, #0x44\n"
271 "STR R0, [R1,#0x20]\n"
272 "loc_FFC0CE9C:\n"
273 "B loc_FFC0CE9C\n"
274 "loc_FFC0CEA0:\n"
275
276
277 "BL sub_FFC163F0\n"
278 "LDR R1, =0x2CE000\n"
279 "MOV R0, #0\n"
280 "BL sub_FFC16638\n"
281 "BL sub_FFC165E4\n"
282 "MOV R3, #0\n"
283 "STR R3, [SP]\n"
284 "LDR R3, =task_Startup_my\n"
285 "MOV R2, #0\n"
286 "MOV R1, #0x19\n"
287 "LDR R0, =0xFFC0CEE8\n"
288 "BL sub_FFC0B9C4\n"
289 "MOV R0, #0\n"
290 "LDMFD SP!, {R12,PC}\n"
291
292 );
293 }
294
295 void __attribute__((naked,noinline)) task_Startup_my() {
296 asm volatile (
297 "STMFD SP!, {R4,LR}\n"
298 "BL sub_FFC05158\n"
299 "BL sub_FFC121EC\n"
300 "BL sub_FFC10AA4\n"
301
302 "BL sub_FFC1815C\n"
303
304 "BL sub_FFC182F8\n"
305 "BL sub_FFC1818C\n"
306 "BL sub_FFC156E4\n"
307 "BL sub_FFC182FC\n"
308 "BL CreateTask_spytask\n"
309 "BL sub_FFC11004\n"
310 "BL sub_FFC13FEC\n"
311 "BL sub_FFC18314\n"
312
313 "BL sub_FFC1042C\n"
314 "BL sub_FFC17D14\n"
315 "BL sub_FFC10A54\n"
316 "BL sub_FFC10350\n"
317 "BL sub_FFC18D38\n"
318 "BL sub_FFC10328\n"
319 "LDMFD SP!, {R4,LR}\n"
320 "B sub_FFC05008\n"
321 );
322 }
323
324
325
326 void __attribute__((naked,noinline)) init_file_modules_task() {
327 asm volatile(
328 "STMFD SP!, {R4-R6,LR}\n"
329 "BL sub_FFC521E4\n"
330 "LDR R5, =0x5006\n"
331 "MOVS R4, R0\n"
332 "MOVNE R1, #0\n"
333 "MOVNE R0, R5\n"
334 "BLNE sub_FFC54884\n"
335 "BL sub_FFC52210_my\n"
336 "BL core_spytask_can_start\n"
337 "CMP R4, #0\n"
338 "MOVEQ R0, R5\n"
339 "LDMEQFD SP!, {R4-R6,LR}\n"
340 "MOVEQ R1, #0\n"
341 "BEQ sub_FFC54884\n"
342 "LDMFD SP!, {R4-R6,PC}\n"
343
344 );
345 }
346
347 void __attribute__((naked,noinline)) sub_FFC52210_my() {
348 asm volatile(
349 "STMFD SP!, {R4,LR}\n"
350 "MOV R0, #3\n"
351 "BL sub_FFC3A55C_my\n"
352
353 "LDR R4, =0x29F4\n"
354 "LDR R0, [R4,#4]\n"
355 "CMP R0, #0\n"
356 "BNE loc_FFC52248\n"
357 "BL sub_FFC39920\n"
358 "BL sub_FFCC07DC\n"
359 "BL sub_FFC39920\n"
360 "BL sub_FFC35D84\n"
361 "BL sub_FFC39820\n"
362 "BL sub_FFCC08A0\n"
363 "loc_FFC52248:\n"
364 "MOV R0, #1\n"
365 "STR R0, [R4]\n"
366 "LDMFD SP!, {R4,PC}\n"
367 );
368 }
369
370
371 void __attribute__((naked,noinline)) sub_FFC3A55C_my() {
372 asm volatile(
373 "STMFD SP!, {R4-R8,LR}\n"
374 "MOV R6, R0\n"
375 "BL sub_FFC3A4C4\n"
376 "LDR R1, =0xEEA4\n"
377 "MOV R5, R0\n"
378 "ADD R4, R1, R0,LSL#7\n"
379 "LDR R0, [R4,#0x70]\n"
380 "CMP R0, #4\n"
381 "LDREQ R1, =0x6D8\n"
382 "LDREQ R0, =0xFFC39FE8\n"
383 "BLEQ sub_FFC0BE9C\n"
384 "MOV R1, R6\n"
385 "MOV R0, R5\n"
386 "BL sub_FFC39F30\n"
387 "LDR R0, [R4,#0x38]\n"
388 "BL sub_FFC3AA88\n"
389 "CMP R0, #0\n"
390 "STREQ R0, [R4,#0x70]\n"
391 "MOV R0, R5\n"
392 "BL sub_FFC3A008\n"
393 "MOV R0, R5\n"
394 "BL sub_FFC3A2FC_my\n"
395 "MOV R7, R0\n"
396 "MOV R0, R5\n"
397 "BL sub_FFC3A360\n"
398 "LDR R1, [R4,#0x3C]\n"
399 "AND R2, R7, R0\n"
400 "CMP R1, #0\n"
401 "MOV R0, #0\n"
402 "MOVEQ R0, #0x80000001\n"
403 "BEQ loc_FFC3A604\n"
404 "LDR R3, [R4,#0x2C]\n"
405 "CMP R3, #2\n"
406 "MOVEQ R0, #4\n"
407 "CMP R1, #5\n"
408 "ORRNE R0, R0, #1\n"
409 "BICEQ R0, R0, #1\n"
410 "CMP R2, #0\n"
411 "BICEQ R0, R0, #2\n"
412 "ORREQ R0, R0, #0x80000000\n"
413 "BICNE R0, R0, #0x80000000\n"
414 "ORRNE R0, R0, #2\n"
415 "loc_FFC3A604:\n"
416 "CMP R6, #7\n"
417 "STR R0, [R4,#0x40]\n"
418 "LDMNEFD SP!, {R4-R8,PC}\n"
419 "MOV R0, R6\n"
420 "BL sub_FFC3A514\n"
421 "CMP R0, #0\n"
422 "LDMEQFD SP!, {R4-R8,LR}\n"
423 "LDREQ R0, =0xFFC3A800\n"
424 "BEQ sub_FFC015AC\n"
425 "LDMFD SP!, {R4-R8,PC}\n"
426 );
427 }
428
429 void __attribute__((naked,noinline)) sub_FFC3A2FC_my() {
430 asm volatile(
431 "STMFD SP!, {R4-R6,LR}\n"
432 "MOV R5, R0\n"
433 "LDR R0, =0xEEA4\n"
434 "ADD R4, R0, R5,LSL#7\n"
435 "LDR R0, [R4,#0x70]\n"
436 "TST R0, #2\n"
437 "MOVNE R0, #1\n"
438 "LDMNEFD SP!, {R4-R6,PC}\n"
439 "LDR R0, [R4,#0x38]\n"
440 "MOV R1, R5\n"
441 "BL sub_FFC3A08C_my\n"
442 "CMP R0, #0\n"
443 "LDMEQFD SP!, {R4-R6,PC}\n"
444 "LDR R0, [R4,#0x38]\n"
445 "MOV R1, R5\n"
446 "BL sub_FFC3A1F8\n"
447 "CMP R0, #0\n"
448 "LDMEQFD SP!, {R4-R6,PC}\n"
449 "MOV R0, R5\n"
450 "BL sub_FFC39B18\n"
451 "CMP R0, #0\n"
452 "LDRNE R1, [R4,#0x70]\n"
453 "ORRNE R1, R1, #2\n"
454 "STRNE R1, [R4,#0x70]\n"
455 "LDMFD SP!, {R4-R6,PC}\n"
456 );
457 }
458
459 void __attribute__((naked,noinline)) sub_FFC3A08C_my() {
460 asm volatile(
461 "STMFD SP!, {R4-R8,LR}\n"
462 "MOV R8, R0\n"
463 "LDR R0, =0xEEA4\n"
464 "MOV R7, #0\n"
465 "ADD R5, R0, R1,LSL#7\n"
466 "LDR R0, [R5,#0x3C]\n"
467 "MOV R6, #0\n"
468 "CMP R0, #7\n"
469 "ADDLS PC, PC, R0,LSL#2\n"
470 "B loc_FFC3A1DC\n"
471 "loc_FFC3A0B4:\n"
472 "B loc_FFC3A0EC\n"
473 "loc_FFC3A0B8:\n"
474 "B loc_FFC3A0D4\n"
475 "loc_FFC3A0BC:\n"
476 "B loc_FFC3A0D4\n"
477 "loc_FFC3A0C0:\n"
478 "B loc_FFC3A0D4\n"
479 "loc_FFC3A0C4:\n"
480 "B loc_FFC3A0D4\n"
481 "loc_FFC3A0C8:\n"
482 "B loc_FFC3A1D4\n"
483 "loc_FFC3A0CC:\n"
484 "B loc_FFC3A0D4\n"
485 "loc_FFC3A0D0:\n"
486 "B loc_FFC3A0D4\n"
487 "loc_FFC3A0D4:\n"
488 "MOV R2, #0\n"
489 "MOV R1, #0x200\n"
490 "MOV R0, #2\n"
491 "BL sub_FFC4C3DC\n"
492 "MOVS R4, R0\n"
493 "BNE loc_FFC3A0F4\n"
494 "loc_FFC3A0EC:\n"
495 "MOV R0, #0\n"
496 "LDMFD SP!, {R4-R8,PC}\n"
497 "loc_FFC3A0F4:\n"
498 "LDR R12, [R5,#0x4C]\n"
499 "MOV R3, R4\n"
500 "MOV R2, #1\n"
501 "MOV R1, #0\n"
502 "MOV R0, R8\n"
503 "BLX R12\n"
504 "CMP R0, #1\n"
505 "BNE loc_FFC3A120\n"
506 "MOV R0, #2\n"
507 "BL sub_FFC4C528\n"
508 "B loc_FFC3A0EC\n"
509 "loc_FFC3A120:\n"
510 "LDR R1, [R5,#0x68]\n"
511 "MOV R0, R8\n"
512 "BLX R1\n"
513
514 "MOV R1, R4\n"
515 "BL mbr_read_dryos\n"
516
517
518
519
520
521
522 "MOV R12, R4\n"
523 "MOV LR, R4\n"
524 "MOV R1, #1\n"
525 "B dg_sd_fat32_enter\n"
526 "dg_sd_fat32:\n"
527 "CMP R1, #4\n"
528 "BEQ dg_sd_fat32_end\n"
529 "ADD R12, R12, #0x10\n"
530 "ADD R1, R1, #1\n"
531 "dg_sd_fat32_enter:\n"
532 "LDRB R2, [R12, #0x1BE]\n"
533 "LDRB R3, [R12, #0x1C2]\n"
534 "CMP R3, #0xB\n"
535 "CMPNE R3, #0xC\n"
536 "BNE dg_sd_fat32\n"
537 "CMP R2, #0x00\n"
538 "CMPNE R2, #0x80\n"
539 "BNE dg_sd_fat32\n"
540
541 "MOV R4, R12\n"
542
543 "dg_sd_fat32_end:\n"
544
545
546
547 "LDRB R1, [R4,#0x1C9]\n"
548 "LDRB R3, [R4,#0x1C8]\n"
549 "LDRB R12, [R4,#0x1CC]\n"
550 "MOV R1, R1,LSL#24\n"
551 "ORR R1, R1, R3,LSL#16\n"
552 "LDRB R3, [R4,#0x1C7]\n"
553 "LDRB R2, [R4,#0x1BE]\n"
554
555 "ORR R1, R1, R3,LSL#8\n"
556 "LDRB R3, [R4,#0x1C6]\n"
557 "CMP R2, #0\n"
558 "CMPNE R2, #0x80\n"
559 "ORR R1, R1, R3\n"
560 "LDRB R3, [R4,#0x1CD]\n"
561 "MOV R3, R3,LSL#24\n"
562 "ORR R3, R3, R12,LSL#16\n"
563 "LDRB R12, [R4,#0x1CB]\n"
564 "ORR R3, R3, R12,LSL#8\n"
565 "LDRB R12, [R4,#0x1CA]\n"
566 "ORR R3, R3, R12\n"
567
568 "LDRB R12, [LR,#0x1FE]\n"
569 "LDRB LR, [LR,#0x1FF]\n"
570 "MOV R4, #0\n"
571 "BNE loc_FFC3A1AC\n"
572 "CMP R0, R1\n"
573 "BCC loc_FFC3A1AC\n"
574 "ADD R2, R1, R3\n"
575 "CMP R2, R0\n"
576 "CMPLS R12, #0x55\n"
577 "CMPEQ LR, #0xAA\n"
578 "MOVEQ R7, R1\n"
579 "MOVEQ R6, R3\n"
580 "MOVEQ R4, #1\n"
581 "loc_FFC3A1AC:\n"
582 "MOV R0, #2\n"
583 "BL sub_FFC4C528\n"
584 "CMP R4, #0\n"
585 "BNE loc_FFC3A1E8\n"
586 "LDR R1, [R5,#0x68]\n"
587 "MOV R7, #0\n"
588 "MOV R0, R8\n"
589 "BLX R1\n"
590 "MOV R6, R0\n"
591 "B loc_FFC3A1E8\n"
592 "loc_FFC3A1D4:\n"
593 "MOV R6, #0x40\n"
594 "B loc_FFC3A1E8\n"
595 "loc_FFC3A1DC:\n"
596 "LDR R1, =0x5C9\n"
597 "LDR R0, =0xFFC39FE8\n"
598 "BL sub_FFC0BE9C\n"
599 "loc_FFC3A1E8:\n"
600 "STR R7, [R5,#0x44]!\n"
601 "MOV R0, #1\n"
602 "STR R6, [R5,#4]\n"
603 "LDMFD SP!, {R4-R8,PC}\n"
604 );
605 }
606
607
608