dst_start 2425 tools/firmware_load_ng.c uint32_t *dst_start, dst_start 2433 tools/firmware_load_ng.c *dst_start=0; dst_start 2463 tools/firmware_load_ng.c *dst_start=*dptr; dst_start 2556 tools/firmware_load_ng.c uint32_t src_start, dst_start, dst_end; dst_start 2573 tools/firmware_load_ng.c while(find_startup_copy(fw,is,max_search,&src_start,&dst_start,&dst_end)) { dst_start 2575 tools/firmware_load_ng.c if(dst_start < 0x100000) { dst_start 2579 tools/firmware_load_ng.c dst_start,src_start,dst_end); dst_start 2584 tools/firmware_load_ng.c if(dst_start != 0x1900 && dst_start != 0x8000) { dst_start 2586 tools/firmware_load_ng.c dst_start,src_start,dst_end); dst_start 2589 tools/firmware_load_ng.c fw->data_start=dst_start; dst_start 2590 tools/firmware_load_ng.c fw->data_len=dst_end-dst_start; dst_start 2591 tools/firmware_load_ng.c fw_add_adr_range(fw,dst_start,dst_end,src_start, ADR_RANGE_INIT_DATA, ADR_RANGE_FL_NONE); dst_start 2593 tools/firmware_load_ng.c } else if(dst_start < 0x08000000) { /// highest known first copied ram code 0x01900000 dst_start 2597 tools/firmware_load_ng.c dst_start,src_start,dst_end); dst_start 2602 tools/firmware_load_ng.c if( dst_start != 0x003f1000 && dst_start 2603 tools/firmware_load_ng.c dst_start != 0x00431000 && dst_start 2604 tools/firmware_load_ng.c dst_start != 0x00471000 && dst_start 2605 tools/firmware_load_ng.c dst_start != 0x00685000 && dst_start 2606 tools/firmware_load_ng.c dst_start != 0x00671000 && dst_start 2607 tools/firmware_load_ng.c dst_start != 0x006b1000 && dst_start 2608 tools/firmware_load_ng.c dst_start != 0x010c1000 && dst_start 2609 tools/firmware_load_ng.c dst_start != 0x010e1000 && dst_start 2610 tools/firmware_load_ng.c dst_start != 0x01900000) { dst_start 2612 tools/firmware_load_ng.c dst_start,src_start,dst_end); dst_start 2614 tools/firmware_load_ng.c fw_add_adr_range(fw,dst_start,dst_end,src_start,ADR_RANGE_RAM_CODE, ADR_RANGE_FL_NONE); dst_start 2619 tools/firmware_load_ng.c dst_start,src_start,dst_end); dst_start 2623 tools/firmware_load_ng.c if(dst_start != 0xbfe10800 && // known digic 6 value (g5x) dst_start 2624 tools/firmware_load_ng.c dst_start != 0xdffc4900) { // known digic 7 value (m5) dst_start 2626 tools/firmware_load_ng.c dst_start,src_start,dst_end); dst_start 2628 tools/firmware_load_ng.c fw_add_adr_range(fw,dst_start,dst_end,src_start,ADR_RANGE_RAM_CODE, ADR_RANGE_FL_TCM);