root/platform/a540/sub/100b/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. blink
  2. panic
  3. boot
  4. h_usrInit
  5. h_usrKernelInit
  6. h_usrRoot

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 const char * const new_sa = &_end;
   6 
   7 /* Ours stuff */
   8 extern void createHook (void *pNewTcb);
   9 extern void deleteHook (void *pTcb);
  10 
  11 
  12 void boot();
  13 
  14 /* "relocated" functions */
  15 void __attribute__((naked,noinline)) h_usrInit();
  16 void __attribute__((naked,noinline)) h_usrKernelInit();
  17 void __attribute__((naked,noinline)) h_usrRoot();
  18 
  19 #if 0
  20 #define LED_PR 0xc0220084
  21 
  22 static void blink(int cnt)
  23 {
  24         volatile long *p=(void*)LED_PR;
  25         int i;
  26 
  27         for(;cnt>0;cnt--){
  28                 p[0]=0x46;
  29 
  30                 for(i=0;i<0x200000;i++){
  31                         asm ("nop\n");
  32                         asm ("nop\n");
  33                 }
  34                 p[0]=0x44;
  35                 for(i=0;i<0x200000;i++){
  36                         asm ("nop\n");
  37                         asm ("nop\n");
  38                 }
  39         }
  40 }
  41 
  42 static void __attribute__((noreturn)) panic(int cnt)
  43 {
  44         blink(cnt);
  45         shutdown();
  46 }
  47 #endif
  48 
  49 void boot()
  50 {
  51 
  52   asm volatile (
  53 //        "B       0xFFC00000\n"
  54         "MOV     R0, #2\n"
  55         "TEQ     R0, #2\n"
  56         "LDR     SP, =0x1900\n"
  57         "MOV     R11, #0\n"
  58         
  59         "MOV     R0, #0x3D\n"
  60         "MCR     p15, 0, R0,c6,c0\n"
  61         "MOV     R0, #0xC000002F\n"
  62         "MCR     p15, 0, R0,c6,c1\n"
  63         "MOV     R0, #0x31\n"
  64         "MCR     p15, 0, R0,c6,c2\n"
  65         "LDR     R0, =0x10000031\n"
  66         "MCR     p15, 0, R0,c6,c3\n"
  67         "MOV     R0, #0x40000017\n"
  68         "MCR     p15, 0, R0,c6,c4\n"
  69         "LDR     R0, =0xFF80002D\n"
  70         "MCR     p15, 0, R0,c6,c5\n"
  71         "MOV     R0, #0x34\n"
  72         "MCR     p15, 0, R0,c2,c0\n"
  73         "MOV     R0, #0x34\n"
  74         "MCR     p15, 0, R0,c2,c0, 1\n"
  75         "MOV     R0, #0x34\n"
  76         "MCR     p15, 0, R0,c3,c0\n"
  77         "LDR     R0, =0x3333330\n"
  78         "MCR     p15, 0, R0,c5,c0, 2\n"
  79         "LDR     R0, =0x3333330\n"
  80         "MCR     p15, 0, R0,c5,c0, 3\n"
  81         "MRC     p15, 0, R0,c1,c0\n"
  82         "ORR     R0, R0, #0x1000\n"
  83         "ORR     R0, R0, #1\n"
  84         "MCR     p15, 0, R0,c1,c0\n"
  85         
  86         "STR     LR, [SP,#-4]!\n"
  87         "MRC     p15, 0, R0,c1,c0\n"
  88         "ORR     R0, R0, #0x1000\n"
  89         "ORR     R0, R0, #4\n"
  90         "ORR     R0, R0, #1\n"
  91         "MCR     p15, 0, R0,c1,c0\n"
  92         "LDR     R3, =0xB910\n"
  93         "MOV     R12, #0\n"
  94         "CMP     R12, R3\n"
  95         "LDR     R2, =0xFFEF3DF0\n"
  96         "MOV     R1, #0x1900\n"
  97         "BCS     loc_FFC00130\n"
  98         "MOV     LR, R3\n"
  99   "loc_FFC00114:\n"
 100         "LDR     R3, [R2]\n"
 101         "ADD     R12, R12, #4\n"
 102         "CMP     R12, LR\n"
 103         "STR     R3, [R1]\n"
 104         "ADD     R2, R2, #4\n"
 105         "ADD     R1, R1, #4\n"
 106         "BCC     loc_FFC00114\n"
 107   "loc_FFC00130:\n"
 108         "LDR     R1, =0xD210\n"
 109         "LDR     R3, =0x922D0\n"
 110         "MOV     R12, #0\n"
 111         "RSB     R3, R1, R3\n"
 112         "CMP     R12, R3\n"
 113         "BCS     loc_FFC0015C\n"
 114         "MOV     R2, R12\n"
 115   "loc_FFC0014C:\n"
 116         "ADD     R2, R2, #4\n"
 117         "CMP     R2, R3\n"
 118         "STR     R12, [R1],#4\n"
 119         "BCC     loc_FFC0014C\n"
 120   "loc_FFC0015C:\n"
 121         "MRC     p15, 0, R0,c1,c0\n"
 122         "ORR     R0, R0, #0x1000\n"
 123         "BIC     R0, R0, #4\n"
 124         "ORR     R0, R0, #1\n"
 125         "MCR     p15, 0, R0,c1,c0\n"
 126         "LDR     LR, [SP],#4\n"
 127 //        "B       sub_FFC0198C\n"
 128         "B       h_usrInit\n"
 129   );
 130 //  blink(2);
 131 
 132 }
 133 
 134 
 135 void h_usrInit()
 136 {
 137   asm volatile (
 138         "STR     LR, [SP,#-4]!\n"
 139         "BL      sub_FFC01968\n"
 140         "MOV     R0, #2\n"
 141         "MOV     R1, R0\n"
 142         "BL      sub_FFEDA92C\n"
 143         "BL      sub_FFECD5A8\n"
 144         "BL      sub_FFC011C4\n"
 145         "BL      sub_FFC01728\n"
 146         "LDR     LR, [SP],#4\n"
 147 //        "B       sub_FFC01744\n"
 148         "B       h_usrKernelInit\n"
 149   );
 150 }
 151 
 152 void  h_usrKernelInit()
 153 {
 154 
 155   asm volatile (
 156         "STMFD   SP!, {R4,LR}\n"
 157         "SUB     SP, SP, #8\n"
 158         "BL      sub_FFEDAE2C\n"
 159         "BL      sub_FFEEDC14\n"
 160         "LDR     R3, =0xC230\n"
 161         "LDR     R2, =0x8E900\n"
 162         "LDR     R1, [R3]\n"
 163         "LDR     R0, =0x91C90\n"
 164         "MOV     R3, #0x100\n"
 165         "BL      sub_FFEE6D24\n"
 166         "LDR     R3, =0xC1F0\n"
 167         "LDR     R0, =0xCA38\n"
 168         "LDR     R1, [R3]\n"
 169         "BL      sub_FFEE6D24\n"
 170         "LDR     R3, =0xC2AC\n"
 171         "LDR     R0, =0x91C64\n"
 172         "LDR     R1, [R3]\n"
 173         "BL      sub_FFEE6D24\n"
 174         "BL      sub_FFEF1FD0\n"
 175         "BL      sub_FFC012B0\n"
 176         "MOV     R4, #0\n"
 177         "MOV     R3, R0\n"
 178         "MOV     R12, #0x800\n"
 179         
 180 //        "LDR     R0, =0xFFC01A60\n"
 181 //        "MOV     R1, #0x4000\n"
 182 //        "LDR     R2, =0x922D0\n"
 183         
 184         "LDR     R0, =h_usrRoot\n"
 185         "MOV     R1, #0x4000\n"
 186         );    
 187 //        "LDR     R2, =0xD22D0\n" // 0x922D0 + MEMISOSIZE(0x40000)
 188         asm volatile (
 189             "LDR     R2, =new_sa\n"
 190             "LDR     R2, [R2]\n"
 191         );
 192         asm volatile (
 193 
 194         "STR     R12, [SP]\n"
 195         "STR     R4, [SP,#4]\n"
 196         "BL      sub_FFEEAE54\n"
 197         "ADD     SP, SP, #8\n"
 198         "LDMFD   SP!, {R4,PC}\n"
 199   );
 200 }
 201 
 202 
 203 void  h_usrRoot()
 204 {
 205     asm volatile (
 206         "STMFD   SP!, {R4,R5,LR}\n"
 207         "MOV     R5, R0\n"
 208         "MOV     R4, R1\n"
 209         "BL      sub_FFC019D0\n"
 210         "MOV     R1, R4\n"
 211         "MOV     R0, R5\n"
 212         "BL      sub_FFEDFAC0\n"
 213         "MOV     R1, R4\n"
 214         "MOV     R0, R5\n"
 215         "BL      sub_FFEE0538\n"
 216         "BL      sub_FFC017E8\n"
 217         "BL      sub_FFC01704\n"
 218         "BL      sub_FFC01A0C\n"
 219         "BL      sub_FFC019F0\n"
 220         "BL      sub_FFC01A38\n"
 221         "BL      sub_FFC019C4\n"
 222     );
 223 
 224 // patch begin
 225     _taskCreateHookAdd(createHook);
 226     _taskDeleteHookAdd(deleteHook);
 227 
 228    drv_self_hide();
 229 
 230 // patch end
 231 
 232     asm volatile (
 233         "LDMFD   SP!, {R4,R5,LR}\n"
 234         "B       sub_FFC0136C\n"
 235     );
 236 }

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