This source file includes following definitions.
- capt_seq_task
- sub_FFD18614_my
- exp_drv_task
- sub_FFC94E94_my
- sub_FFC7654C_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R3-R7,LR} \n"
17 " LDR R6, =0x54C0 \n"
18
19 "loc_FFC4F100:\n"
20 " LDR R0, [R6, #8] \n"
21 " MOV R2, #0 \n"
22 " MOV R1, SP \n"
23 " BL sub_FFC17B08 /*_ReceiveMessageQueue*/ \n"
24 " TST R0, #1 \n"
25 " BEQ loc_FFC4F12C \n"
26 " LDR R1, =0x48E \n"
27 " LDR R0, =0xFFC4EDF8 /*'SsShootTask.c'*/ \n"
28 " BL _DebugAssert \n"
29 " BL _ExitTask \n"
30 " LDMFD SP!, {R3-R7,PC} \n"
31
32 "loc_FFC4F12C:\n"
33 " LDR R0, [SP] \n"
34 " LDR R1, [R0] \n"
35 " CMP R1, #0x1A \n"
36 " ADDLS PC, PC, R1, LSL#2 \n"
37 " B loc_FFC4F354 \n"
38 " B loc_FFC4F1AC \n"
39 " B loc_FFC4F1B4 \n"
40 " B loc_FFC4F23C \n"
41 " B loc_FFC4F250 \n"
42 " B loc_FFC4F248 \n"
43 " B loc_FFC4F258 \n"
44 " B loc_FFC4F260 \n"
45 " B loc_FFC4F26C \n"
46 " B loc_FFC4F2C4 \n"
47 " B loc_FFC4F250 \n"
48 " B loc_FFC4F2CC \n"
49 " B loc_FFC4F2D4 \n"
50 " B loc_FFC4F2DC \n"
51 " B loc_FFC4F2E4 \n"
52 " B loc_FFC4F2EC \n"
53 " B loc_FFC4F2F4 \n"
54 " B loc_FFC4F2FC \n"
55 " B loc_FFC4F304 \n"
56 " B loc_FFC4F30C \n"
57 " B loc_FFC4F318 \n"
58 " B loc_FFC4F324 \n"
59 " B loc_FFC4F32C \n"
60 " B loc_FFC4F334 \n"
61 " B loc_FFC4F33C \n"
62 " B loc_FFC4F344 \n"
63 " B loc_FFC4F34C \n"
64 " B loc_FFC4F360 \n"
65
66 "loc_FFC4F1AC:\n"
67 " BL sub_FFD1717C \n"
68 " BL shooting_expo_param_override\n"
69 " B loc_FFC4F264 \n"
70
71 "loc_FFC4F1B4:\n"
72 " LDR R4, [R0, #0xC] \n"
73 " LDR R0, [R4, #8] \n"
74 " ORR R0, R0, #1 \n"
75 " STR R0, [R4, #8] \n"
76 " MOV R0, #2 \n"
77 " BL sub_FFC4A04C \n"
78 " BL sub_FFD1716C \n"
79 " MOV R0, R4 \n"
80 " BL sub_FFD17554 \n"
81 " TST R0, #1 \n"
82 " MOVNE R2, R4 \n"
83 " MOVNE R1, #1 \n"
84 " BNE loc_FFC4F2BC \n"
85 " BL sub_FFD35818 \n"
86 " BL sub_FFC5DC44 \n"
87 " STR R0, [R4, #0x14] \n"
88 " MOV R0, R4 \n"
89 " BL sub_FFD1854C \n"
90 " BL sub_FFD18FB0 \n"
91 " MOV R0, R4 \n"
92 " BL sub_FFD18614_my \n"
93 " BL capt_seq_hook_raw_here \n"
94 " MOV R5, R0 \n"
95 " BL sub_FFD19F90 \n"
96 " BL sub_FFD19FCC \n"
97 " MOV R2, R4 \n"
98 " MOV R1, #1 \n"
99 " MOV R0, R5 \n"
100 " BL sub_FFC4D860 \n"
101 " BL sub_FFD189C4 \n"
102 " CMP R0, #0 \n"
103 " LDRNE R0, [R4, #8] \n"
104 " ORRNE R0, R0, #0x2000 \n"
105 " STRNE R0, [R4, #8] \n"
106 " B loc_FFC4F360 \n"
107
108 "loc_FFC4F23C:\n"
109 " MOV R0, #1 \n"
110 " BL sub_FFD17310 \n"
111 " B loc_FFC4F360 \n"
112
113 "loc_FFC4F248:\n"
114 " BL sub_FFD16DD0 \n"
115 " B loc_FFC4F360 \n"
116
117 "loc_FFC4F250:\n"
118 " BL sub_FFD1715C \n"
119 " B loc_FFC4F360 \n"
120
121 "loc_FFC4F258:\n"
122 " BL sub_FFD17164 \n"
123 " B loc_FFC4F360 \n"
124
125 "loc_FFC4F260:\n"
126 " BL sub_FFD17230 \n"
127
128 "loc_FFC4F264:\n"
129 " BL sub_FFC4D4E0 \n"
130 " B loc_FFC4F360 \n"
131
132 "loc_FFC4F26C:\n"
133 " LDR R4, [R0, #0xC] \n"
134 " BL sub_FFD1716C \n"
135 " MOV R0, R4 \n"
136 " BL sub_FFD178D4 \n"
137 " TST R0, #1 \n"
138 " MOV R5, R0 \n"
139 " BNE loc_FFC4F2AC \n"
140 " BL sub_FFC5DC44 \n"
141 " STR R0, [R4, #0x14] \n"
142 " MOV R0, R4 \n"
143 " BL sub_FFD1854C \n"
144 " MOV R0, R4 \n"
145 " BL sub_FFD18A24 \n"
146 " MOV R5, R0 \n"
147 " LDR R0, [R4, #0x14] \n"
148 " BL sub_FFC5DE50 \n"
149
150 "loc_FFC4F2AC:\n"
151 " BL sub_FFD1715C \n"
152 " MOV R2, R4 \n"
153 " MOV R1, #9 \n"
154 " MOV R0, R5 \n"
155
156 "loc_FFC4F2BC:\n"
157 " BL sub_FFC4D860 \n"
158 " B loc_FFC4F360 \n"
159
160 "loc_FFC4F2C4:\n"
161 " BL sub_FFD17290 \n"
162 " B loc_FFC4F264 \n"
163
164 "loc_FFC4F2CC:\n"
165 " BL sub_FFD17B50 \n"
166 " B loc_FFC4F360 \n"
167
168 "loc_FFC4F2D4:\n"
169 " BL sub_FFD17D38 \n"
170 " B loc_FFC4F360 \n"
171
172 "loc_FFC4F2DC:\n"
173 " BL sub_FFD17DC8 \n"
174 " B loc_FFC4F360 \n"
175
176 "loc_FFC4F2E4:\n"
177 " BL sub_FFD17E7C \n"
178 " B loc_FFC4F360 \n"
179
180 "loc_FFC4F2EC:\n"
181 " MOV R0, #0 \n"
182 " B loc_FFC4F310 \n"
183
184 "loc_FFC4F2F4:\n"
185 " BL sub_FFD18170 \n"
186 " B loc_FFC4F360 \n"
187
188 "loc_FFC4F2FC:\n"
189 " BL sub_FFD18204 \n"
190 " B loc_FFC4F360 \n"
191
192 "loc_FFC4F304:\n"
193 " BL sub_FFD182CC \n"
194 " B loc_FFC4F360 \n"
195
196 "loc_FFC4F30C:\n"
197 " MOV R0, #1 \n"
198
199 "loc_FFC4F310:\n"
200 " BL sub_FFD18020 \n"
201 " B loc_FFC4F360 \n"
202
203 "loc_FFC4F318:\n"
204 " BL sub_FFD1742C \n"
205 " BL sub_FFC14A34 \n"
206 " B loc_FFC4F360 \n"
207
208 "loc_FFC4F324:\n"
209 " BL sub_FFD17F38 \n"
210 " B loc_FFC4F360 \n"
211
212 "loc_FFC4F32C:\n"
213 " BL sub_FFD17F7C \n"
214 " B loc_FFC4F360 \n"
215
216 "loc_FFC4F334:\n"
217 " BL sub_FFD19F74 \n"
218 " B loc_FFC4F360 \n"
219
220 "loc_FFC4F33C:\n"
221 " BL sub_FFD19F90 \n"
222 " B loc_FFC4F360 \n"
223
224 "loc_FFC4F344:\n"
225 " BL sub_FFD19FA0 \n"
226 " B loc_FFC4F360 \n"
227
228 "loc_FFC4F34C:\n"
229 " BL sub_FFD19FCC \n"
230 " B loc_FFC4F360 \n"
231
232 "loc_FFC4F354:\n"
233 " LDR R1, =0x58E \n"
234 " LDR R0, =0xFFC4EDF8 /*'SsShootTask.c'*/ \n"
235 " BL _DebugAssert \n"
236
237 "loc_FFC4F360:\n"
238 " LDR R0, [SP] \n"
239 " LDR R1, [R0, #4] \n"
240 " LDR R0, [R6, #4] \n"
241 " BL sub_FFC17884 /*_SetEventFlag*/ \n"
242 " LDR R4, [SP] \n"
243 " LDR R0, [R4, #8] \n"
244 " CMP R0, #0 \n"
245 " LDREQ R1, =0x10D \n"
246 " LDREQ R0, =0xFFC4EDF8 /*'SsShootTask.c'*/ \n"
247 " BLEQ _DebugAssert \n"
248 " MOV R0, #0 \n"
249 " STR R0, [R4, #8] \n"
250 " B loc_FFC4F100 \n"
251 );
252 }
253
254
255
256 void __attribute__((naked,noinline)) sub_FFD18614_my() {
257 asm volatile (
258 " STMFD SP!, {R0-R10,LR} \n"
259 " MOV R6, #0 \n"
260 " MOV R4, R0 \n"
261 " BL sub_FFD19114 \n"
262 " MVN R1, #0 \n"
263 " BL sub_FFC178B8 /*_ClearEventFlag*/ \n"
264 " MOV R2, #4 \n"
265 " ADD R1, SP, #8 \n"
266 " MOV R0, #0x8A \n"
267 " BL _GetPropertyCase \n"
268 " TST R0, #1 \n"
269 " MOVNE R1, #0x218 \n"
270 " LDRNE R0, =0xFFD18828 /*'SsCaptureSeq.c'*/ \n"
271 " BLNE _DebugAssert \n"
272 " LDR R8, =0x18980 \n"
273 " LDR R5, =0x188D4 \n"
274 " LDRSH R1, [R8, #0xE] \n"
275 " LDR R0, [R5, #0x74] \n"
276 " BL sub_FFDBB3C4 \n"
277 " BL _GetCCDTemperature \n"
278 " LDR R2, =0x85C4 \n"
279 " ADD R3, R4, #0x8C \n"
280 " STRH R0, [R4, #0x88] \n"
281 " STRD R2, [SP] \n"
282 " MOV R1, R0 \n"
283 " LDRH R0, [R5, #0x4C] \n"
284 " LDRSH R2, [R8, #0xC] \n"
285 " LDR R3, =0x85C0 \n"
286 " BL sub_FFD19600 \n"
287 " BL wait_until_remote_button_is_released\n"
288 " BL capt_seq_hook_set_nr\n"
289 " LDR PC, =0xFFD18688 \n"
290 );
291 }
292
293
294
295 void __attribute__((naked,noinline)) exp_drv_task() {
296 asm volatile (
297 " STMFD SP!, {R4-R8,LR} \n"
298 " SUB SP, SP, #0x20 \n"
299 " LDR R8, =0xBB8 \n"
300 " LDR R7, =0x66F8 \n"
301 " LDR R5, =0x3C63C \n"
302 " MOV R0, #0 \n"
303 " ADD R6, SP, #0x10 \n"
304 " STR R0, [SP, #0xC] \n"
305
306 "loc_FFC97404:\n"
307 " LDR R0, [R7, #0x20] \n"
308 " MOV R2, #0 \n"
309 " ADD R1, SP, #0x1C \n"
310 " BL sub_FFC17B08 /*_ReceiveMessageQueue*/ \n"
311 " LDR R0, [SP, #0xC] \n"
312 " CMP R0, #1 \n"
313 " BNE loc_FFC9744C \n"
314 " LDR R0, [SP, #0x1C] \n"
315 " LDR R0, [R0] \n"
316 " CMP R0, #0x13 \n"
317 " CMPNE R0, #0x14 \n"
318 " CMPNE R0, #0x15 \n"
319 " BEQ loc_FFC97568 \n"
320 " CMP R0, #0x27 \n"
321 " BEQ loc_FFC97540 \n"
322 " ADD R1, SP, #0xC \n"
323 " MOV R0, #0 \n"
324 " BL sub_FFC97394 \n"
325
326 "loc_FFC9744C:\n"
327 " LDR R0, [SP, #0x1C] \n"
328 " LDR R1, [R0] \n"
329 " CMP R1, #0x2C \n"
330 " BNE loc_FFC9747C \n"
331 " LDR R0, [SP, #0x1C] \n"
332 " BL sub_FFC98648 \n"
333 " LDR R0, [R7, #0x1C] \n"
334 " MOV R1, #1 \n"
335 " BL sub_FFC17884 /*_SetEventFlag*/ \n"
336 " BL _ExitTask \n"
337 " ADD SP, SP, #0x20 \n"
338 " LDMFD SP!, {R4-R8,PC} \n"
339
340 "loc_FFC9747C:\n"
341 " CMP R1, #0x2B \n"
342 " BNE loc_FFC97498 \n"
343 " LDR R2, [R0, #0x88]! \n"
344 " LDR R1, [R0, #4] \n"
345 " MOV R0, R1 \n"
346 " BLX R2 \n"
347 " B loc_FFC979CC \n"
348
349 "loc_FFC97498:\n"
350 " CMP R1, #0x25 \n"
351 " BNE loc_FFC974E8 \n"
352 " LDR R0, [R7, #0x1C] \n"
353 " MOV R1, #0x80 \n"
354 " BL sub_FFC178B8 /*_ClearEventFlag*/ \n"
355 " LDR R0, =0xFFC93E54 \n"
356 " MOV R1, #0x80 \n"
357 " BL sub_FFD0C000 \n"
358 " LDR R0, [R7, #0x1C] \n"
359 " MOV R2, R8 \n"
360 " MOV R1, #0x80 \n"
361 " BL sub_FFC177BC /*_WaitForAllEventFlag*/ \n"
362 " TST R0, #1 \n"
363 " LDRNE R1, =0xD1B \n"
364 " BNE loc_FFC9752C \n"
365
366 "loc_FFC974D4:\n"
367 " LDR R1, [SP, #0x1C] \n"
368 " LDR R0, [R1, #0x8C] \n"
369 " LDR R1, [R1, #0x88] \n"
370 " BLX R1 \n"
371 " B loc_FFC979CC \n"
372
373 "loc_FFC974E8:\n"
374 " CMP R1, #0x26 \n"
375 " BNE loc_FFC97538 \n"
376 " ADD R1, SP, #0xC \n"
377 " BL sub_FFC97394 \n"
378 " LDR R0, [R7, #0x1C] \n"
379 " MOV R1, #0x100 \n"
380 " BL sub_FFC178B8 /*_ClearEventFlag*/ \n"
381 " LDR R0, =0xFFC93E64 \n"
382 " MOV R1, #0x100 \n"
383 " BL sub_FFD0C96C \n"
384 " LDR R0, [R7, #0x1C] \n"
385 " MOV R2, R8 \n"
386 " MOV R1, #0x100 \n"
387 " BL sub_FFC177BC /*_WaitForAllEventFlag*/ \n"
388 " TST R0, #1 \n"
389 " BEQ loc_FFC974D4 \n"
390 " LDR R1, =0xD25 \n"
391
392 "loc_FFC9752C:\n"
393 " LDR R0, =0xFFC94554 /*'ExpDrv.c'*/ \n"
394 " BL _DebugAssert \n"
395 " B loc_FFC974D4 \n"
396
397 "loc_FFC97538:\n"
398 " CMP R1, #0x27 \n"
399 " BNE loc_FFC97550 \n"
400
401 "loc_FFC97540:\n"
402 " LDR R0, [SP, #0x1C] \n"
403 " ADD R1, SP, #0xC \n"
404 " BL sub_FFC97394 \n"
405 " B loc_FFC974D4 \n"
406
407 "loc_FFC97550:\n"
408 " CMP R1, #0x2A \n"
409 " BNE loc_FFC97568 \n"
410 " BL sub_FFC76800 \n"
411 " BL sub_FFC775CC \n"
412 " BL sub_FFC77050 \n"
413 " B loc_FFC974D4 \n"
414
415 "loc_FFC97568:\n"
416 " LDR R0, [SP, #0x1C] \n"
417 " MOV R4, #1 \n"
418 " LDR R1, [R0] \n"
419 " CMP R1, #0x11 \n"
420 " CMPNE R1, #0x12 \n"
421 " BNE loc_FFC975D8 \n"
422 " LDR R1, [R0, #0x7C] \n"
423 " ADD R1, R1, R1, LSL#1 \n"
424 " ADD R1, R0, R1, LSL#2 \n"
425 " SUB R1, R1, #8 \n"
426 " LDMIA R1, {R2-R4} \n"
427 " STMIA R6, {R2-R4} \n"
428 " BL sub_FFC95F08 \n"
429 " LDR R0, [SP, #0x1C] \n"
430 " LDR R1, [R0, #0x7C] \n"
431 " LDR R3, [R0, #0x88] \n"
432 " LDR R2, [R0, #0x8C] \n"
433 " ADD R0, R0, #4 \n"
434 " BLX R3 \n"
435 " LDR R0, [SP, #0x1C] \n"
436 " BL sub_FFC98A20 \n"
437 " LDR R0, [SP, #0x1C] \n"
438 " LDR R1, [R0, #0x7C] \n"
439 " LDR R3, [R0, #0x90] \n"
440 " LDR R2, [R0, #0x94] \n"
441 " ADD R0, R0, #4 \n"
442 " BLX R3 \n"
443 " B loc_FFC9790C \n"
444
445 "loc_FFC975D8:\n"
446 " CMP R1, #0x13 \n"
447 " CMPNE R1, #0x14 \n"
448 " CMPNE R1, #0x15 \n"
449 " BNE loc_FFC9768C \n"
450 " ADD R3, SP, #0xC \n"
451 " MOV R2, SP \n"
452 " ADD R1, SP, #0x10 \n"
453 " BL sub_FFC96150 \n"
454 " CMP R0, #1 \n"
455 " MOV R4, R0 \n"
456 " CMPNE R4, #5 \n"
457 " BNE loc_FFC97628 \n"
458 " LDR R0, [SP, #0x1C] \n"
459 " MOV R2, R4 \n"
460 " LDR R1, [R0, #0x7C]! \n"
461 " LDR R12, [R0, #0xC]! \n"
462 " LDR R3, [R0, #4] \n"
463 " MOV R0, SP \n"
464 " BLX R12 \n"
465 " B loc_FFC97660 \n"
466
467 "loc_FFC97628:\n"
468 " LDR R0, [SP, #0x1C] \n"
469 " CMP R4, #2 \n"
470 " LDR R3, [R0, #0x8C] \n"
471 " CMPNE R4, #6 \n"
472 " BNE loc_FFC97674 \n"
473 " LDR R12, [R0, #0x88] \n"
474 " MOV R0, SP \n"
475 " MOV R2, R4 \n"
476 " MOV R1, #1 \n"
477 " BLX R12 \n"
478 " LDR R0, [SP, #0x1C] \n"
479 " MOV R2, SP \n"
480 " ADD R1, SP, #0x10 \n"
481 " BL sub_FFC970E0 \n"
482
483 "loc_FFC97660:\n"
484 " LDR R0, [SP, #0x1C] \n"
485 " LDR R2, [SP, #0xC] \n"
486 " MOV R1, R4 \n"
487 " BL sub_FFC97334 \n"
488 " B loc_FFC9790C \n"
489
490 "loc_FFC97674:\n"
491 " LDR R1, [R0, #0x7C] \n"
492 " LDR R12, [R0, #0x88] \n"
493 " ADD R0, R0, #4 \n"
494 " MOV R2, R4 \n"
495 " BLX R12 \n"
496 " B loc_FFC9790C \n"
497
498 "loc_FFC9768C:\n"
499 " CMP R1, #0x21 \n"
500 " CMPNE R1, #0x22 \n"
501 " BNE loc_FFC976D8 \n"
502 " LDR R1, [R0, #0x7C] \n"
503 " ADD R1, R1, R1, LSL#1 \n"
504 " ADD R1, R0, R1, LSL#2 \n"
505 " SUB R1, R1, #8 \n"
506 " LDMIA R1, {R2-R4} \n"
507 " STMIA R6, {R2-R4} \n"
508 " BL sub_FFC95488 \n"
509 " LDR R0, [SP, #0x1C] \n"
510 " LDR R1, [R0, #0x7C] \n"
511 " LDR R3, [R0, #0x88] \n"
512 " LDR R2, [R0, #0x8C] \n"
513 " ADD R0, R0, #4 \n"
514 " BLX R3 \n"
515 " LDR R0, [SP, #0x1C] \n"
516 " BL sub_FFC95784 \n"
517 " B loc_FFC9790C \n"
518
519 "loc_FFC976D8:\n"
520 " ADD R1, R0, #4 \n"
521 " LDMIA R1, {R2,R3,R12} \n"
522 " STMIA R6, {R2,R3,R12} \n"
523 " LDR R1, [R0] \n"
524 " CMP R1, #0x24 \n"
525 " ADDLS PC, PC, R1, LSL#2 \n"
526 " B loc_FFC978EC \n"
527 " B loc_FFC97788 \n"
528 " B loc_FFC97788 \n"
529 " B loc_FFC97790 \n"
530 " B loc_FFC97798 \n"
531 " B loc_FFC97798 \n"
532 " B loc_FFC97798 \n"
533 " B loc_FFC97788 \n"
534 " B loc_FFC97790 \n"
535 " B loc_FFC97798 \n"
536 " B loc_FFC97798 \n"
537 " B loc_FFC977F4 \n"
538 " B loc_FFC977F4 \n"
539 " B loc_FFC978E0 \n"
540 " B loc_FFC978E8 \n"
541 " B loc_FFC978E8 \n"
542 " B loc_FFC978E8 \n"
543 " B loc_FFC978E8 \n"
544 " B loc_FFC978EC \n"
545 " B loc_FFC978EC \n"
546 " B loc_FFC978EC \n"
547 " B loc_FFC978EC \n"
548 " B loc_FFC978EC \n"
549 " B loc_FFC977A0 \n"
550 " B loc_FFC977A8 \n"
551 " B loc_FFC977A8 \n"
552 " B loc_FFC97800 \n"
553 " B loc_FFC97800 \n"
554 " B loc_FFC97808 \n"
555 " B loc_FFC97838 \n"
556 " B loc_FFC97868 \n"
557 " B loc_FFC97898 \n"
558 " B loc_FFC978C8 \n"
559 " B loc_FFC978C8 \n"
560 " B loc_FFC978EC \n"
561 " B loc_FFC978EC \n"
562 " B loc_FFC978D0 \n"
563 " B loc_FFC978D8 \n"
564
565 "loc_FFC97788:\n"
566 " BL sub_FFC9433C \n"
567 " B loc_FFC978EC \n"
568
569 "loc_FFC97790:\n"
570 " BL sub_FFC945CC \n"
571 " B loc_FFC978EC \n"
572
573 "loc_FFC97798:\n"
574 " BL sub_FFC947D0 \n"
575 " B loc_FFC978EC \n"
576
577 "loc_FFC977A0:\n"
578 " BL sub_FFC94A38 \n"
579 " B loc_FFC978EC \n"
580
581 "loc_FFC977A8:\n"
582 " BL sub_FFC94C2C \n"
583 " B loc_FFC978EC \n"
584
585 "loc_FFC977F4:\n"
586 " BL sub_FFC94E94_my \n"
587 " MOV R4, #0 \n"
588 " B loc_FFC978EC \n"
589
590 "loc_FFC97800:\n"
591 " BL sub_FFC94FD0 \n"
592 " B loc_FFC978EC \n"
593
594 "loc_FFC97808:\n"
595 " LDRH R1, [R0, #4] \n"
596 " STRH R1, [SP, #0x10] \n"
597 " LDRH R1, [R5, #2] \n"
598 " STRH R1, [SP, #0x12] \n"
599 " LDRH R1, [R5, #4] \n"
600 " STRH R1, [SP, #0x14] \n"
601 " LDRH R1, [R5, #6] \n"
602 " STRH R1, [SP, #0x16] \n"
603 " LDRH R1, [R0, #0xC] \n"
604 " STRH R1, [SP, #0x18] \n"
605 " BL sub_FFC986BC \n"
606 " B loc_FFC978EC \n"
607
608 "loc_FFC97838:\n"
609 " LDRH R1, [R0, #4] \n"
610 " STRH R1, [SP, #0x10] \n"
611 " LDRH R1, [R5, #2] \n"
612 " STRH R1, [SP, #0x12] \n"
613 " LDRH R1, [R5, #4] \n"
614 " STRH R1, [SP, #0x14] \n"
615 " LDRH R1, [R5, #6] \n"
616 " STRH R1, [SP, #0x16] \n"
617 " LDRH R1, [R5, #8] \n"
618 " STRH R1, [SP, #0x18] \n"
619 " BL sub_FFC9883C \n"
620 " B loc_FFC978EC \n"
621
622 "loc_FFC97868:\n"
623 " LDRH R1, [R5] \n"
624 " STRH R1, [SP, #0x10] \n"
625 " LDRH R1, [R0, #6] \n"
626 " STRH R1, [SP, #0x12] \n"
627 " LDRH R1, [R5, #4] \n"
628 " STRH R1, [SP, #0x14] \n"
629 " LDRH R1, [R5, #6] \n"
630 " STRH R1, [SP, #0x16] \n"
631 " LDRH R1, [R5, #8] \n"
632 " STRH R1, [SP, #0x18] \n"
633 " BL sub_FFC988E8 \n"
634 " B loc_FFC978EC \n"
635
636 "loc_FFC97898:\n"
637 " LDRH R1, [R5] \n"
638 " STRH R1, [SP, #0x10] \n"
639 " LDRH R1, [R5, #2] \n"
640 " STRH R1, [SP, #0x12] \n"
641 " LDRH R1, [R5, #4] \n"
642 " STRH R1, [SP, #0x14] \n"
643 " LDRH R1, [R5, #6] \n"
644 " STRH R1, [SP, #0x16] \n"
645 " LDRH R1, [R0, #0xC] \n"
646 " STRH R1, [SP, #0x18] \n"
647 " BL sub_FFC98988 \n"
648 " B loc_FFC978EC \n"
649
650 "loc_FFC978C8:\n"
651 " BL sub_FFC95244 \n"
652 " B loc_FFC978EC \n"
653
654 "loc_FFC978D0:\n"
655 " BL sub_FFC95888 \n"
656 " B loc_FFC978EC \n"
657
658 "loc_FFC978D8:\n"
659 " BL sub_FFC95AC0 \n"
660 " B loc_FFC978EC \n"
661
662 "loc_FFC978E0:\n"
663 " BL sub_FFC95C38 \n"
664 " B loc_FFC978EC \n"
665
666 "loc_FFC978E8:\n"
667 " BL sub_FFC95DD0 \n"
668
669 "loc_FFC978EC:\n"
670 " LDR R0, [SP, #0x1C] \n"
671 " LDR R1, [R0, #0x7C] \n"
672 " LDR R3, [R0, #0x88] \n"
673 " LDR R2, [R0, #0x8C] \n"
674 " ADD R0, R0, #4 \n"
675 " BLX R3 \n"
676 " CMP R4, #1 \n"
677 " BNE loc_FFC97954 \n"
678
679 "loc_FFC9790C:\n"
680 " LDR R0, [SP, #0x1C] \n"
681 " MOV R2, #0xC \n"
682 " LDR R1, [R0, #0x7C] \n"
683 " ADD R1, R1, R1, LSL#1 \n"
684 " ADD R0, R0, R1, LSL#2 \n"
685 " SUB R4, R0, #8 \n"
686 " LDR R0, =0x3C63C \n"
687 " ADD R1, SP, #0x10 \n"
688 " BL sub_FFE668C4 \n"
689 " LDR R0, =0x3C648 \n"
690 " MOV R2, #0xC \n"
691 " ADD R1, SP, #0x10 \n"
692 " BL sub_FFE668C4 \n"
693 " LDR R0, =0x3C654 \n"
694 " MOV R2, #0xC \n"
695 " MOV R1, R4 \n"
696 " BL sub_FFE668C4 \n"
697 " B loc_FFC979CC \n"
698
699 "loc_FFC97954:\n"
700 " LDR R0, [SP, #0x1C] \n"
701 " LDR R0, [R0] \n"
702 " CMP R0, #0xB \n"
703 " BNE loc_FFC9799C \n"
704 " MOV R3, #0 \n"
705 " STR R3, [SP] \n"
706 " MOV R3, #1 \n"
707 " MOV R2, #1 \n"
708 " MOV R1, #1 \n"
709 " MOV R0, #0 \n"
710 " BL sub_FFC94144 \n"
711 " MOV R3, #0 \n"
712 " STR R3, [SP] \n"
713 " MOV R3, #1 \n"
714 " MOV R2, #1 \n"
715 " MOV R1, #1 \n"
716 " MOV R0, #0 \n"
717 " B loc_FFC979C8 \n"
718
719 "loc_FFC9799C:\n"
720 " MOV R3, #1 \n"
721 " MOV R2, #1 \n"
722 " MOV R1, #1 \n"
723 " MOV R0, #1 \n"
724 " STR R3, [SP] \n"
725 " BL sub_FFC94144 \n"
726 " MOV R3, #1 \n"
727 " MOV R2, #1 \n"
728 " MOV R1, #1 \n"
729 " MOV R0, #1 \n"
730 " STR R3, [SP] \n"
731
732 "loc_FFC979C8:\n"
733 " BL sub_FFC94284 \n"
734
735 "loc_FFC979CC:\n"
736 " LDR R0, [SP, #0x1C] \n"
737 " BL sub_FFC98648 \n"
738 " B loc_FFC97404 \n"
739 );
740 }
741
742
743
744 void __attribute__((naked,noinline)) sub_FFC94E94_my() {
745 asm volatile (
746 " STMFD SP!, {R4-R8,LR} \n"
747 " LDR R7, =0x66F8 \n"
748 " MOV R4, R0 \n"
749 " LDR R0, [R7, #0x1C] \n"
750 " MOV R1, #0x3E \n"
751 " BL sub_FFC178B8 /*_ClearEventFlag*/ \n"
752 " LDRSH R0, [R4, #4] \n"
753 " MOV R2, #0 \n"
754 " MOV R1, #0 \n"
755 " BL sub_FFC93ED8 \n"
756 " MOV R6, R0 \n"
757 " LDRSH R0, [R4, #6] \n"
758 " BL sub_FFC93FE4 \n"
759 " LDRSH R0, [R4, #8] \n"
760 " BL sub_FFC9403C \n"
761 " LDRSH R0, [R4, #0xA] \n"
762 " BL sub_FFC94094 \n"
763 " LDRSH R0, [R4, #0xC] \n"
764 " BL sub_FFC940EC \n"
765 " MOV R5, R0 \n"
766 " LDR R0, [R4] \n"
767 " LDR R8, =0x3C654 \n"
768 " CMP R0, #0xB \n"
769 " MOVEQ R6, #0 \n"
770 " MOVEQ R5, #0 \n"
771 " BEQ loc_FFC94F24 \n"
772 " CMP R6, #1 \n"
773 " BNE loc_FFC94F24 \n"
774 " LDRSH R0, [R4, #4] \n"
775 " LDR R1, =0xFFC93E44 \n"
776 " MOV R2, #2 \n"
777 " BL sub_FFD0C328 \n"
778 " STRH R0, [R4, #4] \n"
779 " MOV R0, #0 \n"
780 " STR R0, [R7, #0x28] \n"
781 " B loc_FFC94F2C \n"
782
783 "loc_FFC94F24:\n"
784 " LDRH R0, [R8] \n"
785 " STRH R0, [R4, #4] \n"
786
787 "loc_FFC94F2C:\n"
788 " CMP R5, #1 \n"
789 " LDRNEH R0, [R8, #8] \n"
790 " BNE loc_FFC94F48 \n"
791 " LDRSH R0, [R4, #0xC] \n"
792 " MOV R2, #0x20 \n"
793 " LDR R1, =0xFFC93EC8 \n"
794 " BL sub_FFC98678 \n"
795
796 "loc_FFC94F48:\n"
797 " STRH R0, [R4, #0xC] \n"
798 " LDRSH R0, [R4, #6] \n"
799 " BL sub_FFC7654C_my \n"
800 " LDR PC, =0xFFC94F54 \n"
801 );
802 }
803
804
805
806 void __attribute__((naked,noinline)) sub_FFC7654C_my() {
807 asm volatile (
808 " STMFD SP!, {R4-R6,LR} \n"
809 " LDR R5, =0x619C \n"
810 " MOV R4, R0 \n"
811 " LDR R0, [R5, #4] \n"
812 " CMP R0, #1 \n"
813 " LDRNE R1, =0x16D \n"
814 " LDRNE R0, =0xFFC762E4 /*'Shutter.c'*/ \n"
815 " BLNE _DebugAssert \n"
816 " CMN R4, #0xC00 \n"
817 " LDREQSH R4, [R5, #2] \n"
818 " CMN R4, #0xC00 \n"
819 " LDREQ R1, =0x173 \n"
820 " LDREQ R0, =0xFFC762E4 /*'Shutter.c'*/ \n"
821 " STRH R4, [R5, #2] \n"
822 " BLEQ _DebugAssert \n"
823 " MOV R0, R4 \n"
824 " BL apex2us \n"
825 " MOV R4, R0 \n"
826
827 " MOV R0, R4 \n"
828 " BL sub_FFCAA6BC \n"
829 " TST R0, #1 \n"
830 " LDMNEFD SP!, {R4-R6,LR} \n"
831 " MOVNE R1, #0x178 \n"
832 " LDRNE R0, =0xFFC762E4 /*'Shutter.c'*/ \n"
833 " BNE _DebugAssert \n"
834 " LDMFD SP!, {R4-R6,PC} \n"
835 );
836 }