root/loader/g16/main.c

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DEFINITIONS

This source file includes following definitions.
  1. xblinker
  2. my_restart

   1 #include "../generic/check_compat.c"
   2 
   3 extern long *blob_chdk_core;
   4 extern long blob_chdk_core_size;
   5 
   6 #define LED_PR     0xd20b0994       // G16 green LED on OVF bezel                                                                              
   7 #define LED_PWR    0xd20b0884       // G16 green LED on power button
   8 #define LED_ORANGE 0xd20b0888       // G16 orange LED on OVF bezel
   9 
  10 
  11 #if 0
  12 void xblinker(int j) 
  13 {
  14     while(j-- > 0) {
  15         int i;
  16         *(volatile int*)LED_ORANGE = 0x4d0002;
  17         for(i=0;i<3000000;i++) {
  18             asm volatile(
  19             "nop\n"
  20             );
  21         }
  22         *(volatile int*)LED_ORANGE = 0x4c0003;
  23         for(i=0;i<2000000;i++) {
  24             asm volatile(
  25             "nop\n"
  26             );
  27         }
  28     }
  29 
  30     j=30 ;
  31     while(--j>0) {
  32         int i;
  33         for(i=0;i<2000000;i++) {
  34             asm volatile(
  35             "nop\n"
  36             );
  37         }
  38     }
  39 }
  40 #endif
  41 
  42       
  43 void __attribute__((noreturn)) my_restart()
  44 {
  45     
  46     //xblinker(3) ;
  47     
  48     check_compat();
  49 
  50     long *dst = (long*)MEMISOSTART;
  51     const long *src = blob_chdk_core;
  52     long length = (blob_chdk_core_size + 3) >> 2;
  53 
  54     core_copy(src, dst, length);
  55 
  56     // light up green LED
  57     //*(int*)0xd20b0994 = 0x4d0002;
  58     
  59     // light up orange LED
  60     //*(int*)0xd20b0888 = 0x4d0002;
  61     
  62     // allows boot on short press without fiddling elsewhere
  63     *(volatile unsigned *)(0x4ffc)=0x12345678;  // @ 0xfc0b59ee for g16 100h 101a 101c
  64     
  65     //xblinker(2) ;
  66 
  67     asm volatile ( 
  68     
  69     "mov     r1, %1\n"
  70     "mov     r0, %0\n"
  71     
  72     //"ldr     r2, =0xfc13c4d7\n" // caching related routine called at fw startup after ROM->RAM code copy
  73     //"blx     r2\n"              // G16 1.00h 0xfc13c4d6   1.01a  0xfc13c4d6  1.01c 0xfc13c50e   
  74     
  75             "    cmp.w   r1, #0x4000\n"
  76             "    bhs     L2\n"
  77             "    dsb     sy\n"
  78             "    add     r1, r0\n"
  79             "    bic     r0, r0, #0x1f\n"
  80             "L1:\n"
  81             "    mcr     p15, #0, r0, c7, c10, #1\n"
  82             "    add.w   r0, r0, #0x20\n"
  83             "    cmp     r0, r1\n"
  84             "    blo     L1\n"
  85             "    dsb     sy\n"
  86             "    b L5\n"
  87             "L2:\n"
  88             "    dsb     sy\n"
  89             "    mov.w   r1, #0\n"
  90             "L3:\n"
  91             "    mov.w   r0, #0\n"
  92             "L4:\n"
  93             "    orr.w   r2, r1, r0\n"
  94             "    mcr     p15, #0, r2, c7, c10, #2\n"
  95             "    add.w   r0, r0, #0x20\n"
  96             "    cmp.w   r0, #0x1000\n"
  97             "    bne     L4\n"
  98             "    add.w   r1, r1, #0x40000000\n"
  99             "    cmp     r1, #0\n"
 100             "    bne     L3\n"
 101             "    dsb     sy\n"
 102             "L5:\n"
 103 
 104     // start execution at MEMISOSTART in thumb mode    
 105     "mov     r0, %0\n"
 106     "add     r0, r0, #1\n"
 107     "bx      r0\n"
 108     : : "r"(MEMISOSTART), "r"(((blob_chdk_core_size+3)>>2)<<2) : "memory","r0","r1","r2","r3","r4"
 109     );
 110     while(1);
 111 }
 112 

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