root/platform/sx1/sub/201a/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskCreateHook
  2. taskCreateHook2
  3. CreateTask_spytask
  4. boot
  5. sub_FF8101A0_my
  6. sub_FF810F94_my
  7. sub_FF814D8C_my
  8. taskcreate_Startup_my
  9. task_Startup_my
  10. init_file_modules_task
  11. sub_FF87E498_my
  12. sub_FF85DEF4_my
  13. sub_FF85DD30_my
  14. sub_FF85DAC0_my
  15. JogDial_task_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 const char * const new_sa = &_end;
   6 
   7 void JogDial_task_my(void);
   8 
   9 void taskCreateHook(int *p) { 
  10  p-=17;
  11  if (p[0]==0xFF86CB80)  p[0]=(int)capt_seq_task;
  12  if (p[0]==0xFF821764)  p[0]=(int)mykbd_task;
  13  if (p[0]==0xFF8892BC)  p[0]=(int)init_file_modules_task;
  14  if (p[0]==0xFF84DAF0)  p[0]=(int)JogDial_task_my;
  15  if (p[0]==0xFF867D90)  p[0]=(int)movie_record_task;
  16  if (p[0]==0xFF8B3E4C)  p[0]=(int)exp_drv_task;
  17 }
  18 
  19 void taskCreateHook2(int *p) { 
  20  p-=17;
  21  if (p[0]==0xFF8892BC)  p[0]=(int)init_file_modules_task;
  22  if (p[0]==0xFF8B3E4C)  p[0]=(int)exp_drv_task;
  23 }
  24 
  25 void CreateTask_spytask() {
  26         _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  27 };
  28 
  29 
  30 void __attribute__((naked,noinline)) boot() {
  31     asm volatile (
  32                  "LDR     R1, =0xC0410000\n"
  33                  "MOV     R0, #0\n"
  34                  "STR     R0, [R1]\n"
  35                  "MOV     R1, #0x78\n"
  36                  "MCR     p15, 0, R1,c1,c0\n"
  37                  "MOV     R1, #0\n"
  38                  "MCR     p15, 0, R1,c7,c10, 4\n"
  39                  "MCR     p15, 0, R1,c7,c5\n"
  40                  "MCR     p15, 0, R1,c7,c6\n"
  41                  "MOV     R0, #0x3D\n"
  42                  "MCR     p15, 0, R0,c6,c0\n"
  43                  "MOV     R0, #0xC000002F\n"
  44                  "MCR     p15, 0, R0,c6,c1\n"
  45                  "MOV     R0, #0x35\n"
  46                  "MCR     p15, 0, R0,c6,c2\n"
  47                  "MOV     R0, #0x40000035\n"
  48                  "MCR     p15, 0, R0,c6,c3\n"
  49                  "MOV     R0, #0x80000017\n"
  50                  "MCR     p15, 0, R0,c6,c4\n"
  51                  "LDR     R0, =0xFF80002D\n"
  52                  "MCR     p15, 0, R0,c6,c5\n"
  53                  "MOV     R0, #0x34\n"
  54                  "MCR     p15, 0, R0,c2,c0\n"
  55                  "MOV     R0, #0x34\n"
  56                  "MCR     p15, 0, R0,c2,c0, 1\n"
  57                  "MOV     R0, #0x34\n"
  58                  "MCR     p15, 0, R0,c3,c0\n"
  59                  "LDR     R0, =0x3333330\n"
  60                  "MCR     p15, 0, R0,c5,c0, 2\n"
  61                  "LDR     R0, =0x3333330\n"
  62                  "MCR     p15, 0, R0,c5,c0, 3\n"
  63                  "MRC     p15, 0, R0,c1,c0\n"
  64                  "ORR     R0, R0, #0x1000\n"
  65                  "ORR     R0, R0, #4\n"
  66                  "ORR     R0, R0, #1\n"
  67                  "MCR     p15, 0, R0,c1,c0\n"
  68                  "MOV     R1, #0x80000006\n"
  69                  "MCR     p15, 0, R1,c9,c1\n"
  70                  "MOV     R1, #6\n"
  71                  "MCR     p15, 0, R1,c9,c1, 1\n"
  72                  "MRC     p15, 0, R1,c1,c0\n"
  73                  "ORR     R1, R1, #0x50000\n"
  74                  "MCR     p15, 0, R1,c1,c0\n"
  75                  "LDR     R2, =0xC0200000\n"
  76                  "MOV     R1, #1\n"
  77                  "STR     R1, [R2,#0x10C]\n"
  78                  "MOV     R1, #0xFF\n"
  79                  "STR     R1, [R2,#0xC]\n"
  80                  "STR     R1, [R2,#0x1C]\n"
  81                  "STR     R1, [R2,#0x2C]\n"
  82                  "STR     R1, [R2,#0x3C]\n"
  83                  "STR     R1, [R2,#0x4C]\n"
  84                  "STR     R1, [R2,#0x5C]\n"
  85                  "STR     R1, [R2,#0x6C]\n"
  86                  "STR     R1, [R2,#0x7C]\n"
  87                  "STR     R1, [R2,#0x8C]\n"
  88                  "STR     R1, [R2,#0x9C]\n"
  89                  "STR     R1, [R2,#0xAC]\n"
  90                  "STR     R1, [R2,#0xBC]\n"
  91                  "STR     R1, [R2,#0xCC]\n"
  92                  "STR     R1, [R2,#0xDC]\n"
  93                  "STR     R1, [R2,#0xEC]\n"
  94                  "STR     R1, [R2,#0xFC]\n"
  95                  "LDR     R1, =0xC0400008\n"
  96                  "LDR     R2, =0x430005\n"
  97                  "STR     R2, [R1]\n"
  98                  "MOV     R1, #1\n"
  99                  "LDR     R2, =0xC0243100\n"
 100                  "STR     R2, [R1]\n"
 101                  "LDR     R2, =0xC0242010\n"
 102                  "LDR     R1, [R2]\n"
 103                  "ORR     R1, R1, #1\n"
 104                  "STR     R1, [R2]\n"
 105                  "LDR     R0, =0xFFBE2C7C\n"
 106                  "LDR     R1, =0x1900\n"
 107                  "LDR     R3, =0x11934\n"
 108  "loc_FF81013C:\n"
 109                  "CMP     R1, R3\n"
 110                  "LDRCC   R2, [R0],#4\n"
 111                  "STRCC   R2, [R1],#4\n"
 112                  "BCC     loc_FF81013C\n"
 113                  "LDR     R1, =0xC2D08\n"
 114                  "MOV     R2, #0\n"
 115  "loc_FF810154:\n"
 116                  "CMP     R3, R1\n"
 117                  "STRCC   R2, [R3],#4\n"
 118                  "BCC     loc_FF810154\n"
 119                  "B       sub_FF8101A0_my\n"   //---------->
 120     );
 121 };
 122 
 123 
 124 void __attribute__((naked,noinline)) sub_FF8101A0_my() {
 125    *(int*)0x1930=(int)taskCreateHook;
 126    *(int*)0x1934=(int)taskCreateHook2;
 127    *(int*)(0x2658+4)= (*(int*)0xC0220134)&1 ? 0x2000000 : 0x1000000; // replacement of sub_FF8218A8 for correct power-on.
 128    asm volatile (
 129                  "LDR     R0, =0xFF810218\n"
 130                  "MOV     R1, #0\n"
 131                  "LDR     R3, =0xFF810250\n"
 132  "loc_FF8101AC:\n"
 133                  "CMP     R0, R3\n"
 134                  "LDRCC   R2, [R0],#4\n"
 135                  "STRCC   R2, [R1],#4\n"
 136                  "BCC     loc_FF8101AC\n"
 137                  "LDR     R0, =0xFF810250\n"
 138                  "MOV     R1, #0x4B0\n"
 139                  "LDR     R3, =0xFF810464\n"
 140  "loc_FF8101C8:\n"
 141                  "CMP     R0, R3\n"
 142                  "LDRCC   R2, [R0],#4\n"
 143                  "STRCC   R2, [R1],#4\n"
 144                  "BCC     loc_FF8101C8\n"
 145                  "MOV     R0, #0xD2\n"
 146                  "MSR     CPSR_cxsf, R0\n"
 147                  "MOV     SP, #0x1000\n"
 148                  "MOV     R0, #0xD3\n"
 149                  "MSR     CPSR_cxsf, R0\n"
 150                  "MOV     SP, #0x1000\n"
 151                  "LDR     R0, =0x6C4\n"
 152                  "LDR     R2, =0xEEEEEEEE\n"
 153                  "MOV     R3, #0x1000\n"
 154  "loc_FF8101FC:\n"
 155                  "CMP     R0, R3\n"
 156                  "STRCC   R2, [R0],#4\n"
 157                  "BCC     loc_FF8101FC\n"
 158                  "BL      sub_FF810F94_my\n"  //------------>
 159      );
 160 }
 161 
 162 void __attribute__((naked,noinline)) sub_FF810F94_my() {
 163      asm volatile (
 164                  "STR     LR, [SP,#-4]!\n"
 165                  "SUB     SP, SP, #0x74\n"
 166                  "MOV     R0, SP\n"
 167                  "MOV     R1, #0x74\n"
 168                  "BL      sub_FFB26CD4\n"
 169                  "MOV     R0, #0x53000\n"
 170                  "STR     R0, [SP,#4]\n"
 171             //   "LDR     R0, =0xC2D08\n"
 172                  "LDR     R0, =new_sa\n"        // +
 173                  "LDR     R0, [R0]\n"           // +
 174                  "LDR     R2, =0x379C00\n"
 175                  "LDR     R1, =0x3724A8\n"
 176                  "STR     R0, [SP,#8]\n"
 177                  "SUB     R0, R1, R0\n"
 178                  "ADD     R3, SP, #0xC\n"
 179                  "STR     R2, [SP]\n"
 180                  "STMIA   R3, {R0-R2}\n"
 181                  "MOV     R0, #0x22\n"
 182                  "STR     R0, [SP,#0x18]\n"
 183                  "MOV     R0, #0x68\n"
 184                  "STR     R0, [SP,#0x1C]\n"
 185                  "LDR     R0, =0x19B\n"
 186                  "LDR     R1, =sub_FF814D8C_my\n"  //------------>
 187                  "STR     R0, [SP,#0x20]\n"
 188                  "MOV     R0, #0x96\n"
 189                  "STR     R0, [SP,#0x24]\n"
 190                  "MOV     R0, #0x78\n"
 191                  "STR     R0, [SP,#0x28]\n"
 192                  "MOV     R0, #0x64\n"
 193                  "STR     R0, [SP,#0x2C]\n"
 194                  "MOV     R0, #0\n"
 195                  "STR     R0, [SP,#0x30]\n"
 196                  "STR     R0, [SP,#0x34]\n"
 197                  "MOV     R0, #0x10\n"
 198                  "STR     R0, [SP,#0x5C]\n"
 199                  "MOV     R0, #0x800\n"
 200                  "STR     R0, [SP,#0x60]\n"
 201                  "MOV     R0, #0xA0\n"
 202                  "STR     R0, [SP,#0x64]\n"
 203                  "MOV     R0, #0x280\n"
 204                  "STR     R0, [SP,#0x68]\n"
 205                  "MOV     R0, SP\n"
 206                  "MOV     R2, #0\n"
 207                  "BL      sub_FF812D38\n"
 208                  "ADD     SP, SP, #0x74\n"
 209                  "LDR     PC, [SP],#4\n"
 210      );
 211 }
 212 
 213 
 214 void __attribute__((naked,noinline)) sub_FF814D8C_my() {
 215         asm volatile (
 216                  "STMFD   SP!, {R4,LR}\n"
 217                  "BL      sub_FF810940\n"
 218                  "BL      sub_FF81901C\n"
 219                  "CMP     R0, #0\n"
 220                  "LDRLT   R0, =0xFF814EA0\n"   // "dmSetup"
 221                  "BLLT    sub_FF814E80\n"
 222                  "BL      sub_FF8149B4\n"
 223                  "CMP     R0, #0\n"
 224                  "LDRLT   R0, =0xFF814EA8\n"   //"termDriverInit"
 225                  "BLLT    sub_FF814E80\n"
 226                  "LDR     R0, =0xFF814EB8\n"   //"/_term"
 227                  "BL      sub_FF814A9C\n"
 228                  "CMP     R0, #0\n"
 229                  "LDRLT   R0, =0xFF814EC0\n"   //"termDeviceCreate"
 230                  "BLLT    sub_FF814E80\n"
 231                  "LDR     R0, =0xFF814EB8\n"   //";_term"
 232                  "BL      sub_FF813548\n"
 233                  "CMP     R0, #0\n"
 234                  "LDRLT   R0, =0xFF814ED4\n"   //"stdioSetup"
 235                  "BLLT    sub_FF814E80\n"
 236                  "BL      sub_FF818BA4\n"
 237                  "CMP     R0, #0\n"
 238                  "LDRLT   R0, =0xFF814EE0\n"   //"stdlibSetup"
 239                  "BLLT    sub_FF814E80\n"
 240                  "BL      sub_FF811478\n"
 241                  "CMP     R0, #0\n"
 242                  "LDRLT   R0, =0xFF814EEC\n"   //"armlib_setup"
 243                  "BLLT    sub_FF814E80\n"
 244                  "LDMFD   SP!, {R4,LR}\n"
 245                  "B       taskcreate_Startup_my\n" //---------->
 246         );
 247 };
 248 
 249 
 250 void __attribute__((naked,noinline)) taskcreate_Startup_my()  //sub_FF81C1A8 Replacement
 251     { asm volatile (
 252                  "STMFD   SP!, {R3,LR}\n"
 253         //       "BL      j_nullsub_259\n"
 254                  "BL      sub_FF8299E8\n"
 255                  "CMP     R0, #0\n"
 256                  "BNE     loc_FF81C1E0\n"
 257                  "BL      sub_FF82189C\n"
 258                  "CMP     R0, #0\n"
 259                  "BNE     loc_FF81C1E0\n"
 260                  "BL      sub_FF82104C\n"
 261                  "LDR     R1, =0xC0220000\n"
 262                  "MOV     R0, #0x44\n"
 263                  "STR     R0, [R1,#0x1C]\n"
 264                  "BL      sub_FF821238\n"
 265  "loc_FF81C1DC:\n"
 266                  "B       loc_FF81C1DC\n"
 267  "loc_FF81C1E0:\n"
 268       //        "BL      sub_FF8218A8\n"   // removed for correct power-on on 'on/off' button.
 269       //           "BL      j_nullsub_260\n"  // removed for correct power-on on 'on/off' button.
 270                  "BL      sub_FF827B68\n"
 271                  "LDR     R1, =0x3CE000\n"
 272                  "MOV     R0, #0\n"
 273                  "BL      sub_FF827FB0\n"
 274                  "BL      sub_FF827D5C\n"
 275                  "MOV     R3, #0\n"
 276                  "STR     R3, [SP]\n"
 277                  "LDR     R3, =task_Startup_my\n"   //------------>
 278                  "MOV     R2, #0\n"
 279                  "MOV     R1, #0x19\n"
 280                  "LDR     R0, =0xFF81C228\n"
 281                  "BL      sub_FF81AEF4\n"
 282                  "MOV     R0, #0\n"
 283                  "LDMFD   SP!, {R12,PC}\n"
 284      );
 285 }
 286 
 287 void __attribute__((naked,noinline)) task_Startup_my() {
 288      asm volatile (
 289                  "STMFD   SP!, {R4,LR}\n"
 290                  "BL      sub_FF8153CC\n"
 291                  "BL      sub_FF822A04\n"
 292                  "BL      sub_FF820CE8\n" 
 293       //         "BL      j_nullsub_263\n"
 294                  "BL      sub_FF829BF0\n"
 295       //         "BL      sub_FF829AB0\n"    // start diskboot.bin
 296                  "BL      sub_FF829DB0\n"
 297                  "BL      sub_FF81FAA0\n"
 298                  "BL      sub_FF829C40\n"
 299                  "BL      sub_FF827168\n"
 300                  "BL      sub_FF829DB4\n"
 301                  "BL      CreateTask_spytask\n"    // +
 302                  "BL      sub_FF821798\n"
 303                  "BL      sub_FF824A14\n"
 304                  "BL      sub_FF829DCC\n"
 305       //         "BL      nullsub_2\n"
 306                  "BL      sub_FF82062C\n"
 307                  "BL      sub_FF8297BC\n"
 308                  "BL      sub_FF820C98\n"
 309                  "BL      sub_FF820548\n"
 310                  "BL      sub_FF81FAD4\n"
 311                  "BL      sub_FF82AA98\n"
 312                  "BL      sub_FF820520\n"
 313                  "LDMFD   SP!, {R4,LR}\n"
 314                  "B       sub_FF815490\n"
 315      );
 316 }
 317 
 318 
 319 void __attribute__((naked,noinline)) init_file_modules_task() {  // ROM:FF8892BC
 320  asm volatile(
 321                  "STMFD   SP!, {R4-R6,LR}\n"
 322                  "BL      sub_FF87E46C\n"
 323                  "LDR     R5, =0x5006\n"
 324                  "MOVS    R4, R0\n"
 325                  "MOVNE   R1, #0\n"
 326                  "MOVNE   R0, R5\n"
 327                  "BLNE    sub_FF8832D8\n"
 328                  "BL      sub_FF87E498_my\n"           //---------->
 329                  "BL      core_spytask_can_start\n"      // CHDK: Set "it's-save-to-start"-Flag for spytask
 330                  "CMP     R4, #0\n"
 331                  "MOVEQ   R0, R5\n"
 332                  "LDMEQFD SP!, {R4-R6,LR}\n"
 333                  "MOVEQ   R1, #0\n"
 334                  "BEQ     sub_FF8832D8\n"
 335                  "LDMFD   SP!, {R4-R6,PC}\n"
 336  );
 337 }
 338 
 339 void __attribute__((naked,noinline)) sub_FF87E498_my() {
 340  asm volatile(
 341                  "STMFD   SP!, {R4,LR}\n"
 342                  "BL      sub_FF85DEF4_my\n"    //----------->
 343            //    "BL      nullsub_99\n"
 344                  "LDR     R4, =0x5A50\n"
 345                  "LDR     R0, [R4,#4]\n"
 346                  "CMP     R0, #0\n"
 347                  "BNE     loc_FF87E4CC\n"
 348                  "BL      sub_FF85D3BC\n"
 349                  "BL      sub_FF925310\n"
 350                  "BL      sub_FF85D3BC\n"
 351                  "BL      sub_FF859290\n"
 352                  "BL      sub_FF85D2BC\n"
 353                  "BL      sub_FF9253DC\n"
 354  "loc_FF87E4CC:\n"
 355                  "MOV     R0, #1\n"
 356                  "STR     R0, [R4]\n"
 357                  "LDMFD   SP!, {R4,PC}\n"
 358  );
 359 }
 360 
 361 void __attribute__((naked,noinline)) sub_FF85DEF4_my() {
 362  asm volatile(
 363                  "STMFD   SP!, {R4-R6,LR}\n"
 364                  "MOV     R6, #0\n"
 365                  "MOV     R0, R6\n"
 366                  "BL      sub_FF85D9B4\n"
 367                  "LDR     R4, =0x1B858\n"
 368                  "MOV     R5, #0\n"
 369                  "LDR     R0, [R4,#0x38]\n"
 370                  "BL      sub_FF85E414\n"
 371                  "CMP     R0, #0\n"
 372                  "LDREQ   R0, =0x2BD8\n"
 373                  "STREQ   R5, [R0,#0x10]\n"
 374                  "STREQ   R5, [R0,#0x14]\n"
 375                  "STREQ   R5, [R0,#0x18]\n"
 376                  "MOV     R0, R6\n"
 377                  "BL      sub_FF85D9F4\n"
 378                  "MOV     R0, R6\n"
 379                  "BL      sub_FF85DD30_my\n"     //--------->
 380                  "MOV     R5, R0\n"
 381                  "MOV     R0, R6\n"
 382                  "BL      sub_FF85DD9C\n"
 383                  "LDR     R1, [R4,#0x3C]\n"
 384                  "AND     R2, R5, R0\n"
 385                  "CMP     R1, #0\n"
 386                  "MOV     R0, #0\n"
 387                  "MOVEQ   R0, #0x80000001\n"
 388                  "BEQ     loc_FF85DF88\n"
 389                  "LDR     R3, [R4,#0x2C]\n"
 390                  "CMP     R3, #2\n"
 391                  "MOVEQ   R0, #4\n"
 392                  "CMP     R1, #5\n"
 393                  "ORRNE   R0, R0, #1\n"
 394                  "BICEQ   R0, R0, #1\n"
 395                  "CMP     R2, #0\n"
 396                  "BICEQ   R0, R0, #2\n"
 397                  "ORREQ   R0, R0, #0x80000000\n"
 398                  "BICNE   R0, R0, #0x80000000\n"
 399                  "ORRNE   R0, R0, #2\n"
 400  "loc_FF85DF88:\n"
 401                  "STR     R0, [R4,#0x40]\n"
 402                  "LDMFD   SP!, {R4-R6,PC}\n"
 403  );
 404 }
 405 
 406 void __attribute__((naked,noinline)) sub_FF85DD30_my() {
 407  asm volatile(
 408                  "STMFD   SP!, {R4-R6,LR}\n"
 409                  "LDR     R5, =0x2BD8\n"
 410                  "MOV     R6, R0\n"
 411                  "LDR     R0, [R5,#0x14]\n"
 412                  "CMP     R0, #0\n"
 413                  "MOVNE   R0, #1\n"
 414                  "LDMNEFD SP!, {R4-R6,PC}\n"
 415                  "MOV     R0, #0x17\n"
 416                  "MUL     R1, R0, R6\n"
 417                  "LDR     R0, =0x1B858\n"
 418                  "ADD     R4, R0, R1,LSL#2\n"
 419                  "LDR     R0, [R4,#0x38]\n"
 420                  "MOV     R1, R6\n"
 421                  "BL      sub_FF85DAC0_my\n"  //-------------->
 422                  "CMP     R0, #0\n"
 423                  "LDMEQFD SP!, {R4-R6,PC}\n"
 424                  "LDR     R0, [R4,#0x38]\n"
 425                  "MOV     R1, R6\n"
 426                  "BL      sub_FF85DC28\n"
 427                  "CMP     R0, #0\n"
 428                  "LDMEQFD SP!, {R4-R6,PC}\n"
 429                  "MOV     R0, R6\n"
 430                  "BL      sub_FF85D5BC\n"
 431                  "CMP     R0, #0\n"
 432                  "MOVNE   R1, #1\n"
 433                  "STRNE   R1, [R5,#0x14]\n"
 434                  "LDMFD   SP!, {R4-R6,PC}\n"
 435  );
 436 }
 437 
 438 void __attribute__((naked,noinline)) sub_FF85DAC0_my() {
 439  asm volatile(
 440                  "STMFD   SP!, {R4-R8,LR}\n"
 441                  "MOV     R8, R0\n"
 442                  "MOV     R0, #0x17\n"
 443                  "MUL     R1, R0, R1\n"
 444                  "LDR     R0, =0x1B858\n"
 445                  "MOV     R6, #0\n"
 446                  "ADD     R7, R0, R1,LSL#2\n"
 447                  "LDR     R0, [R7,#0x3C]\n"
 448                  "MOV     R5, #0\n"
 449                  "CMP     R0, #6\n"
 450                  "ADDLS   PC, PC, R0,LSL#2\n"
 451                  "B       loc_FF85DC0C\n"
 452  "loc_FF85DAF0:\n"
 453                  "B       loc_FF85DB24\n"
 454  "loc_FF85DAF4:\n"
 455                  "B       loc_FF85DB0C\n"
 456  "loc_FF85DAF8:\n"
 457                  "B       loc_FF85DB0C\n"
 458  "loc_FF85DAFC:\n"
 459                  "B       loc_FF85DB0C\n"
 460  "loc_FF85DB00:\n"
 461                  "B       loc_FF85DB0C\n"
 462  "loc_FF85DB04:\n"
 463                  "B       loc_FF85DC04\n"
 464  "loc_FF85DB08:\n"
 465                  "B       loc_FF85DB0C\n"
 466  "loc_FF85DB0C:\n"
 467                  "MOV     R2, #0\n"
 468                  "MOV     R1, #0x200\n"
 469                  "MOV     R0, #2\n"
 470                  "BL      sub_FF8783D0\n"
 471                  "MOVS    R4, R0\n"
 472                  "BNE     loc_FF85DB2C\n"
 473  "loc_FF85DB24:\n"
 474                  "MOV     R0, #0\n"
 475                  "LDMFD   SP!, {R4-R8,PC}\n"
 476  "loc_FF85DB2C:\n"
 477                  "LDR     R12, [R7,#0x4C]\n"
 478                  "MOV     R3, R4\n"
 479                  "MOV     R2, #1\n"
 480                  "MOV     R1, #0\n"
 481                  "MOV     R0, R8\n"
 482                  "BLX     R12\n"
 483                  "CMP     R0, #1\n"
 484                  "BNE     loc_FF85DB58\n"
 485                  "MOV     R0, #2\n"
 486                  "BL      sub_FF87851C\n"
 487                  "B       loc_FF85DB24\n"
 488  "loc_FF85DB58:\n"
 489                  "MOV     R0, R8\n"
 490                  "BL      sub_FF93E130\n"
 491 
 492                  "MOV   R1, R4\n"           //  pointer to MBR in R1
 493                  "BL    mbr_read_dryos\n"   //  total sectors count in R0 before and after call
 494 
 495           // Start of DataGhost's FAT32 autodetection code
 496           // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 497           // According to the code below, we can use R1, R2, R3 and R12.
 498           // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 499           // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 500           "MOV     R12, R4\n"                    // Copy the MBR start address so we have something to work with
 501           "MOV     LR, R4\n"                     // Save old offset for MBR signature
 502           "MOV     R1, #1\n"                     // Note the current partition number
 503           "B       dg_sd_fat32_enter\n"          // We actually need to check the first partition as well, no increments yet!
 504      "dg_sd_fat32:\n"
 505           "CMP     R1, #4\n"                     // Did we already see the 4th partition?
 506           "BEQ     dg_sd_fat32_end\n"            // Yes, break. We didn't find anything, so don't change anything.
 507           "ADD     R12, R12, #0x10\n"            // Second partition
 508           "ADD     R1, R1, #1\n"                 // Second partition for the loop
 509      "dg_sd_fat32_enter:\n"
 510           "LDRB    R2, [R12, #0x1BE]\n"          // Partition status
 511           "LDRB    R3, [R12, #0x1C2]\n"          // Partition type (FAT32 = 0xB)
 512           "CMP     R3, #0xB\n"                   // Is this a FAT32 partition?
 513           "CMPNE   R3, #0xC\n"                   // Not 0xB, is it 0xC (FAT32 LBA) then?
 514           "BNE     dg_sd_fat32\n"                // No, it isn't. Loop again.
 515           "CMP     R2, #0x00\n"                  // It is, check the validity of the partition type
 516           "CMPNE   R2, #0x80\n"
 517           "BNE     dg_sd_fat32\n"                // Invalid, go to next partition
 518                                                  // This partition is valid, it's the first one, bingo!
 519           "MOV     R4, R12\n"                    // Move the new MBR offset for the partition detection.
 520           
 521      "dg_sd_fat32_end:\n"
 522           // End of DataGhost's FAT32 autodetection code
 523 
 524                  "LDRB    R1, [R4,#0x1C9]\n"
 525                  "LDRB    R3, [R4,#0x1C8]\n"
 526                  "LDRB    R12, [R4,#0x1CC]\n"
 527                  "MOV     R1, R1,LSL#24\n"
 528                  "ORR     R1, R1, R3,LSL#16\n"
 529                  "LDRB    R3, [R4,#0x1C7]\n"
 530                  "LDRB    R2, [R4,#0x1BE]\n"
 531              //  "LDRB    LR, [R4,#0x1FF]\n"           // -
 532                  "ORR     R1, R1, R3,LSL#8\n"
 533                  "LDRB    R3, [R4,#0x1C6]\n"
 534                  "CMP     R2, #0\n"
 535                  "CMPNE   R2, #0x80\n"
 536                  "ORR     R1, R1, R3\n"
 537                  "LDRB    R3, [R4,#0x1CD]\n"
 538                  "MOV     R3, R3,LSL#24\n"
 539                  "ORR     R3, R3, R12,LSL#16\n"
 540                  "LDRB    R12, [R4,#0x1CB]\n"
 541                  "ORR     R3, R3, R12,LSL#8\n"
 542                  "LDRB    R12, [R4,#0x1CA]\n"
 543                  "ORR     R3, R3, R12\n"
 544              //  "LDRB    R12, [R4,#0x1FE]\n"           // -
 545                  "LDRB    R12, [LR,#0x1FE]\n"           // + First MBR signature byte (0x55), LR is original offset.
 546                  "LDRB    LR, [LR,#0x1FF]\n"            // + Last MBR signature byte (0xAA), LR is original offset.
 547                  "MOV     R4, #0\n"
 548                  "BNE     loc_FF85DBE0\n"
 549                  "CMP     R0, R1\n"
 550                  "BCC     loc_FF85DBE0\n"
 551                  "ADD     R2, R1, R3\n"
 552                  "CMP     R2, R0\n"
 553                  "CMPLS   R12, #0x55\n"
 554                  "CMPEQ   LR, #0xAA\n"
 555                  "MOVEQ   R6, R1\n"
 556                  "MOVEQ   R5, R3\n"
 557                  "MOVEQ   R4, #1\n"
 558  "loc_FF85DBE0:\n"
 559                  "MOV     R0, #2\n"
 560                  "BL      sub_FF87851C\n"
 561                  "CMP     R4, #0\n"
 562                  "BNE     loc_FF85DC18\n"
 563                  "MOV     R6, #0\n"
 564                  "MOV     R0, R8\n"
 565                  "BL      sub_FF93E130\n"
 566                  "MOV     R5, R0\n"
 567                  "B       loc_FF85DC18\n"
 568  "loc_FF85DC04:\n"
 569                  "MOV     R5, #0x40\n"
 570                  "B       loc_FF85DC18\n"
 571  "loc_FF85DC0C:\n"
 572                  "LDR     R1, =0x37A\n"
 573                  "LDR     R0, =0xFF85DAB4\n"
 574                  "BL      sub_FF81B1CC\n"
 575  "loc_FF85DC18:\n"
 576                  "STR     R6, [R7,#0x44]!\n"
 577                  "MOV     R0, #1\n"
 578                  "STR     R5, [R7,#4]\n"
 579                  "LDMFD   SP!, {R4-R8,PC}\n"
 580  );
 581 }
 582 
 583 
 584 void __attribute__((naked,noinline)) JogDial_task_my() {   //FF84DAF0
 585  asm volatile(
 586                  "STMFD   SP!, {R3-R11,LR}\n"
 587                  "BL      sub_FF84DCA0\n"
 588                  "LDR     R11, =0x80000B01\n"
 589                  "LDR     R8, =0xFFB36860\n"
 590                  "LDR     R7, =0xC0240000\n"
 591                  "LDR     R6, =0x267C\n"
 592                  "MOV     R9, #1\n"
 593                  "MOV     R10, #0\n"
 594  "loc_FF84DB10:\n"
 595                  "LDR     R3, =0x1AE\n"
 596                  "LDR     R0, [R6,#0xC]\n"
 597                  "LDR     R2, =0xFF84DD48\n"
 598                  "MOV     R1, #0\n"
 599                  "BL      sub_FF827E98\n"
 600                  "MOV     R0, #0x28\n"
 601                  "BL      _SleepTask\n"
 602 
 603 //------------------  added code ---------------------
 604 "labelA:\n"
 605                 "LDR     R0, =jogdial_stopped\n"
 606                 "LDR     R0, [R0]\n"
 607                 "CMP     R0, #1\n"
 608                 "BNE     labelB\n"
 609                 "MOV     R0, #40\n"
 610                 "BL      _SleepTask\n"
 611                 "B       labelA\n"
 612 "labelB:\n"
 613 //------------------  original code ------------------
 614 
 615                  "LDR     R0, [R7,#0x104]\n"
 616                  "MOV     R0, R0,ASR#16\n"
 617                  "STRH    R0, [R6]\n"
 618                  "LDRSH   R2, [R6,#2]\n"
 619                  "SUB     R1, R0, R2\n"
 620                  "CMP     R1, #0\n"
 621                  "BEQ     loc_FF84DBD4\n"
 622                  "MOV     R5, R1\n"
 623                  "RSBLT   R5, R5, #0\n"
 624                  "MOVLE   R4, #0\n"
 625                  "MOVGT   R4, #1\n"
 626                  "CMP     R5, #0xFF\n"
 627                  "BLS     loc_FF84DB88\n"
 628                  "CMP     R1, #0\n"
 629                  "RSBLE   R1, R2, #0xFF\n"
 630                  "ADDLE   R1, R1, #0x7F00\n"
 631                  "ADDLE   R0, R1, R0\n"
 632                  "RSBGT   R0, R0, #0xFF\n"
 633                  "ADDGT   R0, R0, #0x7F00\n"
 634                  "ADDGT   R0, R0, R2\n"
 635                  "ADD     R5, R0, #0x8000\n"
 636                  "ADD     R5, R5, #1\n"
 637                  "EOR     R4, R4, #1\n"
 638  "loc_FF84DB88:\n"
 639                  "LDR     R0, [R6,#0x14]\n"
 640                  "CMP     R0, #0\n"
 641                  "BEQ     loc_FF84DBCC\n"
 642                  "LDR     R0, [R6,#0x1C]\n"
 643                  "CMP     R0, #0\n"
 644                  "BEQ     loc_FF84DBB4\n"
 645                  "LDR     R1, [R8,R4,LSL#2]\n"
 646                  "CMP     R1, R0\n"
 647                  "BEQ     loc_FF84DBBC\n"
 648                  "LDR     R0, =0xB01\n"
 649                  "BL      sub_FF8851C8\n"
 650  "loc_FF84DBB4:\n"
 651                  "MOV     R0, R11\n"
 652                  "BL      sub_FF8851C8\n"
 653  "loc_FF84DBBC:\n"
 654                  "LDR     R0, [R8,R4,LSL#2]\n"
 655                  "MOV     R1, R5\n"
 656                  "STR     R0, [R6,#0x1C]\n"
 657                  "BL      sub_FF8850F0\n"
 658  "loc_FF84DBCC:\n"
 659                  "LDRH    R0, [R6]\n"
 660                  "STRH    R0, [R6,#2]\n"
 661  "loc_FF84DBD4:\n"
 662                  "STR     R10, [R7,#0x100]\n"
 663                  "STR     R9, [R7,#0x108]\n"
 664                  "LDR     R0, [R6,#0x10]\n"
 665                  "CMP     R0, #0\n"
 666                  "BLNE    sub_FF827CF0\n"
 667                  "B       loc_FF84DB10\n"
 668  );
 669 }

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