This source file includes following definitions.
- taskCreateHook
- boot
- sub_FF810354_my
- sub_FF811198_my
- sub_FF815EE0_my
- taskcreate_Startup_my
- task_Startup_my
- spytask
- CreateTask_spytask
- CreateTask_PhySw
- init_file_modules_task
- sub_FF896D0C_my
- sub_FF876598_my
- sub_FF8761C0_my
- sub_FF875EE0_my
- JogDial_task_my
1 #include "lolevel.h"
2 #include "platform.h"
3 #include "core.h"
4
5 const char * const new_sa = &_end;
6
7
8
9 void CreateTask_PhySw();
10 void CreateTask_spytask();
11 extern volatile int jogdial_stopped;
12 void JogDial_task_my(void);
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39 void taskCreateHook(int *p)
40 {
41 p-=17;
42
43 if (p[0] == (int)0xFF88322C)
44 p[0] = (int) capt_seq_task;
45
46 if (p[0] == (int)0xFF98642C)
47 p[0] = (int) movie_record_task;
48
49 if (p[0] == (int)0xFF8A0AA0)
50 p[0] = (int) init_file_modules_task;
51
52 if (p[0] == (int)0xFF8CF1A8)
53 p[0] = (int) exp_drv_task;
54
55 if (p[0] == (int)0xFF865894)
56 p[0] = (int) JogDial_task_my;
57 }
58
59
60
61
62
63
64
65 void __attribute__((naked,noinline)) boot()
66 {
67 asm volatile (
68 " LDR R1, =0xC0410000 \n"
69 " MOV R0, #0 \n"
70 " STR R0, [R1] \n"
71 " MOV R1, #0x78 \n"
72 " MCR p15, 0, R1, c1, c0 \n"
73 " MOV R1, #0 \n"
74 " MCR p15, 0, R1, c7, c10, 4 \n"
75 " MCR p15, 0, R1, c7, c5 \n"
76 " MCR p15, 0, R1, c7, c6 \n"
77 " MOV R0, #0x3D \n"
78 " MCR p15, 0, R0, c6, c0 \n"
79 " MOV R0, #0xC000002F \n"
80 " MCR p15, 0, R0, c6, c1 \n"
81 " MOV R0, #0x35 \n"
82 " MCR p15, 0, R0, c6, c2 \n"
83 " MOV R0, #0x40000035 \n"
84 " MCR p15, 0, R0, c6, c3 \n"
85 " MOV R0, #0x80000017 \n"
86 " MCR p15, 0, R0, c6, c4 \n"
87 " LDR R0, =0xFF80002D \n"
88 " MCR p15, 0, R0, c6, c5 \n"
89 " MOV R0, #0x34 \n"
90 " MCR p15, 0, R0, c2, c0 \n"
91 " MOV R0, #0x34 \n"
92 " MCR p15, 0, R0, c2, c0, 1 \n"
93 " MOV R0, #0x34 \n"
94 " MCR p15, 0, R0, c3, c0 \n"
95 " LDR R0, =0x3333330 \n"
96 " MCR p15, 0, R0, c5, c0, 2 \n"
97 " LDR R0, =0x3333330 \n"
98 " MCR p15, 0, R0, c5, c0, 3 \n"
99 " MRC p15, 0, R0, c1, c0 \n"
100 " ORR R0, R0, #0x1000 \n"
101 " ORR R0, R0, #4 \n"
102 " ORR R0, R0, #1 \n"
103 " MCR p15, 0, R0, c1, c0 \n"
104 " MOV R1, #0x80000006 \n"
105 " MCR p15, 0, R1, c9, c1 \n"
106 " MOV R1, #6 \n"
107 " MCR p15, 0, R1, c9, c1, 1 \n"
108 " MRC p15, 0, R1, c1, c0 \n"
109 " ORR R1, R1, #0x50000 \n"
110 " MCR p15, 0, R1, c1, c0 \n"
111 " LDR R2, =0xC0200000 \n"
112 " MOV R1, #1 \n"
113 " STR R1, [R2, #0x10C] \n"
114 " MOV R1, #0xFF \n"
115 " STR R1, [R2, #0xC] \n"
116 " STR R1, [R2, #0x1C] \n"
117 " STR R1, [R2, #0x2C] \n"
118 " STR R1, [R2, #0x3C] \n"
119 " STR R1, [R2, #0x4C] \n"
120 " STR R1, [R2, #0x5C] \n"
121 " STR R1, [R2, #0x6C] \n"
122 " STR R1, [R2, #0x7C] \n"
123 " STR R1, [R2, #0x8C] \n"
124 " STR R1, [R2, #0x9C] \n"
125 " STR R1, [R2, #0xAC] \n"
126 " STR R1, [R2, #0xBC] \n"
127 " STR R1, [R2, #0xCC] \n"
128 " STR R1, [R2, #0xDC] \n"
129 " STR R1, [R2, #0xEC] \n"
130 " STR R1, [R2, #0xFC] \n"
131 " LDR R1, =0xC0400008 \n"
132 " LDR R2, =0x430005 \n"
133 " STR R2, [R1] \n"
134 " MOV R1, #1 \n"
135 " LDR R2, =0xC0243100 \n"
136 " STR R2, [R1] \n"
137 " LDR R2, =0xC0242010 \n"
138 " LDR R1, [R2] \n"
139 " ORR R1, R1, #1 \n"
140 " STR R1, [R2] \n"
141 " LDR R0, =0xFFC9A22C \n"
142 " LDR R1, =0x1900 \n"
143 " LDR R3, =0x10FE4 \n"
144 "loc_FF81013C:\n"
145 " CMP R1, R3 \n"
146 " LDRCC R2, [R0], #4 \n"
147 " STRCC R2, [R1], #4 \n"
148 " BCC loc_FF81013C \n"
149 " LDR R1, =0x16EE30 \n"
150 " MOV R2, #0 \n"
151 "loc_FF810154:\n"
152 " CMP R3, R1 \n"
153 " STRCC R2, [R3], #4 \n"
154 " BCC loc_FF810154 \n"
155
156 " B sub_FF810354_my \n"
157 );
158 };
159
160
161
162
163
164 void __attribute__((naked,noinline)) sub_FF810354_my()
165 {
166 *(int*)0x1938 = (int)taskCreateHook;
167 *(int*)0x193C = (int)taskCreateHook;
168
169
170
171
172
173 if ((*(int*) 0xC0220128) & 1)
174 *(int*)(0x25E8) = 0x200000;
175 else
176 *(int*)(0x25E8) = 0x100000;
177
178 asm volatile (
179 " LDR R0, =0xFF8103CC \n"
180 " MOV R1, #0 \n"
181 " LDR R3, =0xFF810404 \n"
182 "loc_FF810360:\n"
183 " CMP R0, R3 \n"
184 " LDRCC R2, [R0], #4 \n"
185 " STRCC R2, [R1], #4 \n"
186 " BCC loc_FF810360 \n"
187 " LDR R0, =0xFF810404 \n"
188 " MOV R1, #0x4B0 \n"
189 " LDR R3, =0xFF810618 \n"
190 "loc_FF81037C:\n"
191 " CMP R0, R3 \n"
192 " LDRCC R2, [R0], #4 \n"
193 " STRCC R2, [R1], #4 \n"
194 " BCC loc_FF81037C \n"
195 " MOV R0, #0xD2 \n"
196 " MSR CPSR_cxsf, R0 \n"
197 " MOV SP, #0x1000 \n"
198 " MOV R0, #0xD3 \n"
199 " MSR CPSR_cxsf, R0 \n"
200 " MOV SP, #0x1000 \n"
201 " LDR R0, =0x6C4 \n"
202 " LDR R2, =0xEEEEEEEE \n"
203 " MOV R3, #0x1000 \n"
204 "loc_FF8103B0:\n"
205 " CMP R0, R3 \n"
206 " STRCC R2, [R0], #4 \n"
207 " BCC loc_FF8103B0 \n"
208
209 " BL sub_FF811198_my \n"
210 );
211 }
212
213
214
215
216
217 void __attribute__((naked,noinline)) sub_FF811198_my( ) {
218 asm volatile (
219 " STR LR, [SP, #-4]! \n"
220 " SUB SP, SP, #0x74 \n"
221 " MOV R0, SP \n"
222 " MOV R1, #0x74 \n"
223 " BL sub_FFB9F320 \n"
224 " MOV R0, #0x53000 \n"
225 " STR R0, [SP, #4] \n"
226
227 " LDR R0, =new_sa \n"
228 " LDR R0, [R0] \n"
229 " LDR R1, =0x379C00 \n"
230 " STR R0, [SP, #8] \n"
231 " RSB R0, R0, #0x1F80 \n"
232 " ADD R0, R0, #0x370000 \n"
233 " STR R0, [SP, #0xC] \n"
234 " LDR R0, =0x371F80 \n"
235 " STR R1, [SP] \n"
236 " STRD R0, [SP, #0x10] \n"
237 " MOV R0, #0x22 \n"
238 " STR R0, [SP, #0x18] \n"
239 " MOV R0, #0x68 \n"
240 " STR R0, [SP, #0x1C] \n"
241 " LDR R0, =0x19B \n"
242
243 " LDR R1, =sub_FF815EE0_my \n"
244 " STR R0, [SP, #0x20] \n"
245 " MOV R0, #0x96 \n"
246 " STR R0, [SP, #0x24] \n"
247 " STR R0, [SP, #0x28] \n"
248 " MOV R0, #0x64 \n"
249 " STR R0, [SP, #0x2C] \n"
250 " MOV R0, #0 \n"
251 " STR R0, [SP, #0x30] \n"
252 " STR R0, [SP, #0x34] \n"
253 " MOV R0, #0x10 \n"
254 " STR R0, [SP, #0x5C] \n"
255 " MOV R0, #0x800 \n"
256 " STR R0, [SP, #0x60] \n"
257 " MOV R0, #0xA0 \n"
258 " STR R0, [SP, #0x64] \n"
259 " MOV R0, #0x280 \n"
260 " STR R0, [SP, #0x68] \n"
261 " MOV R0, SP \n"
262 " MOV R2, #0 \n"
263 " BL sub_FF8134B8 \n"
264 " ADD SP, SP, #0x74 \n"
265 " LDR PC, [SP], #4 \n"
266 );
267 }
268
269
270
271
272
273 void __attribute__((naked,noinline)) sub_FF815EE0_my()
274 {
275 asm volatile (
276 " STMFD SP!, {R4,LR} \n"
277 " BL sub_FF810B20 \n"
278 " BL sub_FF81A33C \n"
279 " CMP R0, #0 \n"
280 " LDRLT R0, =0xFF815FF4 \n"
281 " BLLT sub_FF815FD4 \n"
282 " BL sub_FF815B1C \n"
283 " CMP R0, #0 \n"
284 " LDRLT R0, =0xFF815FFC \n"
285 " BLLT sub_FF815FD4 \n"
286 " LDR R0, =0xFF81600C \n"
287 " BL sub_FF815C04 \n"
288 " CMP R0, #0 \n"
289 " LDRLT R0, =0xFF816014 \n"
290 " BLLT sub_FF815FD4 \n"
291 " LDR R0, =0xFF81600C \n"
292 " BL sub_FF813CA4 \n"
293 " CMP R0, #0 \n"
294 " LDRLT R0, =0xFF816028 \n"
295 " BLLT sub_FF815FD4 \n"
296 " BL sub_FF819CC4 \n"
297 " CMP R0, #0 \n"
298 " LDRLT R0, =0xFF816034 \n"
299 " BLLT sub_FF815FD4 \n"
300 " BL sub_FF81167C \n"
301 " CMP R0, #0 \n"
302 " LDRLT R0, =0xFF816040 \n"
303 " BLLT sub_FF815FD4 \n"
304 " LDMFD SP!, {R4,LR} \n"
305
306 " B taskcreate_Startup_my \n"
307 " MOV R0, #0 \n"
308 " LDMFD SP!, {R3-R5,PC} \n"
309 );
310 }
311
312
313
314
315
316 void __attribute__((naked,noinline)) taskcreate_Startup_my()
317 {
318 asm volatile (
319 " STMFD SP!, {R3-R5,LR} \n"
320 " BL sub_FF8346CC \n"
321 " BL sub_FF83C6B0 \n"
322 " CMP R0, #0 \n"
323 " BNE loc_FF81FBA8 \n"
324 " BL sub_FF8360B8 \n"
325 " CMP R0, #0 \n"
326 " BEQ loc_FF81FBA8 \n"
327 " LDR R4, =0xC0220000 \n"
328 " LDR R0, [R4, #0x12C] \n"
329 " TST R0, #1 \n"
330 " MOVEQ R0, #0x12C \n"
331 " BLEQ sub_FF83AA4C \n"
332 " BL sub_FF8346C8 \n"
333 " CMP R0, #0 \n"
334 " BNE loc_FF81FBA8 \n"
335 " BL sub_FF833D5C \n"
336 " MOV R0, #0x44 \n"
337 " STR R0, [R4, #0x1C] \n"
338 " BL sub_FF833F4C \n"
339 "loc_FF81FBA4:\n"
340 " B loc_FF81FBA4 \n"
341 "loc_FF81FBA8:\n"
342
343
344 " BL sub_FF8346D0 \n"
345 " BL sub_FF83A8C4 \n"
346 " LDR R1, =0x3CE000 \n"
347 " MOV R0, #0 \n"
348 " BL sub_FF83AD0C \n"
349 " BL sub_FF83AAB8 \n"
350 " MOV R3, #0 \n"
351 " STR R3, [SP] \n"
352
353 " LDR R3, =task_Startup_my \n"
354 " MOV R2, #0 \n"
355 " MOV R1, #0x19 \n"
356 " LDR R0, =0xFF81FBF0 \n"
357 " BL sub_FF81E8A0 \n"
358 " MOV R0, #0 \n"
359 " LDMFD SP!, {R3-R5,PC} \n"
360
361 );
362 }
363
364
365
366
367
368 void __attribute__((naked,noinline)) task_Startup_my()
369 {
370 asm volatile (
371 " STMFD SP!, {R4,LR} \n"
372 " BL sub_FF816594 \n"
373 " BL sub_FF835830 \n"
374 " BL sub_FF8339B4 \n"
375 " BL sub_FF83C6F4 \n"
376 " BL sub_FF83C8E0 \n"
377
378 " BL sub_FF83CA88 \n"
379 " BL sub_FF832484 \n"
380 " BL sub_FF83C910 \n"
381 " BL sub_FF83A068 \n"
382 " BL sub_FF83CA8C \n"
383
384 );
385
386 CreateTask_PhySw();
387 CreateTask_spytask();
388
389 asm volatile (
390 " BL sub_FF837D14 \n"
391 " BL sub_FF83CAA4 \n"
392 " BL sub_FF831888 \n"
393 " BL sub_FF833318 \n"
394 " BL sub_FF83C478 \n"
395 " BL sub_FF833968 \n"
396 " BL sub_FF8332B4 \n"
397 " BL sub_FF8324B8 \n"
398 " BL sub_FF83D670 \n"
399 " BL sub_FF833278 \n"
400 " LDMFD SP!, {R4,LR} \n"
401 " B sub_FF8166B4 \n"
402 );
403 }
404
405
406
407
408
409 void spytask(long ua, long ub, long uc, long ud, long ue, long uf)
410 {
411 (void)ua; (void)ub; (void)uc; (void)ud; (void)ue; (void)uf;
412 core_spytask();
413 }
414
415
416
417
418
419 void CreateTask_spytask()
420 {
421 _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0);
422 }
423
424
425
426
427
428 void __attribute__((naked,noinline)) CreateTask_PhySw()
429 {
430 asm volatile (
431 " STMFD SP!, {R3-R5,LR} \n"
432 " LDR R4, =0x1C30 \n"
433 " LDR R0, [R4, #0x10] \n"
434 " CMP R0, #0 \n"
435 " BNE loc_FF8345E4 \n"
436 " MOV R3, #0 \n"
437 " STR R3, [SP] \n"
438
439 " LDR R3, =mykbd_task \n"
440 " MOV R2, #0x2000 \n"
441 " MOV R1, #0x17 \n"
442 " LDR R0, =0xFF8347DC \n"
443 " BL sub_FF83AB0C \n"
444 " STR R0, [R4, #0x10] \n"
445 "loc_FF8345E4:\n"
446 " BL sub_FF865BC0 \n"
447 " BL sub_FF894834 \n"
448 " BL sub_FF836030 \n"
449 " CMP R0, #0 \n"
450 " LDREQ R1, =0x34CC0 \n"
451 " LDMEQFD SP!, {R3-R5,LR} \n"
452 " BEQ sub_FF8947BC \n"
453 " LDMFD SP!, {R3-R5,PC} \n"
454 );
455 }
456
457
458
459
460
461 void __attribute__((naked,noinline)) init_file_modules_task()
462 {
463 asm volatile (
464 " STMFD SP!, {R4-R6,LR} \n"
465 " BL sub_FF896CE0 \n"
466 " LDR R5, =0x5006 \n"
467 " MOVS R4, R0 \n"
468 " MOVNE R1, #0 \n"
469 " MOVNE R0, R5 \n"
470 " BLNE sub_FF89AAD4 \n"
471
472 " BL sub_FF896D0C_my \n"
473 " BL core_spytask_can_start\n"
474 " CMP R4, #0 \n"
475 " MOVEQ R0, R5 \n"
476 " LDMEQFD SP!, {R4-R6,LR} \n"
477 " MOVEQ R1, #0 \n"
478 " BEQ sub_FF89AAD4 \n"
479 " LDMFD SP!, {R4-R6,PC} \n"
480 );
481 }
482
483
484
485
486
487 void __attribute__((naked,noinline)) sub_FF896D0C_my()
488 {
489 asm volatile (
490 " STMFD SP!, {R4,LR} \n"
491 " MOV R0, #3 \n"
492
493 " BL sub_FF876598_my \n"
494 " BL sub_FF96A8E8 \n"
495 " LDR R4, =0x3244 \n"
496 " LDR R0, [R4, #4] \n"
497 " CMP R0, #0 \n"
498 " BNE loc_FF896D44 \n"
499 " BL sub_FF8757DC \n"
500 " BL sub_FF95D878 \n"
501 " BL sub_FF8757DC \n"
502 " BL sub_FF871B80 \n"
503 " BL sub_FF8756DC \n"
504 " BL sub_FF95D914 \n"
505 "loc_FF896D44:\n"
506 " MOV R0, #1 \n"
507 " STR R0, [R4] \n"
508 " LDMFD SP!, {R4,PC} \n"
509 );
510 }
511
512
513
514
515
516 void __attribute__((naked,noinline)) sub_FF876598_my()
517 {
518 asm volatile (
519 " STMFD SP!, {R4-R8,LR} \n"
520 " MOV R8, R0 \n"
521 " BL sub_FF876518 \n"
522 " LDR R1, =0x3B0A8 \n"
523 " MOV R6, R0 \n"
524 " ADD R4, R1, R0, LSL #7 \n"
525 " LDR R0, [R4, #0x6C] \n"
526 " CMP R0, #4 \n"
527 " LDREQ R1, =0x83F \n"
528 " LDREQ R0, =0xFF876058 \n"
529 " BLEQ sub_FF81EB78 \n"
530 " MOV R1, R8 \n"
531 " MOV R0, R6 \n"
532 " BL sub_FF875DCC \n"
533 " LDR R0, [R4, #0x38] \n"
534 " BL sub_FF876C3C \n"
535 " CMP R0, #0 \n"
536 " STREQ R0, [R4, #0x6C] \n"
537 " MOV R0, R6 \n"
538 " BL sub_FF875E5C \n"
539 " MOV R0, R6 \n"
540
541 " BL sub_FF8761C0_my \n"
542 " MOV R5, R0 \n"
543 " MOV R0, R6 \n"
544 " BL sub_FF8763F0 \n"
545 " LDR R6, [R4, #0x3C] \n"
546 " AND R7, R5, R0 \n"
547 " CMP R6, #0 \n"
548 " LDR R1, [R4, #0x38] \n"
549 " MOVEQ R0, #0x80000001 \n"
550 " MOV R5, #0 \n"
551 " BEQ loc_FF876648 \n"
552 " MOV R0, R1 \n"
553 " BL sub_FF875944 \n"
554 " CMP R0, #0 \n"
555 " MOVNE R5, #4 \n"
556 " CMP R6, #5 \n"
557 " ORRNE R0, R5, #1 \n"
558 " BICEQ R0, R5, #1 \n"
559 " CMP R7, #0 \n"
560 " BICEQ R0, R0, #2 \n"
561 " ORREQ R0, R0, #0x80000000 \n"
562 " BICNE R0, R0, #0x80000000 \n"
563 " ORRNE R0, R0, #2 \n"
564 "loc_FF876648:\n"
565 " CMP R8, #7 \n"
566 " STR R0, [R4, #0x40] \n"
567 " LDMNEFD SP!, {R4-R8,PC} \n"
568 " MOV R0, R8 \n"
569 " BL sub_FF876568 \n"
570 " CMP R0, #0 \n"
571 " LDMEQFD SP!, {R4-R8,LR} \n"
572 " LDREQ R0, =0xFF876694 \n"
573 " BEQ sub_FF81177C \n"
574 " LDMFD SP!, {R4-R8,PC} \n"
575 );
576 }
577
578
579
580
581
582 void __attribute__((naked,noinline)) sub_FF8761C0_my()
583 {
584 asm volatile (
585 " STMFD SP!, {R4-R6,LR} \n"
586 " MOV R5, R0 \n"
587 " LDR R0, =0x3B0A8 \n"
588 " ADD R4, R0, R5, LSL #7 \n"
589 " LDR R0, [R4, #0x6C] \n"
590 " TST R0, #2 \n"
591 " MOVNE R0, #1 \n"
592 " LDMNEFD SP!, {R4-R6,PC} \n"
593 " LDR R0, [R4, #0x38] \n"
594 " MOV R1, R5 \n"
595
596 " BL sub_FF875EE0_my \n"
597 " CMP R0, #0 \n"
598 " LDRNE R0, [R4, #0x38] \n"
599 " MOVNE R1, R5 \n"
600 " BLNE sub_FF87607C \n"
601 " LDR R2, =0x3B128 \n"
602 " ADD R1, R5, R5, LSL #4 \n"
603 " LDR R1, [R2, R1, LSL #2] \n"
604 " CMP R1, #4 \n"
605 " BEQ loc_FF876220 \n"
606 " CMP R0, #0 \n"
607 " LDMEQFD SP!, {R4-R6,PC} \n"
608 " MOV R0, R5 \n"
609 " BL sub_FF8759D4 \n"
610 "loc_FF876220:\n"
611 " CMP R0, #0 \n"
612 " LDRNE R1, [R4, #0x6C] \n"
613 " ORRNE R1, R1, #2 \n"
614 " STRNE R1, [R4, #0x6C] \n"
615 " LDMFD SP!, {R4-R6,PC} \n"
616 );
617 }
618
619
620
621
622
623 void __attribute__((naked,noinline)) sub_FF875EE0_my()
624 {
625 asm volatile (
626 " STMFD SP!, {R4-R10,LR} \n"
627 " MOV R9, R0 \n"
628 " LDR R0, =0x3B0A8 \n"
629 " MOV R8, #0 \n"
630 " ADD R5, R0, R1, LSL #7 \n"
631 " LDR R0, [R5, #0x3C] \n"
632 " MOV R7, #0 \n"
633 " CMP R0, #7 \n"
634 " MOV R6, #0 \n"
635 " ADDLS PC, PC, R0, LSL #2 \n"
636 " B loc_FF876038 \n"
637 " B loc_FF875F44 \n"
638 " B loc_FF875F2C \n"
639 " B loc_FF875F2C \n"
640 " B loc_FF875F2C \n"
641 " B loc_FF875F2C \n"
642 " B loc_FF876030 \n"
643 " B loc_FF875F2C \n"
644 " B loc_FF875F2C \n"
645 "loc_FF875F2C:\n"
646 " MOV R2, #0 \n"
647 " MOV R1, #0x200 \n"
648 " MOV R0, #2 \n"
649 " BL sub_FF890D90 \n"
650 " MOVS R4, R0 \n"
651 " BNE loc_FF875F4C \n"
652 "loc_FF875F44:\n"
653 " MOV R0, #0 \n"
654 " LDMFD SP!, {R4-R10,PC} \n"
655 "loc_FF875F4C:\n"
656 " LDR R12, [R5, #0x50] \n"
657 " MOV R3, R4 \n"
658 " MOV R2, #1 \n"
659 " MOV R1, #0 \n"
660 " MOV R0, R9 \n"
661 " BLX R12 \n"
662 " CMP R0, #1 \n"
663 " BNE loc_FF875F78 \n"
664 " MOV R0, #2 \n"
665 " BL sub_FF890EE0 \n"
666 " B loc_FF875F44 \n"
667 "loc_FF875F78:\n"
668 " LDR R1, [R5, #0x64] \n"
669 " MOV R0, R9 \n"
670 " BLX R1 \n"
671
672 "MOV R1, R4\n"
673 "BL mbr_read_dryos\n"
674
675
676
677
678
679
680 "MOV R12, R4\n"
681 "MOV LR, R4\n"
682 "MOV R1, #1\n"
683 "B dg_sd_fat32_enter\n"
684 "dg_sd_fat32:\n"
685 "CMP R1, #4\n"
686 "BEQ dg_sd_fat32_end\n"
687 "ADD R12, R12, #0x10\n"
688 "ADD R1, R1, #1\n"
689 "dg_sd_fat32_enter:\n"
690 "LDRB R2, [R12, #0x1BE]\n"
691 "LDRB R3, [R12, #0x1C2]\n"
692 "CMP R3, #0xB\n"
693 "CMPNE R3, #0xC\n"
694 "BNE dg_sd_fat32\n"
695 "CMP R2, #0x00\n"
696 "CMPNE R2, #0x80\n"
697 "BNE dg_sd_fat32\n"
698
699 "MOV R4, R12\n"
700
701 "dg_sd_fat32_end:\n"
702
703
704 " LDRB R1, [R4, #0x1C9] \n"
705 " LDRB R3, [R4, #0x1C8] \n"
706 " LDRB R12, [R4, #0x1CC] \n"
707 " MOV R1, R1, LSL #0x18 \n"
708 " ORR R1, R1, R3, LSL #0x10 \n"
709 " LDRB R3, [R4, #0x1C7] \n"
710 " LDRB R2, [R4, #0x1BE] \n"
711
712 " ORR R1, R1, R3, LSL #8 \n"
713 " LDRB R3, [R4, #0x1C6] \n"
714 " CMP R2, #0 \n"
715 " CMPNE R2, #0x80 \n"
716 " ORR R1, R1, R3 \n"
717 " LDRB R3, [R4, #0x1CD] \n"
718 " MOV R3, R3, LSL #0x18 \n"
719 " ORR R3, R3, R12, LSL #0x10 \n"
720 " LDRB R12, [R4, #0x1CB] \n"
721 " ORR R3, R3, R12, LSL #8 \n"
722 " LDRB R12, [R4, #0x1CA] \n"
723 " ORR R3, R3, R12 \n"
724
725 " LDRB R12, [LR,#0x1FE]\n"
726 " LDRB LR, [LR,#0x1FF]\n"
727 " BNE loc_FF876004 \n"
728 " CMP R0, R1 \n"
729 " BCC loc_FF876004 \n"
730 " ADD R2, R1, R3 \n"
731 " CMP R2, R0 \n"
732 " CMPLS R12, #0x55 \n"
733 " CMPEQ LR, #0xAA \n"
734 " MOVEQ R7, R1 \n"
735 " MOVEQ R6, R3 \n"
736 " MOVEQ R4, #1 \n"
737 " BEQ loc_FF876008 \n"
738 "loc_FF876004:\n"
739 " MOV R4, R8 \n"
740 "loc_FF876008:\n"
741 " MOV R0, #2 \n"
742 " BL sub_FF890EE0 \n"
743 " CMP R4, #0 \n"
744 " BNE loc_FF876044 \n"
745 " LDR R1, [R5, #0x64] \n"
746 " MOV R7, #0 \n"
747 " MOV R0, R9 \n"
748 " BLX R1 \n"
749 " MOV R6, R0 \n"
750 " B loc_FF876044 \n"
751 "loc_FF876030:\n"
752 " MOV R6, #0x40 \n"
753 " B loc_FF876044 \n"
754 "loc_FF876038:\n"
755 " LDR R1, =0x597 \n"
756 " LDR R0, =0xFF876058 \n"
757 " BL sub_FF81EB78 \n"
758 "loc_FF876044:\n"
759 " STR R7, [R5, #0x44]! \n"
760 " STMIB R5, {R6,R8} \n"
761 " MOV R0, #1 \n"
762 " LDMFD SP!, {R4-R10,PC} \n"
763 );
764 }
765
766
767
768
769
770
771
772 void __attribute__((naked,noinline)) JogDial_task_my()
773 {
774 asm volatile (
775 " STMFD SP!, {R4-R11,LR} \n"
776 " SUB SP, SP, #0x24 \n"
777 " BL sub_FF865C2C \n"
778 " LDR R1, =0x25FC \n"
779 " LDR R6, =0xFFBA5464 \n"
780 " MOV R0, #0 \n"
781 " ADD R3, SP, #0x18 \n"
782 " ADD R12, SP, #0x1C \n"
783 " ADD R10, SP, #8 \n"
784 " MOV R2, #0 \n"
785 " ADD R9, SP, #0x10 \n"
786 "loc_FF8658C0:\n"
787 " ADD R12, SP, #0x1C \n"
788 " ADD LR, R12, R0, LSL #1 \n"
789 " MOV R2, #0 \n"
790 " ADD R3, SP, #0x18 \n"
791 " STRH R2, [LR] \n"
792 " ADD LR, R3, R0, LSL #1 \n"
793 " STRH R2, [LR] \n"
794 " STR R2, [R9, R0, LSL #2] \n"
795 " STR R2, [R10, R0, LSL #2] \n"
796 " ADD R0, R0, #1 \n"
797 " CMP R0, #2 \n"
798 " BLT loc_FF8658C0 \n"
799 "loc_FF8658F0:\n"
800 " LDR R0, =0x25FC \n"
801 " MOV R2, #0 \n"
802 " LDR R0, [R0, #8] \n"
803 " MOV R1, SP \n"
804 " BL sub_FF83A2F8 \n"
805 " CMP R0, #0 \n"
806 " LDRNE R1, =0x262 \n"
807 " LDRNE R0, =0xFF865B50 \n"
808 " BLNE sub_FF81EB78 \n"
809
810 "labelA:\n"
811 "LDR R0, =jogdial_stopped\n"
812 "LDR R0, [R0]\n"
813 "CMP R0, #1\n"
814 "BNE labelB\n"
815 "MOV R0, #40\n"
816 "BL _SleepTask\n"
817 "B labelA\n"
818 "labelB:\n"
819
820 " LDR R0, [SP] \n"
821 " AND R4, R0, #0xFF \n"
822 " AND R0, R0, #0xFF00 \n"
823 " CMP R0, #0x100 \n"
824 " BEQ loc_FF865960 \n"
825 " CMP R0, #0x200 \n"
826 " BEQ loc_FF865998 \n"
827 " CMP R0, #0x300 \n"
828 " BEQ loc_FF865B90 \n"
829 " CMP R0, #0x400 \n"
830 " BNE loc_FF8658F0 \n"
831 " CMP R4, #0 \n"
832 " LDRNE R1, =0x2ED \n"
833 " LDRNE R0, =0xFF865B50 \n"
834 " BLNE sub_FF81EB78 \n"
835 " RSB R0, R4, R4, LSL #3 \n"
836 " LDR R0, [R6, R0, LSL #2] \n"
837 "loc_FF865958:\n"
838 " BL sub_FF865C10 \n"
839 " B loc_FF8658F0 \n"
840 "loc_FF865960:\n"
841 " LDR R7, =0x260C \n"
842 " LDR R0, [R7, R4, LSL #2] \n"
843 " BL sub_FF83B290 \n"
844 " LDR R2, =0xFF8657E0 \n"
845 " ADD R1, R2, #0 \n"
846 " ORR R3, R4, #0x200 \n"
847 " MOV R0, #0x28 \n"
848 " BL sub_FF83B1AC \n"
849 " TST R0, #1 \n"
850 " CMPNE R0, #0x15 \n"
851 " STR R0, [R10, R4, LSL #2] \n"
852 " BEQ loc_FF8658F0 \n"
853 " MOV R1, #0x274 \n"
854 " B loc_FF865B3C \n"
855 "loc_FF865998:\n"
856 " RSB R5, R4, R4, LSL #3 \n"
857 " LDR R0, [R6, R5, LSL #2] \n"
858 " LDR R1, =0xC0240104 \n"
859 " LDR R0, [R1, R0, LSL #8] \n"
860 " MOV R2, R0, ASR #0x10 \n"
861 " ADD R0, SP, #0x1C \n"
862 " ADD R0, R0, R4, LSL #1 \n"
863 " STR R0, [SP, #0x20] \n"
864 " STRH R2, [R0] \n"
865 " ADD R0, SP, #0x18 \n"
866 " ADD R11, R0, R4, LSL #1 \n"
867 " LDRSH R3, [R11] \n"
868 " SUB R0, R2, R3 \n"
869 " CMP R0, #0 \n"
870 " BNE loc_FF865A18 \n"
871 " LDR R0, [R9, R4, LSL #2] \n"
872 " CMP R0, #0 \n"
873 " BEQ loc_FF865AF8 \n"
874 " LDR R7, =0x260C \n"
875 " LDR R0, [R7, R4, LSL #2] \n"
876 " BL sub_FF83B290 \n"
877 " LDR R2, =0xFF8657EC \n"
878 " ADD R1, R2, #0 \n"
879 " ORR R3, R4, #0x300 \n"
880 " MOV R0, #0x1F4 \n"
881 " BL sub_FF83B1AC \n"
882 " TST R0, #1 \n"
883 " CMPNE R0, #0x15 \n"
884 " STR R0, [R7, R4, LSL #2] \n"
885 " BEQ loc_FF865AF8 \n"
886 " LDR R1, =0x28D \n"
887 " B loc_FF865AF0 \n"
888 "loc_FF865A18:\n"
889 " MOV R1, R0 \n"
890 " RSBLT R0, R0, #0 \n"
891 " MOVLE R7, #0 \n"
892 " MOVGT R7, #1 \n"
893 " CMP R0, #0xFF \n"
894 " BLS loc_FF865A58 \n"
895 " CMP R1, #0 \n"
896 " RSBLE R0, R3, #0xFF \n"
897 " ADDLE R0, R0, #0x7F00 \n"
898 " ADDLE R0, R0, R2 \n"
899 " RSBGT R0, R2, #0xFF \n"
900 " ADDGT R0, R0, #0x7F00 \n"
901 " ADDGT R0, R0, R3 \n"
902 " ADD R0, R0, #0x8000 \n"
903 " ADD R0, R0, #1 \n"
904 " EOR R7, R7, #1 \n"
905 "loc_FF865A58:\n"
906 " STR R0, [SP, #4] \n"
907 " LDR R0, [R9, R4, LSL #2] \n"
908 " CMP R0, #0 \n"
909 " ADDEQ R0, R6, R5, LSL #2 \n"
910 " LDREQ R0, [R0, #8] \n"
911 " BEQ loc_FF865A90 \n"
912 " ADD R8, R6, R5, LSL #2 \n"
913 " ADD R1, R8, R7, LSL #2 \n"
914 " LDR R1, [R1, #0x10] \n"
915 " CMP R1, R0 \n"
916 " BEQ loc_FF865A94 \n"
917 " LDR R0, [R8, #0xC] \n"
918 " BL sub_FF89CCA4 \n"
919 " LDR R0, [R8, #8] \n"
920 "loc_FF865A90:\n"
921 " BL sub_FF89CCA4 \n"
922 "loc_FF865A94:\n"
923 " ADD R0, R6, R5, LSL #2 \n"
924 " ADD R7, R0, R7, LSL #2 \n"
925 " LDR R0, [R7, #0x10] \n"
926 " LDR R1, [SP, #4] \n"
927 " BL sub_FF89CBCC \n"
928 " LDR R0, [R7, #0x10] \n"
929 " LDR R7, =0x260C \n"
930 " STR R0, [R9, R4, LSL #2] \n"
931 " LDR R0, [SP, #0x20] \n"
932 " LDRH R0, [R0] \n"
933 " STRH R0, [R11] \n"
934 " LDR R0, [R7, R4, LSL #2] \n"
935 " BL sub_FF83B290 \n"
936 " LDR R2, =0xFF8657EC \n"
937 " ADD R1, R2, #0 \n"
938 " ORR R3, R4, #0x300 \n"
939 " MOV R0, #0x1F4 \n"
940 " BL sub_FF83B1AC \n"
941 " TST R0, #1 \n"
942 " CMPNE R0, #0x15 \n"
943 " STR R0, [R7, R4, LSL #2] \n"
944 " BEQ loc_FF865AF8 \n"
945 " LDR R1, =0x2CF \n"
946 "loc_FF865AF0:\n"
947 " LDR R0, =0xFF865B50 \n"
948 " BL sub_FF81EB78 \n"
949 "loc_FF865AF8:\n"
950 " ADD R0, R6, R5, LSL #2 \n"
951 " LDR R0, [R0, #0x18] \n"
952 " CMP R0, #1 \n"
953 " BNE loc_FF865B88 \n"
954 " LDR R0, =0x25FC \n"
955 " LDR R0, [R0, #0xC] \n"
956 " CMP R0, #0 \n"
957 " BEQ loc_FF865B88 \n"
958 " LDR R2, =0xFF8657E0 \n"
959 " ADD R1, R2, #0 \n"
960 " ORR R3, R4, #0x400 \n"
961 " BL sub_FF83B1AC \n"
962 " TST R0, #1 \n"
963 " CMPNE R0, #0x15 \n"
964 " STR R0, [R10, R4, LSL #2] \n"
965 " BEQ loc_FF8658F0 \n"
966 " LDR R1, =0x2D6 \n"
967 "loc_FF865B3C:\n"
968 " LDR R0, =0xFF865B50 \n"
969 " BL sub_FF81EB78 \n"
970 " B loc_FF8658F0 \n"
971 " NOP \n"
972 "loc_FF865B88:\n"
973 " LDR R0, [R6, R5, LSL #2] \n"
974 " B loc_FF865958 \n"
975 "loc_FF865B90:\n"
976 " LDR R0, [R9, R4, LSL #2] \n"
977 " CMP R0, #0 \n"
978 " MOVEQ R1, #0x2E0 \n"
979 " LDREQ R0, =0xFF865B50 \n"
980 " BLEQ sub_FF81EB78 \n"
981 " RSB R0, R4, R4, LSL #3 \n"
982 " ADD R0, R6, R0, LSL #2 \n"
983 " LDR R0, [R0, #0xC] \n"
984 " BL sub_FF89CCA4 \n"
985 " MOV R2, #0 \n"
986 " STR R2, [R9, R4, LSL #2] \n"
987 " B loc_FF8658F0 \n"
988 );
989 };