root/platform/sx120is/sub/100b/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. blink
  2. taskCreateHook
  3. CreateTask_spytask
  4. boot
  5. loc_FFC001A0_my
  6. sub_FFC00FC4_my
  7. sub_FFC04B50_my
  8. taskcreate_Startup_my
  9. task_Startup_my
  10. init_file_modules_task
  11. sub_FFC6158C_my
  12. sub_FFC45524_my
  13. sub_FFC45108_my
  14. sub_FFC44E00_my
  15. JogDial_task_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 
   6 #define LED_AF     0xC022000C
   7 #define LED_ORANGE 0xC0220010
   8 #define LED_GREEN  0xC0220014
   9 
  10 #define DELAY 10000000
  11 
  12 void  __attribute__((naked,noinline)) blink()
  13 {
  14         asm volatile (
  15          //---------------start blink---------------
  16                         "B start\n""b10: .long 0\n""b11: .long 0\n""b12: .long 0\n""STR R10, b10\n""STR R11, b11\n""STR R12, b12\n"             
  17         "start: LDR R12, =0xC022000C\n"
  18                         "LDR R10, =0xFFFFF\n"
  19                         "MOV R11, #0x46\n"
  20                         "STR R11, [R12]\n"                      
  21         "check: CMP R10, #0\n"
  22                         "BEQ off\n"
  23                         "SUB R10, R10, #1\n"
  24                         "B check\n"                     
  25         "off:   MOV R11, #0x44\n"
  26                         "STR R11, [R12]\n"      
  27                         "LDR R10, b10\n""LDR R11, b11\n""LDR R12, b12\n"
  28                         "MOV pc,lr\n"
  29 //---------------end blink---------------/
  30         );
  31 }       
  32 /*      
  33 void debug_my_blink()
  34 {
  35         volatile long *p = (void*)LED_GREEN;                    // turned off later, so assumed to be power
  36         volatile long *p2 = (void*)LED_AF;                      // turned off later, so assumed to be power
  37         int counter;
  38 
  39         // DEBUG: blink led
  40         //led on
  41         counter = DELAY; 
  42         *p = 0x46; 
  43         while (counter--) { asm("nop\n nop\n"); };
  44         *p2 = 0x46;
  45         //led off
  46         counter = DELAY; 
  47         *p = 0x44; 
  48         while (counter--) { asm("nop\n nop\n"); };
  49         *p2= 0x44;
  50         
  51 }
  52 */
  53 
  54 const char * const new_sa = &_end;
  55 
  56 void JogDial_task_my(void);
  57 
  58 void taskCreateHook(int *p) { 
  59  p-=17;
  60 if (p[0]==0xFFC4F640)  p[0]=(int)capt_seq_task; 
  61 if (p[0]==0xFFC11638)  p[0]=(int)mykbd_task;
  62 if (p[0]==0xFFC696AC)  p[0]=(int)init_file_modules_task;
  63 if (p[0]==0xFFC37070)  p[0]=(int)JogDial_task_my;
  64 if (p[0]==0xFFD144F0)  p[0]=(int)movie_record_task;
  65 if (p[0]==0xFFC86E80)  p[0]=(int)exp_drv_task;
  66 if (p[0]==0xFFDFA744)  p[0]=(int)filewritetask;
  67 }
  68 
  69 void CreateTask_spytask() {
  70         _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  71 };
  72 
  73 
  74 void __attribute__((naked,noinline)) boot() {
  75     asm volatile (
  76                  "LDR     R1, =0xC0410000\n"
  77                  "MOV     R0, #0\n"
  78                  "STR     R0, [R1]\n"
  79                  "MOV     R1, #0x78\n"
  80                  "MCR     p15, 0, R1,c1,c0\n"
  81                  "MOV     R1, #0\n"
  82                  "MCR     p15, 0, R1,c7,c10, 4\n"
  83                  "MCR     p15, 0, R1,c7,c5\n"
  84                  "MCR     p15, 0, R1,c7,c6\n"
  85                  "MOV     R0, #0x3D\n"
  86                  "MCR     p15, 0, R0,c6,c0\n"
  87                  "MOV     R0, #0xC000002F\n"
  88                  "MCR     p15, 0, R0,c6,c1\n"
  89                  "MOV     R0, #0x33\n"
  90                  "MCR     p15, 0, R0,c6,c2\n"
  91                  "MOV     R0, #0x40000033\n"
  92                  "MCR     p15, 0, R0,c6,c3\n"
  93                  "MOV     R0, #0x80000017\n"
  94                  "MCR     p15, 0, R0,c6,c4\n"
  95                  "LDR     R0, =0xFFC0002B\n"
  96                  "MCR     p15, 0, R0,c6,c5\n"
  97                  "MOV     R0, #0x34\n"
  98                  "MCR     p15, 0, R0,c2,c0\n"
  99                  "MOV     R0, #0x34\n"
 100                  "MCR     p15, 0, R0,c2,c0, 1\n"
 101                  "MOV     R0, #0x34\n"
 102                  "MCR     p15, 0, R0,c3,c0\n"
 103                  "LDR     R0, =0x3333330\n"
 104                  "MCR     p15, 0, R0,c5,c0, 2\n"
 105                  "LDR     R0, =0x3333330\n"
 106                  "MCR     p15, 0, R0,c5,c0, 3\n"
 107                  "MRC     p15, 0, R0,c1,c0\n"
 108                  "ORR     R0, R0, #0x1000\n"
 109                  "ORR     R0, R0, #4\n"
 110                  "ORR     R0, R0, #1\n"
 111                  "MCR     p15, 0, R0,c1,c0\n"
 112                  "MOV     R1, #0x80000006\n"
 113                  "MCR     p15, 0, R1,c9,c1\n"
 114                  "MOV     R1, #6\n"
 115                  "MCR     p15, 0, R1,c9,c1, 1\n"
 116                  "MRC     p15, 0, R1,c1,c0\n"
 117                  "ORR     R1, R1, #0x50000\n"
 118                  "MCR     p15, 0, R1,c1,c0\n"
 119                  "LDR     R2, =0xC0200000\n"
 120                  "MOV     R1, #1\n"
 121                  "STR     R1, [R2,#0x10C]\n"
 122                  "MOV     R1, #0xFF\n"
 123                  "STR     R1, [R2,#0xC]\n"
 124                  "STR     R1, [R2,#0x1C]\n"
 125                  "STR     R1, [R2,#0x2C]\n"
 126                  "STR     R1, [R2,#0x3C]\n"
 127                  "STR     R1, [R2,#0x4C]\n"
 128                  "STR     R1, [R2,#0x5C]\n"
 129                  "STR     R1, [R2,#0x6C]\n"
 130                  "STR     R1, [R2,#0x7C]\n"
 131                  "STR     R1, [R2,#0x8C]\n"
 132                  "STR     R1, [R2,#0x9C]\n"
 133                  "STR     R1, [R2,#0xAC]\n"
 134                  "STR     R1, [R2,#0xBC]\n"
 135                  "STR     R1, [R2,#0xCC]\n"
 136                  "STR     R1, [R2,#0xDC]\n"
 137                  "STR     R1, [R2,#0xEC]\n"
 138                  "STR     R1, [R2,#0xFC]\n"
 139                  "LDR     R1, =0xC0400008\n"
 140                  "LDR     R2, =0x430005\n"
 141                  "STR     R2, [R1]\n"
 142                  "MOV     R1, #1\n"
 143                  "LDR     R2, =0xC0243100\n"
 144                  "STR     R2, [R1]\n"
 145                  "LDR     R2, =0xC0242010\n"
 146                  "LDR     R1, [R2]\n"
 147                  "ORR     R1, R1, #1\n"
 148                  "STR     R1, [R2]\n"
 149                  "LDR     R0, =0xFFF06D78\n"
 150                  "LDR     R1, =0x1900\n"
 151                  "LDR     R3, =0xBCC4\n"
 152 
 153  "loc_FFC0013C:\n"
 154                  "CMP     R1, R3\n"
 155                  "LDRCC   R2, [R0],#4\n"
 156                  "STRCC   R2, [R1],#4\n"
 157                  "BCC     loc_FFC0013C\n"
 158                  "LDR     R1, =0x10A6AC\n"
 159                  "MOV     R2, #0\n"
 160 
 161  "loc_FFC00154:\n"
 162                  "CMP     R3, R1\n"
 163                  "STRCC   R2, [R3],#4\n"
 164                  "BCC     loc_FFC00154\n"
 165                  "B       loc_FFC001A0_my\n" //------------------>
 166     );
 167 };
 168 
 169 
 170 void __attribute__((naked,noinline)) loc_FFC001A0_my() {
 171         *(int*)0x1934=(int)taskCreateHook;
 172         *(int*)0x1938=(int)taskCreateHook;
 173     *(int*)(0x24BC+0x4) = (*(int*)0xC0220118)&1 ? 0x100000: 0x200000; // replacement of sub_FFC1177C
 174     //from taskcreate_startup to sub_FFC1177C and there to sub_FFC367AC
 175         asm volatile (
 176                  "LDR     R0, =0xFFC00218\n"
 177                  "MOV     R1, #0\n"
 178                  "LDR     R3, =0xFFC00250\n"
 179  "loc_FFC001AC:\n"
 180                  "CMP     R0, R3\n"
 181                  "LDRCC   R2, [R0],#4\n"
 182                  "STRCC   R2, [R1],#4\n"
 183                  "BCC     loc_FFC001AC\n"
 184                  "LDR     R0, =0xFFC00250\n"
 185                  "MOV     R1, #0x4B0\n"
 186                  "LDR     R3, =0xFFC00464\n"
 187  "loc_FFC001C8:\n"
 188                  "CMP     R0, R3\n"
 189                  "LDRCC   R2, [R0],#4\n"
 190                  "STRCC   R2, [R1],#4\n"
 191                  "BCC     loc_FFC001C8\n"
 192                  "MOV     R0, #0xD2\n"
 193                  "MSR     CPSR_cxsf, R0\n"
 194                  "MOV     SP, #0x1000\n"
 195                  "MOV     R0, #0xD3\n"
 196                  "MSR     CPSR_cxsf, R0\n"
 197                  "MOV     SP, #0x1000\n"
 198                  "LDR     R0, =0x6C4\n"
 199                  "LDR     R2, =0xEEEEEEEE\n"
 200                  "MOV     R3, #0x1000\n"
 201  "loc_FFC001FC:\n"
 202                  "CMP     R0, R3\n"
 203                  "STRCC   R2, [R0],#4\n"
 204                  "BCC     loc_FFC001FC\n"
 205                  "BL      sub_FFC00FC4_my\n" //-------------->
 206         );
 207 }
 208 
 209 
 210 void __attribute__((naked,noinline)) sub_FFC00FC4_my() {
 211       asm volatile (
 212                  "STR     LR, [SP,#-4]!\n"
 213                  "SUB     SP, SP, #0x74\n"
 214                  "MOV     R0, SP\n"
 215                  "MOV     R1, #0x74\n"
 216                  "BL      sub_FFE90DB4\n"
 217                  "MOV     R0, #0x53000\n"
 218                  "STR     R0, [SP,#4]\n"
 219 
 220 #if defined(CHDK_NOT_IN_CANON_HEAP) // use original heap offset if CHDK is loaded in high memory
 221                  "LDR     R0, =0x10A6AC\n"
 222 #else
 223                  "LDR     R0, =new_sa\n"        // otherwise use patched value
 224                  "LDR     R0, [R0]\n"
 225 #endif
 226 
 227                  "LDR     R2, =0x2F9C00\n"
 228                  "LDR     R1, =0x2F24A8\n"
 229                  "STR     R0, [SP,#8]\n"
 230                  "SUB     R0, R1, R0\n"
 231                  "ADD     R3, SP, #0xC\n"
 232                  "STR     R2, [SP]\n"
 233                  "STMIA   R3, {R0-R2}\n"
 234                  "MOV     R0, #0x22\n"
 235                  "STR     R0, [SP,#0x18]\n"
 236                  "MOV     R0, #0x68\n"
 237                  "STR     R0, [SP,#0x1C]\n"
 238                  "LDR     R0, =0x19B\n"
 239                  "LDR     R1, =sub_FFC04B50_my\n"       // changed
 240                  "STR     R0, [SP,#0x20]\n"
 241                  "MOV     R0, #0x96\n"
 242                  "STR     R0, [SP,#0x24]\n"
 243                  "MOV     R0, #0x78\n"
 244                  "STR     R0, [SP,#0x28]\n"
 245                  "MOV     R0, #0x64\n"
 246                  "STR     R0, [SP,#0x2C]\n"
 247                  "MOV     R0, #0\n"
 248                  "STR     R0, [SP,#0x30]\n"
 249                  "STR     R0, [SP,#0x34]\n"
 250                  "MOV     R0, #0x10\n"
 251                  "STR     R0, [SP,#0x5C]\n"
 252                  "MOV     R0, #0x800\n"
 253                  "STR     R0, [SP,#0x60]\n"
 254                  "MOV     R0, #0xA0\n"
 255                  "STR     R0, [SP,#0x64]\n"
 256                  "MOV     R0, #0x280\n"
 257                  "STR     R0, [SP,#0x68]\n"
 258                  "MOV     R0, SP\n"
 259                  "MOV     R2, #0\n"
 260                  "BL      sub_FFC02B40\n"
 261                  "ADD     SP, SP, #0x74\n"
 262                  "LDR     PC, [SP],#4\n"
 263         );
 264 }
 265 
 266 void __attribute__((naked,noinline)) sub_FFC04B50_my() {
 267         asm volatile (
 268                  "STMFD   SP!, {R4,LR}\n"
 269                  "BL      sub_FFC00954\n"
 270                  "BL      sub_FFC08E64\n"
 271                  "CMP     R0, #0\n"
 272                  "LDRLT   R0, =0xFFC04C64\n"    // "dmSetup"
 273                  "BLLT    sub_FFC04C44\n"
 274                  "BL      sub_FFC0478C\n"
 275                  "CMP     R0, #0\n"
 276                  "LDRLT   R0, =0xFFC04C6C\n"    // "termDriverInit"
 277                  "BLLT    sub_FFC04C44\n"
 278                  "LDR     R0, =0xFFC04C7C\n"    // "/_term"
 279                  "BL      sub_FFC04874\n"
 280                  "CMP     R0, #0\n"
 281                  "LDRLT   R0, =0xFFC04C84\n"    // "termDeviceCreate"
 282                  "BLLT    sub_FFC04C44\n"
 283                  "LDR     R0, =0xFFC04C7C\n"    // "/_term"
 284                  "BL      sub_FFC0333C\n"
 285                  "CMP     R0, #0\n"
 286                  "LDRLT   R0, =0xFFC04C98\n"    // "stdioSetup"
 287                  "BLLT    sub_FFC04C44\n"
 288                  "BL      sub_FFC08878\n"
 289                  "CMP     R0, #0\n"
 290                  "LDRLT   R0, =0xFFC04CA4\n"    // "stdlibSetup"
 291                  "BLLT    sub_FFC04C44\n"
 292                  "BL      sub_FFC014A8\n"
 293                  "CMP     R0, #0\n"
 294                  "LDRLT   R0, =0xFFC04CB0\n"    // "armlib_setup"
 295                  "BLLT    sub_FFC04C44\n"
 296                  "LDMFD   SP!, {R4,LR}\n"
 297                  "B       taskcreate_Startup_my\n"
 298         );
 299 };
 300 
 301 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 302         asm volatile (
 303                  "STMFD   SP!, {R3,LR}\n"
 304                  "BL      sub_FFC11774\n"       // j_nullsub_232
 305                  "BL      sub_FFC188AC\n"
 306                  "CMP     R0, #0\n"
 307                  "BNE     loc_FFC0C060\n"
 308                  "BL      sub_FFC11770\n"
 309                  "CMP     R0, #0\n"
 310                  "BNE     loc_FFC0C060\n"
 311                  "BL      sub_FFC10E3C\n"
 312                  "LDR     R1, =0xC0220000\n"
 313                  "MOV     R0, #0x44\n"
 314                  "STR     R0, [R1,#0x84]\n"
 315                  "STR     R0, [R1,#0x80]\n"
 316                  "BL      sub_FFC11030\n"
 317  "loc_FFC0C05C:\n"
 318                  "B       loc_FFC0C05C\n"
 319  "loc_FFC0C060:\n"
 320 //                 "BL      sub_FFC1177C\n"     // removed for correct power-on on 'on/off' button
 321                  "BL      sub_FFC11778\n"       // j_nullsub_233
 322                  "BL      sub_FFC16B68\n"
 323                  "LDR     R1, =0x34E000\n"
 324                  "MOV     R0, #0\n"
 325                  "BL      sub_FFC16FB0\n"
 326                  "BL      sub_FFC16D5C\n"
 327                  "MOV     R3, #0\n"
 328                  "STR     R3, [SP]\n"
 329                  "LDR     R3, =task_Startup_my\n"       //----------->
 330                  "MOV     R2, #0\n"
 331                  "MOV     R1, #0x19\n"
 332                  "LDR     R0, =0xFFC0C0A8\n"    // "Startup"
 333                  "BL      sub_FFC0AD70\n"       // eventproc_export_CreateTask
 334                  "MOV     R0, #0\n"
 335                  "LDMFD   SP!, {R12,PC}\n"
 336      );
 337 }
 338 
 339 void __attribute__((naked,noinline)) task_Startup_my() {
 340      asm volatile (
 341                  "STMFD   SP!, {R4,LR}\n"
 342                  "BL      sub_FFC051AC\n"       // taskcreate_ClockSave
 343                  "BL      sub_FFC12850\n"
 344                  "BL      sub_FFC10AC8\n"
 345                  "BL      sub_FFC188EC\n"       // j_nullsub_236
 346                  "BL      sub_FFC18AD0\n"
 347 //                 BL      sub_FFC18980\n"      // start diskboot.bin
 348                  "BL      sub_FFC18C6C\n"
 349                  "BL      sub_FFC0FBB0\n"
 350                  "BL      sub_FFC18B00\n"
 351                  "BL      sub_FFC1630C\n"
 352                  "BL      sub_FFC18C70\n"
 353                  "BL      CreateTask_spytask\n"    // added
 354                  "BL      sub_FFC1166C\n"       // taskcreate_PhySw
 355                  "BL      sub_FFC146C0\n"
 356                  "BL      sub_FFC18C88\n"
 357                  "BL      sub_FFC0EEE8\n"       // nullsub_2
 358                  "BL      sub_FFC104AC\n"
 359                  "BL      sub_FFC18690\n"       // taskcreate_Bye
 360                  "BL      sub_FFC10A7C\n"
 361                  "BL      sub_FFC103D0\n"
 362                  "BL      sub_FFC0FBE4\n"
 363                  "BL      sub_FFC196E4\n"
 364                  "BL      sub_FFC103A8\n"
 365                  "LDMFD   SP!, {R4,LR}\n"
 366                  "B       sub_FFC052CC\n"
 367      );
 368 }
 369 
 370 
 371 void __attribute__((naked,noinline)) init_file_modules_task() {
 372     asm volatile(
 373                  "STMFD   SP!, {R4-R6,LR}\n"
 374                  "BL      sub_FFC61560\n"
 375                  "LDR     R5, =0x5006\n"
 376                  "MOVS    R4, R0\n"
 377                  "MOVNE   R1, #0\n"
 378                  "MOVNE   R0, R5\n"
 379                  "BLNE    sub_FFC63DA8\n"       // eventproc_export_PostLogicalEventToUI
 380                  "BL      sub_FFC6158C_my\n"    //--------->
 381                  "BL      core_spytask_can_start\n"     // CHDK: Set "it's-safe-to-start"-Flag for spytask
 382                  "CMP     R4, #0\n"
 383                  "MOVEQ   R0, R5\n"
 384                  "LDMEQFD SP!, {R4-R6,LR}\n"
 385                  "MOVEQ   R1, #0\n"
 386                  "BEQ     sub_FFC63DA8\n"       // eventproc_export_PostLogicalEventToUI
 387                  "LDMFD   SP!, {R4-R6,PC}\n"
 388     );
 389 }
 390 
 391 
 392 void __attribute__((naked,noinline)) sub_FFC6158C_my() {
 393     asm volatile(
 394                  "STMFD   SP!, {R4,LR}\n"
 395                  "MOV     R0, #3\n"
 396                  "BL      sub_FFC45524_my\n"    //------------->
 397                  "BL      sub_FFCF47FC\n"       // nullsub_105
 398                  "LDR     R4, =0x2E80\n"
 399                  "LDR     R0, [R4,#4]\n"
 400                  "CMP     R0, #0\n"
 401                  "BNE     loc_FFC615C4\n"
 402                  "BL      sub_FFC447E4\n"
 403                  "BL      sub_FFCEB398\n"
 404                  "BL      sub_FFC447E4\n"
 405                  "BL      sub_FFC4105C\n"
 406                  "BL      sub_FFC446E4\n"
 407                  "BL      sub_FFCEB458\n"
 408  "loc_FFC615C4:\n"
 409                  "MOV     R0, #1\n"
 410                  "STR     R0, [R4]\n"
 411                  "LDMFD   SP!, {R4,PC}\n"
 412     );
 413 }
 414 
 415 void __attribute__((naked,noinline)) sub_FFC45524_my() {
 416     asm volatile(
 417                  "STMFD   SP!, {R4-R8,LR}\n"
 418                  "MOV     R8, R0\n"
 419                  "BL      sub_FFC4548C\n"
 420                  "MOV     R6, R0\n"
 421                  "ADD     R1, R0, R0,LSL#4\n"
 422                  "LDR     R0, =0x100E0\n"
 423                  "ADD     R4, R0, R1,LSL#3\n"
 424                  "LDR     R0, [R4,#0x74]\n"
 425                  "CMP     R0, #4\n"
 426                  "LDREQ   R1, =0x804\n"
 427                  "LDREQ   R0, =0xFFC44FA0\n"    // aMounter_c
 428                  "BLEQ    sub_FFC0B048\n"       // DebugAssert
 429                  "MOV     R1, R8\n"
 430                  "MOV     R0, R6\n"
 431                  "BL      sub_FFC44CE4\n"
 432                  "LDR     R0, [R4,#0x38]\n"
 433                  "BL      sub_FFC45A90\n"
 434                  "CMP     R0, #0\n"
 435                  "STREQ   R0, [R4,#0x74]\n"
 436                  "MOV     R0, R6\n"
 437                  "BL      sub_FFC44D78\n"
 438                  "MOV     R0, R6\n"
 439                  "BL      sub_FFC45108_my\n"    //--------->
 440                  "MOV     R5, R0\n"
 441                  "MOV     R0, R6\n"
 442                  "BL      sub_FFC45324\n"
 443                  "LDR     R6, [R4,#0x3C]\n"
 444                  "AND     R7, R5, R0\n"
 445                  "CMP     R6, #0\n"
 446                  "LDR     R1, [R4,#0x38]\n"
 447                  "MOVEQ   R0, #0x80000001\n"
 448                  "MOV     R5, #0\n"
 449                  "BEQ     loc_FFC455D8\n"
 450                  "MOV     R0, R1\n"
 451                  "BL      sub_FFC4494C\n"
 452                  "CMP     R0, #0\n"
 453                  "MOVNE   R5, #4\n"
 454                  "CMP     R6, #5\n"
 455                  "ORRNE   R0, R5, #1\n"
 456                  "BICEQ   R0, R5, #1\n"
 457                  "CMP     R7, #0\n"
 458                  "BICEQ   R0, R0, #2\n"
 459                  "ORREQ   R0, R0, #0x80000000\n"
 460                  "BICNE   R0, R0, #0x80000000\n"
 461                  "ORRNE   R0, R0, #2\n"
 462  "loc_FFC455D8:\n"
 463                  "CMP     R8, #7\n"
 464                  "STR     R0, [R4,#0x40]\n"
 465                  "LDMNEFD SP!, {R4-R8,PC}\n"
 466                  "MOV     R0, R8\n"
 467                  "BL      sub_FFC454DC\n"
 468                  "CMP     R0, #0\n"
 469                  "LDMEQFD SP!, {R4-R8,LR}\n"
 470                  "LDREQ   R0, =0xFFC457E0\n"    // aEmemMountError ; "EMEM MOUNT ERROR!!!"
 471                  "BEQ     sub_FFC015A8\n"       // qPrintf
 472                  "LDMFD   SP!, {R4-R8,PC}\n"
 473     );
 474 }
 475 
 476 void __attribute__((naked,noinline)) sub_FFC45108_my() {
 477     asm volatile(
 478                  "STMFD   SP!, {R4-R6,LR}\n"
 479                  "MOV     R6, R0\n"
 480                  "ADD     R5, R0, R0,LSL#4\n"
 481                  "LDR     R0, =0x100E0\n"
 482                  "ADD     R4, R0, R5,LSL#3\n"
 483                  "LDR     R0, [R4,#0x74]\n"
 484                  "TST     R0, #2\n"
 485                  "MOVNE   R0, #1\n"
 486                  "LDMNEFD SP!, {R4-R6,PC}\n"
 487                  "LDR     R0, [R4,#0x38]\n"
 488                  "MOV     R1, R6\n"
 489                  "BL      sub_FFC44E00_my\n"    //------------->
 490                  "CMP     R0, #0\n"
 491                  "LDRNE   R0, [R4,#0x38]\n"
 492                  "MOVNE   R1, R6\n"
 493                  "BLNE    sub_FFC44FC4\n"
 494                  "LDR     R1, =0x10168\n"
 495                  "LDR     R1, [R1,R5,LSL#2]\n"
 496                  "CMP     R1, #4\n"
 497                  "BEQ     loc_FFC45168\n"
 498                  "CMP     R0, #0\n"
 499                  "LDMEQFD SP!, {R4-R6,PC}\n"
 500                  "MOV     R0, R6\n"
 501                  "BL      sub_FFC449DC\n"
 502  "loc_FFC45168:\n"
 503                  "CMP     R0, #0\n"
 504                  "LDRNE   R1, [R4,#0x74]\n"
 505                  "ORRNE   R1, R1, #2\n"
 506                  "STRNE   R1, [R4,#0x74]\n"
 507                  "LDMFD   SP!, {R4-R6,PC}\n"
 508     );
 509 }
 510 
 511 void __attribute__((naked,noinline)) sub_FFC44E00_my() {
 512     asm volatile(
 513                  "STMFD   SP!, {R4-R10,LR}\n"
 514                  "MOV     R9, R0\n"
 515                  "LDR     R0, =0x100E0\n"
 516                  "ADD     R1, R1, R1,LSL#4\n"
 517                  "ADD     R5, R0, R1,LSL#3\n"
 518                  "LDR     R0, [R5,#0x3C]\n"
 519                  "MOV     R8, #0\n"
 520                  "CMP     R0, #7\n"
 521                  "MOV     R7, #0\n"
 522                  "MOV     R6, #0\n"
 523                  "ADDLS   PC, PC, R0,LSL#2\n"
 524                  "B       loc_FFC44F5C\n"
 525  "loc_FFC44E30:\n"
 526                  "B       loc_FFC44E68\n"
 527  "loc_FFC44E34:\n"
 528                  "B       loc_FFC44E50\n"
 529  "loc_FFC44E38:\n"
 530                  "B       loc_FFC44E50\n"
 531  "loc_FFC44E3C:\n"
 532                  "B       loc_FFC44E50\n"
 533  "loc_FFC44E40:\n"
 534                  "B       loc_FFC44E50\n"
 535  "loc_FFC44E44:\n"
 536                  "B       loc_FFC44F54\n"
 537  "loc_FFC44E48:\n"
 538                  "B       loc_FFC44E50\n"
 539  "loc_FFC44E4C:\n"
 540                  "B       loc_FFC44E50\n"
 541  "loc_FFC44E50:\n"
 542                  "MOV     R2, #0\n"
 543                  "MOV     R1, #0x200\n"
 544                  "MOV     R0, #2\n"
 545                  "BL      sub_FFC5B6C8\n"
 546                  "MOVS    R4, R0\n"
 547                  "BNE     loc_FFC44E70\n"
 548  "loc_FFC44E68:\n"
 549                  "MOV     R0, #0\n"
 550                  "LDMFD   SP!, {R4-R10,PC}\n"
 551  "loc_FFC44E70:\n"
 552                  "LDR     R12, [R5,#0x50]\n"
 553                  "MOV     R3, R4\n"
 554                  "MOV     R2, #1\n"
 555                  "MOV     R1, #0\n"
 556                  "MOV     R0, R9\n"
 557                  "BLX     R12\n"
 558                  "CMP     R0, #1\n"
 559                  "BNE     loc_FFC44E9C\n"
 560                  "MOV     R0, #2\n"
 561                  "BL      sub_FFC5B814\n"
 562                  "B       loc_FFC44E68\n"
 563  "loc_FFC44E9C:\n"
 564                  "LDR     R1, [R5,#0x6C]\n"
 565                  "MOV     R0, R9\n"
 566                  "BLX     R1\n"
 567           //insertion of new code for FAT32 autodetection
 568                  "MOV   R1, R4\n"           //  pointer to MBR in R1
 569                  "BL    mbr_read_dryos\n"   //  total sectors count in R0 before and after call
 570 
 571           // Start of DataGhost's FAT32 autodetection code
 572           // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 573           // According to the code below, we can use R1, R2, R3 and R12.
 574           // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 575           // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 576           "MOV     R12, R4\n"                    // Copy the MBR start address so we have something to work with
 577           "MOV     LR, R4\n"                     // Save old offset for MBR signature
 578           "MOV     R1, #1\n"                     // Note the current partition number
 579           "B       dg_sd_fat32_enter\n"          // We actually need to check the first partition as well, no increments yet!
 580      "dg_sd_fat32:\n"
 581           "CMP     R1, #4\n"                     // Did we already see the 4th partition?
 582           "BEQ     dg_sd_fat32_end\n"            // Yes, break. We didn't find anything, so don't change anything.
 583           "ADD     R12, R12, #0x10\n"            // Second partition
 584           "ADD     R1, R1, #1\n"                 // Second partition for the loop
 585      "dg_sd_fat32_enter:\n"
 586           "LDRB    R2, [R12, #0x1BE]\n"          // Partition status
 587           "LDRB    R3, [R12, #0x1C2]\n"          // Partition type (FAT32 = 0xB)
 588           "CMP     R3, #0xB\n"                   // Is this a FAT32 partition?
 589           "CMPNE   R3, #0xC\n"                   // Not 0xB, is it 0xC (FAT32 LBA) then?
 590           "BNE     dg_sd_fat32\n"                // No, it isn't. Loop again.
 591           "CMP     R2, #0x00\n"                  // It is, check the validity of the partition type
 592           "CMPNE   R2, #0x80\n"
 593           "BNE     dg_sd_fat32\n"                // Invalid, go to next partition
 594                                                  // This partition is valid, it's the first one, bingo!
 595           "MOV     R4, R12\n"                    // Move the new MBR offset for the partition detection.
 596 
 597      "dg_sd_fat32_end:\n"
 598                 // End of DataGhost's FAT32 autodetection code
 599                 //end insertion
 600 
 601                  "LDRB    R1, [R4,#0x1C9]\n"
 602                  "LDRB    R3, [R4,#0x1C8]\n"
 603                  "LDRB    R12, [R4,#0x1CC]\n"
 604                  "MOV     R1, R1,LSL#24\n"
 605                  "ORR     R1, R1, R3,LSL#16\n"
 606                  "LDRB    R3, [R4,#0x1C7]\n"
 607                  "LDRB    R2, [R4,#0x1BE]\n"
 608 //                 "LDRB    LR, [R4,#0x1FF]\n"  // removed
 609                  "ORR     R1, R1, R3,LSL#8\n"
 610                  "LDRB    R3, [R4,#0x1C6]\n"
 611                  "CMP     R2, #0\n"
 612                  "CMPNE   R2, #0x80\n"
 613                  "ORR     R1, R1, R3\n"
 614                  "LDRB    R3, [R4,#0x1CD]\n"
 615                  "MOV     R3, R3,LSL#24\n"
 616                  "ORR     R3, R3, R12,LSL#16\n"
 617                  "LDRB    R12, [R4,#0x1CB]\n"
 618                  "ORR     R3, R3, R12,LSL#8\n"
 619                  "LDRB    R12, [R4,#0x1CA]\n"
 620                  "ORR     R3, R3, R12\n"
 621 //                 "LDRB    R12, [R4,#0x1FE]\n" // removed
 622                  "LDRB    R12, [LR,#0x1FE]\n"   // added, First MBR signature byte (0x55), LR is original offset.
 623                  "LDRB    LR, [LR,#0x1FF]\n"    // added, Last MBR signature byte (0xAA), LR is original offset.
 624                  "BNE     loc_FFC44F28\n"
 625                  "CMP     R0, R1\n"
 626                  "BCC     loc_FFC44F28\n"
 627                  "ADD     R2, R1, R3\n"
 628                  "CMP     R2, R0\n"
 629                  "CMPLS   R12, #0x55\n"
 630                  "CMPEQ   LR, #0xAA\n"
 631                  "MOVEQ   R7, R1\n"
 632                  "MOVEQ   R6, R3\n"
 633                  "MOVEQ   R4, #1\n"
 634                  "BEQ     loc_FFC44F2C\n"
 635  "loc_FFC44F28:\n"
 636                  "MOV     R4, R8\n"
 637  "loc_FFC44F2C:\n"
 638                  "MOV     R0, #2\n"
 639                  "BL      sub_FFC5B814\n"
 640                  "CMP     R4, #0\n"
 641                  "BNE     loc_FFC44F68\n"
 642                  "LDR     R1, [R5,#0x6C]\n"
 643                  "MOV     R7, #0\n"
 644                  "MOV     R0, R9\n"
 645                  "BLX     R1\n"
 646                  "MOV     R6, R0\n"
 647                  "B       loc_FFC44F68\n"
 648  "loc_FFC44F54:\n"
 649                  "MOV     R6, #0x40\n"
 650                  "B       loc_FFC44F68\n"
 651  "loc_FFC44F5C:\n"
 652                  "LDR     R1, =0x568\n"
 653                  "LDR     R0, =0xFFC44FA0\n"    // "Mounter.c"
 654                  "BL      sub_FFC0B048\n"       // DebugAssert
 655  "loc_FFC44F68:\n"
 656                  "STR     R7, [R5,#0x44]!\n"
 657                  "STMIB   R5, {R6,R8}\n"
 658                  "MOV     R0, #1\n"
 659                  "LDMFD   SP!, {R4-R10,PC}\n"
 660     );
 661 }
 662 
 663 void __attribute__((naked,noinline)) JogDial_task_my()
 664 {
 665         asm volatile(                           
 666                 "STMFD   SP!, {R4-R11,LR}\n"
 667                 "SUB     SP, SP, #0x2C\n"
 668                 "BL      sub_FFC37418\n"        // DebugAssert: JogDial.c:14
 669                 "LDR     R1, =0x24CC\n"
 670                 "LDR     R8, =0xFFE9A7E4\n"
 671                 "MOV     R0, #0\n"
 672                 "ADD     R2, SP, #0x14\n"
 673                 "ADD     R3, SP, #0x18\n"
 674                 "ADD     R10, SP, #0xc\n"
 675                 "ADD     R9, SP, #0x10\n"
 676                 "MOV     R7, #0\n"
 677 "loc_FFC3709C:\n"
 678                 "ADD     R3, SP, #0x18\n"
 679                 "ADD     R12, R3, R0,LSL#1\n"
 680                 "ADD     R2, SP, #0x14\n"
 681                 "STRH    R7, [R12]\n"
 682                 "ADD     R12, R2, R0,LSL#1\n"
 683                 "STRH    R7, [R12]\n"
 684                 "STR     R7, [R9,R0,LSL#2]\n"
 685                 "STR     R7, [R10,R0,LSL#2]\n"
 686                 "ADD     R0, R0, #1\n"
 687                 "CMP     R0, #1\n"
 688                 "BLT     loc_FFC3709C\n"
 689 
 690 "loc_FFC370C8:\n"
 691 //------------------  added code ---------------------
 692 "loop:\n"
 693                 "LDR     R0, =jogdial_stopped\n"
 694                 "LDR     R0, [R0]\n"
 695                 "CMP     R0, #0\n"
 696                 "BEQ     endofloop\n"
 697                 "MOV     R0, #40\n"
 698                 "BL      _SleepTask\n"
 699                 "B       loop\n"
 700 "endofloop:\n"
 701 //------------------  original code ------------------  
 702                 "LDR     R0, =0x24CC\n"
 703                 "MOV     R2, #0\n"
 704                 "LDR     R0, [R0,#8]\n"
 705                 "ADD     R1, SP, #0x4\n"
 706                 "BL      sub_FFC1659C\n"        // KerQueue.c
 707                 "TST     R0, #1\n"
 708                 "LDRNE   R1, =0x226\n"
 709                 "LDRNE   R0, =0xFFC3734C\n"
 710                 "BLNE    sub_FFC0B048\n"        // DebugAssert: JogDial.c:550
 711                 "LDR     R0, [SP,#0x4]\n"
 712                 "AND     R4, R0, #0xFF\n"
 713                 "AND     R0, R0, #0xFF00\n"
 714                 "CMP     R0, #0x100\n"
 715                 "BEQ     loc_FFC3714C\n"        //
 716 
 717                 "CMP     R0, #0x200\n"
 718                 "BEQ     loc_FFC37184\n"        //
 719                 "CMP     R0, #0x300\n"
 720                 "BEQ     loc_FFC37398\n"
 721                 "CMP     R0, #0x400\n"
 722                 "BNE     loc_FFC370C8\n"        //
 723                 "CMP     R4, #0\n"
 724                 "LDRNE   R1, =0x2CA\n"
 725                 "LDRNE   R0, =0xFFC3734C\n"
 726                 "BLNE    sub_FFC0B048\n"        // DebugAssert: JogDial.c:714
 727                 "LDR     R2, =0xFFE9A7D0\n"
 728                 "ADD     R0, R4, R4,LSL#2\n"
 729                 "LDR     R1, [R2,R0,LSL#2]\n"
 730                 "STR     R7, [R1]\n"
 731                 "MOV     R1, #1\n"
 732                 "ADD     R0, R2, R0,LSL#2\n"
 733 
 734 "loc_FFC37140:\n"
 735                 "LDR     R0, [R0,#8]\n"
 736                 "STR     R1, [R0]\n"
 737                 "B       loc_FFC370C8\n"
 738 
 739 "loc_FFC3714C:\n"
 740                 "LDR     R5, =0x24DC\n"
 741                 "LDR     R0, [R5,R4,LSL#2]\n"
 742                 "BL      sub_FFC17534\n"
 743                 "LDR     R2, =0xFFC36FFC\n"
 744                 "ADD     R1, R2, #0\n"
 745                 "ORR     R3, R4, #0x200\n"
 746                 "MOV     R0, #0x28\n"
 747                 "BL      sub_FFC17450\n"
 748                 "TST     R0, #1\n"
 749                 "CMPNE   R0, #0x15\n"
 750                 "STR     R0, [R10,R4,LSL#2]\n"
 751                 "BEQ     loc_FFC370C8\n"
 752                 "LDR     R1, =0x23B\n"
 753                 "B       loc_FFC3733C\n"
 754 
 755 "loc_FFC37184:\n"
 756                 "LDR     R1, =0xFFE9A7D0\n"
 757                 "ADD     R0, R4, R4,LSL#2\n"
 758                 "STR     R0, [SP,#0x28]\n"
 759                 "ADD     R0, R1, R0,LSL#2\n"
 760                 "STR     R0, [SP,#0x24]\n"
 761                 "LDR     R0, [R0,#4]\n"
 762                 "LDR     R0, [R0]\n"
 763                 "MOV     R2, R0,ASR#16\n"
 764                 "ADD     R0, SP, #0x18\n"
 765                 "ADD     R0, R0, R4,LSL#1\n"
 766                 "STR     R0, [SP,#0x20]\n"
 767                 "STRH    R2, [R0]\n"
 768                 "ADD     R0, SP, #0x14\n"
 769                 "ADD     R0, R0, R4,LSL#1\n"
 770                 "STR     R0, [SP,#0x1c]\n"
 771                 "LDRSH   R3, [R0]\n"
 772                 "SUB     R0, R2, R3\n"
 773                 "CMP     R0, #0\n"
 774                 "BEQ     loc_FFC372F4\n"
 775                 "RSBLT   R0, R0, #0\n"
 776                 "MOVLE   R5, #0\n"
 777                 "MOVGT   R5, #1\n"
 778                 "CMP     R0, #0xFF\n"
 779                 "BLS     loc_FFC37210\n"
 780                 "CMP     R1, #0\n"
 781                 "RSBLE   R0, R3, #0xFF\n"
 782                 "ADDLE   R0, R0, #0x7F00\n"
 783                 "ADDLE   R0, R0, R2\n"
 784                 "RSBGT   R0, R2, #0xFF\n"
 785                 "ADDGT   R0, R0, #0x7F00\n"
 786                 "ADDGT   R0, R0, R3\n"
 787                 "ADD     R0, R0, #0x8000\n"
 788                 "ADD     R0, R0, #1\n"
 789                 "EOR     R5, R5, #1\n"
 790 
 791 "loc_FFC37210:\n"
 792                 "STR     R0, [SP,#0x8]\n"
 793                 "LDR     R0, [R9,R4,LSL#2]\n"
 794                 "CMP     R0, #0\n"
 795                 "BEQ     loc_FFC37260\n"
 796                 "LDR     R1, =0xFFE9A7C8\n"
 797                 "ADD     R1, R1, R4,LSL#3\n"
 798                 "LDR     R1, [R1,R5,LSL#2]\n"
 799                 "CMP     R1, R0\n"
 800                 "BEQ     loc_FFC3727C\n"
 801                 "ADD     R11, R4, R4,LSL#1\n"
 802                 "ADD     R6, R8, R11,LSL#2\n"
 803                 "LDRB    R0, [R6,#9]\n"
 804                 "CMP     R0, #1\n"
 805                 "LDREQ   R0, [R6,#4]\n"
 806                 "BLEQ    sub_FFC65B38\n"
 807                 "LDRB    R0, [R6,#8]\n"
 808                 "CMP     R0, #1\n"
 809                 "BNE     loc_FFC3727C\n"
 810                 "LDR     R0, [R8,R11,LSL#2]\n"
 811                 "B       loc_FFC37278\n"
 812 
 813 "loc_FFC37260:\n"
 814                 "ADD     R0, R4, R4,LSL#1\n"
 815                 "ADD     R1, R8, R0,LSL#2\n"
 816                 "LDRB    R1, [R1,#8]\n"
 817                 "CMP     R1, #1\n"
 818                 "BNE     loc_FFC3727C\n"
 819                 "LDR     R0, [R8,R0,LSL#2]\n"
 820 
 821 "loc_FFC37278:\n"
 822                 "BL      sub_FFC65B38\n"
 823 
 824 "loc_FFC3727C:\n" // is in loop
 825                 "LDR     R0, =0xFFE9A7C8\n"
 826                 "LDR     R1, [SP,#0x8]\n"
 827                 "ADD     R6, R0, R4,LSL#3\n"
 828                 "LDR     R0, [R6,R5,LSL#2]\n"
 829                 "BL      sub_FFC65A68\n"
 830                 "LDR     R0, [R6,R5,LSL#2]\n"
 831                 "STR     R0, [R9,R4,LSL#2]\n"
 832                 "LDR     R0, [SP,#0x20]\n"
 833                 "LDR     R1, [SP,#0x1c]\n"
 834                 "LDRH    R0, [R0]\n"
 835                 "STRH    R0, [R1]\n"
 836                 "ADD     R0, R4, R4,LSL#1\n"
 837                 "ADD     R0, R8, R0,LSL#2\n"
 838                 "LDRB    R0, [R0,#9]\n"
 839                 "CMP     R0, #1\n"
 840                 "BNE     loc_FFC372F4\n"
 841                 "LDR     R5, =0x24DC\n"
 842                 "LDR     R0, [R5,R4,LSL#2]\n"
 843                 "BL      sub_FFC17534\n"
 844                 "LDR     R2, =0xFFC37008\n"
 845                 "ADD     R1, R2, #0\n"
 846                 "ORR     R3, R4, #0x300\n"
 847                 "MOV     R0, #0x1F4\n"
 848                 "BL      sub_FFC17450\n"
 849                 "TST     R0, #1\n"
 850                 "CMPNE   R0, #0x15\n"
 851                 "STR     R0, [R5,R4,LSL#2]\n"
 852                 "LDRNE   R0, =0xFFC3734C\n"
 853                 "MOVNE   R1, #0x2A4\n"
 854                 "BLNE    sub_FFC0B048\n"        // DebugAssert: JogDial.c:676
 855 
 856 "loc_FFC372F4:\n"
 857                 "ADD     R0, R4, R4,LSL#1\n"
 858                 "ADD     R0, R8, R0,LSL#2\n"
 859                 "LDRB    R0, [R0,#0xA]\n"
 860                 "CMP     R0, #1\n"
 861                 "BNE     loc_FFC3737C\n"
 862                 "LDR     R0, =0x23E4\n"
 863                 "LDR     R0, [R0,#0xC]\n"
 864                 "CMP     R0, #0\n"
 865                 "BEQ     loc_FFC3737C\n"
 866                 "LDR     R2, =0xFFC36FFC\n"
 867                 "ADD     R1, R2, #0\n"
 868                 "ORR     R3, R4, #0x400\n"
 869                 "BL      sub_FFC17450\n"
 870                 "TST     R0, #1\n"
 871                 "CMPNE   R0, #0x15\n"
 872                 "STR     R0, [R10,R4,LSL#2]\n"
 873                 "BEQ     loc_FFC370C8\n"
 874                 "LDR     R1, =0x2AF\n"
 875 
 876 "loc_FFC3733C:\n" // only from 0xFFC37180
 877                 "LDR     R0, =0xFFC3734C\n"
 878                 "BL      sub_FFC0B048\n"        // DebugAssert: JogDial.c: 571
 879                 "B       loc_FFC370C8\n"
 880                 
 881 "loc_FFC3737C:\n"
 882                 "LDR     R1, =0xFFE9A7D0\n"
 883                 "LDR     R0, [SP,#0x28]\n"
 884                 "LDR     R0, [R1,R0,LSL#2]\n"
 885                 "STR     R7, [R0]\n"
 886                 "LDR     R0, [SP,#0x24]\n"
 887                 "MOV     R1, #1\n"
 888                 "B       loc_FFC37140\n"
 889 
 890 "loc_FFC37398:\n"
 891                 "LDR     R0, [R9,R4,LSL#2]\n"
 892                 "CMP     R0, #0\n"
 893                 "MOVEQ   R1, #0x2BC\n"
 894                 "lDREQ   R0, =0xFFC3734C\n"
 895                 "BLEQ    sub_FFC0B048\n"        // DebugAssert: JogDial.c:700
 896                 "ADD     R0, R4, R4,LSL#1\n"
 897                 "ADD     R0, R8, R0,LSL#2\n"
 898                 "LDR     R0, [R0,#4]\n"
 899                 "BL      sub_FFC65B38\n"
 900                 "STR     R7, [R9,R4,LSL#2]\n"
 901                 "B       loc_FFC370C8\n"
 902 
 903  );
 904 }
 905 

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