root/platform/sx120is/sub/100b/filewrite.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. filewritetask
  2. sub_FFDFAA2C_my
  3. sub_FFDFAB60_my
  4. sub_FFDFAC6C_my

   1 /*
   2  * filewrite.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 
   7 typedef struct {
   8     unsigned int address;
   9     unsigned int length;
  10 } cam_ptp_data_chunk; //camera specific structure
  11 
  12 #define MAX_CHUNKS_FOR_JPEG 4 //model specific
  13 /*
  14  * fwt_data_struct: defined here as it's camera dependent
  15  * unneeded members are designated with unkn
  16  * file_offset, full_size, seek_flag only needs to be defined for DryOS>=r50 generation cameras
  17  * pdc is always required
  18  * name is not currently used
  19  */
  20 typedef struct
  21 {
  22     int unkn1[5];
  23     cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_JPEG];
  24     int unkn6;
  25     char name[32];
  26 } fwt_data_struct;
  27 
  28 #include "../../../generic/filewrite.c"
  29 
  30 /*************************************************************/
  31 //** filewritetask @ 0xFFDFA744 - 0xFFDFA828, length=58
  32 void __attribute__((naked,noinline)) filewritetask() {
  33 asm volatile (
  34 "    STMFD   SP!, {R1-R5,LR} \n"
  35 "    LDR     R4, =0x9138 \n"
  36 
  37 "loc_FFDFA74C:\n"
  38 "    LDR     R0, [R4, #0x10] \n"
  39 "    MOV     R2, #0 \n"
  40 "    ADD     R1, SP, #8 \n"
  41 "    BL      sub_FFC1659C /*_ReceiveMessageQueue*/ \n"
  42 "    CMP     R0, #0 \n"
  43 "    BNE     loc_FFDFA77C \n"
  44 "    LDR     R0, [SP, #8] \n"
  45 "    LDR     R1, [R0] \n"
  46 "    CMP     R1, #1 \n"
  47 "    BNE     loc_FFDFA784 \n"
  48 "    LDR     R0, [R4, #8] \n"
  49 "    BL      _GiveSemaphore \n"
  50 
  51 "loc_FFDFA77C:\n"
  52 "    BL      _ExitTask \n"
  53 "    LDMFD   SP!, {R1-R5,PC} \n"
  54 
  55 "loc_FFDFA784:\n"
  56 "    SUB     R1, R1, #2 \n"
  57 "    CMP     R1, #6 \n"
  58 "    ADDLS   PC, PC, R1, LSL#2 \n"
  59 "    B       loc_FFDFA74C \n"
  60 "    B       loc_FFDFA7B0 \n"
  61 "    B       loc_FFDFA814 \n"
  62 "    B       loc_FFDFA81C \n"
  63 "    B       loc_FFDFA81C \n"
  64 "    B       loc_FFDFA81C \n"
  65 "    B       loc_FFDFA81C \n"
  66 "    B       loc_FFDFA824 \n"
  67 
  68 "loc_FFDFA7B0:\n"
  69 "    MOV     R0, #0 \n"
  70 "    STR     R0, [SP] \n"
  71 
  72 "loc_FFDFA7B8:\n"
  73 "    LDR     R0, [R4, #0x10] \n"
  74 "    MOV     R1, SP \n"
  75 "    BL      sub_FFC167E0 /*_GetNumberOfPostedMessages*/ \n"
  76 "    LDR     R0, [SP] \n"
  77 "    CMP     R0, #0 \n"
  78 "    BEQ     loc_FFDFA7E4 \n"
  79 "    LDR     R0, [R4, #0x10] \n"
  80 "    MOV     R2, #0 \n"
  81 "    ADD     R1, SP, #4 \n"
  82 "    BL      sub_FFC1659C /*_ReceiveMessageQueue*/ \n"
  83 "    B       loc_FFDFA7B8 \n"
  84 
  85 "loc_FFDFA7E4:\n"
  86 "    LDR     R0, [R4] \n"
  87 "    CMN     R0, #1 \n"
  88 "    BEQ     loc_FFDFA808 \n"
  89 "    BL      fwt_close \n"  // --> Patched. Old value = _Close.
  90 "    MVN     R0, #0 \n"
  91 "    STR     R0, [R4] \n"
  92 "    LDR     R0, =0x92978 \n"
  93 "    BL      sub_FFC45A08 \n"
  94 "    BL      sub_FFC43E50 \n"
  95 
  96 "loc_FFDFA808:\n"
  97 "    LDR     R0, [R4, #0xC] \n"
  98 "    BL      _GiveSemaphore \n"
  99 "    B       loc_FFDFA74C \n"
 100 
 101 "loc_FFDFA814:\n"
 102 "    BL      sub_FFDFAA2C_my \n"  // --> Patched. Old value = 0xFFDFAA2C. Open stage
 103 "    B       loc_FFDFA74C \n"
 104 
 105 "loc_FFDFA81C:\n"
 106 "    BL      sub_FFDFAB60_my \n"  // --> Patched. Old value = 0xFFDFAB60. Write stage
 107 "    B       loc_FFDFA74C \n"
 108 
 109 "loc_FFDFA824:\n"
 110 "    BL      sub_FFDFAC6C_my \n"  // --> Patched. Old value = 0xFFDFAC6C. Close stage
 111 "    B       loc_FFDFA74C \n"
 112 );
 113 }
 114 
 115 /*************************************************************/
 116 //** sub_FFDFAA2C_my @ 0xFFDFAA2C - 0xFFDFAA6C, length=17
 117 void __attribute__((naked,noinline)) sub_FFDFAA2C_my() {
 118 asm volatile (
 119 "    STMFD   SP!, {R4-R8,LR} \n"
 120 "    MOV     R4, R0 \n"
 121 "    ADD     R0, R0, #0x38 \n"
 122 "    SUB     SP, SP, #0x38 \n"
 123 "    BL      sub_FFC45A08 \n"
 124 "    MOV     R1, #0 \n"
 125 "    BL      sub_FFC43E00 \n"
 126 "    LDR     R0, [R4, #0xC] \n"
 127 "    BL      sub_FFC42AFC \n"
 128 "    LDR     R7, [R4, #8] \n"
 129 "    LDR     R8, =0x1B6 \n"
 130 "    ADD     R6, R4, #0x38 \n"
 131 "    LDR     R5, [R4, #0xC] \n"
 132 //hook start
 133 "    MOV     R0, R4\n"
 134 "    BL      filewrite_main_hook\n"
 135 //hook end
 136 "    MOV     R0, R6 \n"
 137 "    MOV     R1, R7 \n"
 138 "    MOV     R2, R8 \n"
 139 "    BL      fwt_open \n"  // --> Patched. Old value = _Open.
 140 "    LDR     PC, =0xFFDFAA70 \n"  // Continue in firmware
 141 );
 142 }
 143 
 144 /*************************************************************/
 145 //** sub_FFDFAB60_my @ 0xFFDFAB60 - 0xFFDFAC68, length=67
 146 void __attribute__((naked,noinline)) sub_FFDFAB60_my() {
 147 asm volatile (
 148 "    STMFD   SP!, {R4-R10,LR} \n"
 149 "    MOV     R4, R0 \n"
 150 "    LDR     R0, [R0] \n"
 151 "    CMP     R0, #4 \n"
 152 "    LDREQ   R6, [R4, #0x18] \n"
 153 "    LDREQ   R7, [R4, #0x14] \n"
 154 "    BEQ     loc_FFDFABAC \n"
 155 "    CMP     R0, #5 \n"
 156 "    LDREQ   R6, [R4, #0x20] \n"
 157 "    LDREQ   R7, [R4, #0x1C] \n"
 158 "    BEQ     loc_FFDFABAC \n"
 159 "    CMP     R0, #6 \n"
 160 "    LDREQ   R6, [R4, #0x28] \n"
 161 "    LDREQ   R7, [R4, #0x24] \n"
 162 "    BEQ     loc_FFDFABAC \n"
 163 "    CMP     R0, #7 \n"
 164 "    BNE     loc_FFDFABC0 \n"
 165 "    LDR     R6, [R4, #0x30] \n"
 166 "    LDR     R7, [R4, #0x2C] \n"
 167 
 168 "loc_FFDFABAC:\n"
 169 "    CMP     R6, #0 \n"
 170 "    BNE     loc_FFDFABD0 \n"
 171 
 172 "loc_FFDFABB4:\n"
 173 "    MOV     R1, R4 \n"
 174 "    MOV     R0, #8 \n"
 175 "    B       loc_FFDFAC64 \n"
 176 
 177 "loc_FFDFABC0:\n"
 178 "    LDR     R1, =0x297 \n"
 179 "    LDR     R0, =0xFFDFA83C /*'dwFWrite.c'*/ \n"
 180 "    BL      _DebugAssert \n"
 181 "    B       loc_FFDFABB4 \n"
 182 
 183 "loc_FFDFABD0:\n"
 184 "    LDR     R9, =0x9138 \n"
 185 "    MOV     R5, R6 \n"
 186 
 187 "loc_FFDFABD8:\n"
 188 "    LDR     R0, [R4, #4] \n"
 189 "    CMP     R5, #0x1000000 \n"
 190 "    MOVLS   R8, R5 \n"
 191 "    MOVHI   R8, #0x1000000 \n"
 192 "    BIC     R1, R0, #0xFF000000 \n"
 193 "    CMP     R1, #0 \n"
 194 "    BICNE   R0, R0, #0xFF000000 \n"
 195 "    RSBNE   R0, R0, #0x1000000 \n"
 196 "    CMPNE   R8, R0 \n"
 197 "    MOVHI   R8, R0 \n"
 198 "    LDR     R0, [R9] \n"
 199 "    MOV     R2, R8 \n"
 200 "    MOV     R1, R7 \n"
 201 "    BL      fwt_write \n"  // --> Patched. Old value = _Write.
 202 "    LDR     R1, [R4, #4] \n"
 203 "    CMP     R8, R0 \n"
 204 "    ADD     R1, R1, R0 \n"
 205 "    STR     R1, [R4, #4] \n"
 206 "    BEQ     loc_FFDFAC38 \n"
 207 "    CMN     R0, #1 \n"
 208 "    LDRNE   R0, =0x9200015 \n"
 209 "    LDREQ   R0, =0x9200005 \n"
 210 "    STR     R0, [R4, #0x10] \n"
 211 "    B       loc_FFDFABB4 \n"
 212 
 213 "loc_FFDFAC38:\n"
 214 "    SUB     R5, R5, R0 \n"
 215 "    CMP     R5, R6 \n"
 216 "    ADD     R7, R7, R0 \n"
 217 "    LDRCS   R0, =0xFFDFA83C /*'dwFWrite.c'*/ \n"
 218 "    LDRCS   R1, =0x2C2 \n"
 219 "    BLCS    _DebugAssert \n"
 220 "    CMP     R5, #0 \n"
 221 "    BNE     loc_FFDFABD8 \n"
 222 "    LDR     R0, [R4] \n"
 223 "    MOV     R1, R4 \n"
 224 "    ADD     R0, R0, #1 \n"
 225 
 226 "loc_FFDFAC64:\n"
 227 "    LDMFD   SP!, {R4-R10,LR} \n"
 228 "    B       sub_FFDFA498 \n"
 229 );
 230 }
 231 
 232 /*************************************************************/
 233 //** sub_FFDFAC6C_my @ 0xFFDFAC6C - 0xFFDFAC88, length=8
 234 void __attribute__((naked,noinline)) sub_FFDFAC6C_my() {
 235 asm volatile (
 236 "    STMFD   SP!, {R4,R5,LR} \n"
 237 "    LDR     R5, =0x9138 \n"
 238 "    MOV     R4, R0 \n"
 239 "    LDR     R0, [R5] \n"
 240 "    SUB     SP, SP, #0x1C \n"
 241 "    CMN     R0, #1 \n"
 242 //"  BEQ     _sub_FFDFACA0 \n"
 243 "    LDREQ       PC, =0xFFDFACA0\n"
 244 "    BL      fwt_close \n"  // --> Patched. Old value = _Close.
 245 "    LDR     PC, =0xFFDFAC8C \n"  // Continue in firmware
 246 );
 247 }

/* [<][>][^][v][top][bottom][index][help] */