platform/ixus65_sd630/sub/100a/boot.c

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This source file includes following definitions.
boot
h_usrInit
h_usrKernelInit
h_usrRoot
   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 const char * const new_sa = &_end;
   6 
   7 /* Ours stuff */
   8 extern long wrs_kernel_bss_start;
   9 extern long wrs_kernel_bss_end;
  10 extern void createHook (void *pNewTcb);
  11 extern void deleteHook (void *pTcb);
  12 
  13 
  14 void boot();
  15 
  16 /* "relocated" functions */
  17 void __attribute__((naked,noinline)) h_usrInit();
  18 void __attribute__((naked,noinline)) h_usrKernelInit();
  19 void __attribute__((naked,noinline)) h_usrRoot();
  20 
  21 
  22 
  23 void boot()
  24 {
  25     // offset of "start of data" string in primary.bin - 4
  26     // All the asm code below is from: 0xFF8100F8
  27 
  28     long *canon_data_src = (void*)0xFFB29580;
  29     long *canon_data_dst = (void*)0x1900;
  30     // up to the end of flash
  31     long canon_data_len = 0xBDE0;
  32     // just after ROM data
  33     long *canon_bss_start = (void*)(0x1900+0xBDE0);
  34     // BSS end offset (from FF810134 disasm) minus BSS start
  35     long canon_bss_len = 0x9C6B0 - (long)canon_bss_start;
  36     long i;
  37 
  38     asm volatile (
  39         "MRC     p15, 0, R0,c1,c0\n"
  40         "ORR     R0, R0, #0x1000\n"
  41         "ORR     R0, R0, #4\n"
  42         "ORR     R0, R0, #1\n"
  43         "MCR     p15, 0, R0,c1,c0\n"
  44     :::"r0");
  45 /*
  46         int * data = (int*)0x170000;
  47         for (i = 0; i < 30*1024*1024/4; i++) {
  48           data[i] = 0xCAFEDEAD;
  49         }
  50 */
  51 
  52     for(i=0;i<canon_data_len/4;i++)
  53         canon_data_dst[i]=canon_data_src[i];
  54 
  55     for(i=0;i<canon_bss_len/4;i++)
  56         canon_bss_start[i]=0;
  57 
  58 
  59     asm volatile (
  60         "MRC     p15, 0, R0,c1,c0\n"
  61         "ORR     R0, R0, #0x1000\n"
  62         "BIC     R0, R0, #4\n"
  63         "ORR     R0, R0, #1\n"
  64         "MCR     p15, 0, R0,c1,c0\n"
  65     :::"r0");
  66     h_usrInit();
  67 }
  68 
  69 
  70 void h_usrInit()
  71 {
  72     asm volatile (
  73         "STR     LR, [SP,#-4]!\n"
  74         "BL      sub_FF81196C\n"
  75         "MOV     R0, #2\n"
  76         "MOV     R1, R0\n"
  77         "BL      sub_FFB0EED8\n"
  78         "BL      sub_FFB01B4C\n"
  79         "BL      sub_FF8111C4\n"
  80         "BL      sub_FF81172C\n"
  81         "LDR     LR, [SP],#4\n"
  82         "B       h_usrKernelInit\n"
  83     );
  84 }
  85 
  86 void  h_usrKernelInit()
  87 {
  88     asm volatile (
  89         "STMFD   SP!, {R4,LR}\n"
  90         "SUB     SP, SP, #8\n"
  91         "BL      sub_FFB0F3D8\n"
  92         "BL      sub_FFB22BE0\n"
  93         "LDR     R3, =0xC6F0\n"
  94         "LDR     R2, =0x99340\n"
  95         "LDR     R1, [R3]\n"
  96         "LDR     R0, =0x9C070\n"
  97         "MOV     R3, #0x100\n"
  98         "BL      sub_FFB1BCF0\n"
  99         "LDR     R3, =0xC6B0\n"
 100         "LDR     R0, =0xCEF8\n"
 101         "LDR     R1, [R3]\n"
 102         "BL      sub_FFB1BCF0\n"
 103         "LDR     R3, =0xC76C\n"
 104         "LDR     R0, =0x9C044\n"
 105         "LDR     R1, [R3]\n"
 106         "BL      sub_FFB1BCF0\n"
 107         "BL      sub_FFB27760\n"
 108         "BL      sub_FF8112B0\n"
 109         "MOV     R4, #0\n"
 110         "MOV     R3, R0\n"
 111         "MOV     R12, #0x800\n"
 112         "LDR     R0, =h_usrRoot\n"  // !!!
 113         "MOV     R1, #0x4000\n"
 114     );    
 115 //      "LDR     R2, =0xCC6B0\n"        // !!! 0x9C6B0 + 0x30000    MEMISOSIZE!!!
 116 //      "LDR     R2, =0x18A6B0\n"   // !!! Increased size !!! 0x9C6B0+0x1ae000= 0x24A6B0-0x18A6B0=786432
 117     asm volatile (
 118         "LDR     R2, =new_sa\n"
 119         "LDR     R2, [R2]\n"
 120     );
 121     asm volatile (
 122         "STR     R12, [SP]\n"                    
 123         "STR     R4, [SP,#4]\n"
 124         "BL      sub_FFB1FE20\n"
 125         "ADD     SP, SP, #8\n"
 126         "LDMFD   SP!, {R4,PC}\n"
 127     );
 128 }
 129 
 130 
 131 void  h_usrRoot()
 132 {
 133     asm volatile
 134     (
 135         "STMFD   SP!, {R4,R5,LR}\n"
 136         "MOV     R5, R0\n"
 137         "MOV     R4, R1\n"
 138         "BL      sub_FF8119D4\n"
 139         "MOV     R1, R4\n"
 140         "MOV     R0, R5\n"
 141         "BL      sub_FFB1406C\n"
 142         "MOV     R1, R4\n"
 143         "MOV     R0, R5\n"
 144         "BL      sub_FFB14AE4\n"
 145         "BL      sub_FF811708\n"
 146         "MOV     R0, #0x32\n"
 147         "BL      sub_FFB16A88\n"  // selectInit
 148     );
 149 
 150     asm volatile
 151     (   
 152         "BL      sub_FF811A14\n" //ios_tty_Init
 153         "BL      sub_FF8119F8\n"
 154         "BL      sub_FF811A40\n"
 155         "BL      sub_FFB16348\n"
 156         "BL      sub_FF8119C8\n"
 157     );
 158 
 159     _taskCreateHookAdd(createHook);
 160     _taskDeleteHookAdd(deleteHook);
 161 
 162     drv_self_hide();
 163 
 164     asm volatile (
 165         "LDMFD   SP!, {R4,R5,LR}\n"
 166         "B       sub_FF811370\n"
 167     );
 168 }
 169
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root/platform/ixus65_sd630/sub/100a/boot.c

DEFINITIONS
