root/platform/a1000/sub/100b/capt_seq.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. capt_seq_task
  2. sub_FFC4B554_my
  3. sub_FFD0C284_my
  4. exp_drv_task
  5. sub_FFC81D40_my
  6. sub_FFC6E480_my

   1 /*
   2  * capt_seq.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 
   8 #define USE_STUBS_NRFLAG 1          // see stubs_entry.S
   9 
  10 #include "../../../generic/capt_seq.c"
  11 
  12 /*************************************************************/
  13 //** capt_seq_task @ 0xFFC4B22C - 0xFFC4B468, length=144
  14 void __attribute__((naked,noinline)) capt_seq_task() {
  15 asm volatile (
  16 "    STMFD   SP!, {R3-R7,LR} \n"
  17 "    LDR     R6, =0x5190 \n"
  18 
  19 "loc_FFC4B234:\n"
  20 "    LDR     R0, [R6, #8] \n"
  21 "    MOV     R2, #0 \n"
  22 "    MOV     R1, SP \n"
  23 "    BL      sub_FFC1693C /*_ReceiveMessageQueue*/ \n"
  24 "    TST     R0, #1 \n"
  25 "    BEQ     loc_FFC4B260 \n"
  26 "    LDR     R1, =0x539 \n"
  27 "    LDR     R0, =0xFFC4AE40 /*'SsShootTask.c'*/ \n"
  28 "    BL      _DebugAssert \n"
  29 "    BL      _ExitTask \n"
  30 "    LDMFD   SP!, {R3-R7,PC} \n"
  31 
  32 "loc_FFC4B260:\n"
  33 "    LDR     R0, [SP] \n"
  34 "    LDR     R1, [R0] \n"
  35 "    CMP     R1, #0x1D \n"
  36 "    ADDLS   PC, PC, R1, LSL#2 \n"
  37 "    B       loc_FFC4B42C \n"
  38 "    B       loc_FFC4B2EC \n"
  39 "    B       loc_FFC4B2F4 \n"
  40 "    B       loc_FFC4B2FC \n"
  41 "    B       loc_FFC4B310 \n"
  42 "    B       loc_FFC4B308 \n"
  43 "    B       loc_FFC4B318 \n"
  44 "    B       loc_FFC4B320 \n"
  45 "    B       loc_FFC4B32C \n"
  46 "    B       loc_FFC4B384 \n"
  47 "    B       loc_FFC4B310 \n"
  48 "    B       loc_FFC4B38C \n"
  49 "    B       loc_FFC4B39C \n"
  50 "    B       loc_FFC4B3A4 \n"
  51 "    B       loc_FFC4B3AC \n"
  52 "    B       loc_FFC4B3B4 \n"
  53 "    B       loc_FFC4B3BC \n"
  54 "    B       loc_FFC4B3C4 \n"
  55 "    B       loc_FFC4B3CC \n"
  56 "    B       loc_FFC4B3D8 \n"
  57 "    B       loc_FFC4B3E0 \n"
  58 "    B       loc_FFC4B3E8 \n"
  59 "    B       loc_FFC4B3F0 \n"
  60 "    B       loc_FFC4B3F8 \n"
  61 "    B       loc_FFC4B404 \n"
  62 "    B       loc_FFC4B40C \n"
  63 "    B       loc_FFC4B414 \n"
  64 "    B       loc_FFC4B41C \n"
  65 "    B       loc_FFC4B424 \n"
  66 "    B       loc_FFC4B438 \n"
  67 "    B       loc_FFC4B438 \n"
  68 
  69 "loc_FFC4B2EC:\n"
  70 "    BL      sub_FFC4BAB8 \n"
  71 "    BL      shooting_expo_param_override\n"    // +
  72 "    B       loc_FFC4B324 \n"
  73 
  74 "loc_FFC4B2F4:\n"
  75 "    BL      sub_FFC4B554_my \n"  // --> Patched. Old value = 0xFFC4B554.
  76 "    B       loc_FFC4B438 \n"
  77 
  78 "loc_FFC4B2FC:\n"
  79 "    MOV     R0, #1 \n"
  80 "    BL      sub_FFC4BC54 \n"
  81 "    B       loc_FFC4B438 \n"
  82 
  83 "loc_FFC4B308:\n"
  84 "    BL      sub_FFC4B738 \n"
  85 "    B       loc_FFC4B438 \n"
  86 
  87 "loc_FFC4B310:\n"
  88 "    BL      sub_FFC4BA98 \n"
  89 "    B       loc_FFC4B438 \n"
  90 
  91 "loc_FFC4B318:\n"
  92 "    BL      sub_FFC4BAA0 \n"
  93 "    B       loc_FFC4B438 \n"
  94 
  95 "loc_FFC4B320:\n"
  96 "    BL      sub_FFC4BB74 \n"
  97 
  98 "loc_FFC4B324:\n"
  99 "    BL      sub_FFC4959C \n"
 100 "    B       loc_FFC4B438 \n"
 101 
 102 "loc_FFC4B32C:\n"
 103 "    LDR     R4, [R0, #0xC] \n"
 104 "    BL      sub_FFC4BAA8 \n"
 105 "    MOV     R0, R4 \n"
 106 "    BL      sub_FFD0B3CC \n"
 107 "    TST     R0, #1 \n"
 108 "    MOV     R5, R0 \n"
 109 "    BNE     loc_FFC4B36C \n"
 110 "    BL      sub_FFC5965C \n"
 111 "    STR     R0, [R4, #0x18] \n"
 112 "    MOV     R0, R4 \n"
 113 "    BL      sub_FFD0C1BC \n"
 114 "    MOV     R0, R4 \n"
 115 "    BL      sub_FFD0C670 \n"
 116 "    MOV     R5, R0 \n"
 117 "    LDR     R0, [R4, #0x18] \n"
 118 "    BL      sub_FFC59870 \n"
 119 
 120 "loc_FFC4B36C:\n"
 121 "    BL      sub_FFC4BA98 \n"
 122 "    MOV     R2, R4 \n"
 123 "    MOV     R1, #9 \n"
 124 "    MOV     R0, R5 \n"
 125 "    BL      sub_FFC49978 \n"
 126 "    B       loc_FFC4B438 \n"
 127 
 128 "loc_FFC4B384:\n"
 129 "    BL      sub_FFC4BBD4 \n"
 130 "    B       loc_FFC4B324 \n"
 131 
 132 "loc_FFC4B38C:\n"
 133 "    LDR     R0, =0x18C90 \n"
 134 "    LDR     R0, [R0, #0x4C] \n"
 135 "    BL      sub_FFC4BF6C \n"
 136 "    B       loc_FFC4B438 \n"
 137 
 138 "loc_FFC4B39C:\n"
 139 "    BL      sub_FFC4C214 \n"
 140 "    B       loc_FFC4B438 \n"
 141 
 142 "loc_FFC4B3A4:\n"
 143 "    BL      sub_FFC4C2A0 \n"
 144 "    B       loc_FFC4B438 \n"
 145 
 146 "loc_FFC4B3AC:\n"
 147 "    BL      sub_FFD0B5F0 \n"
 148 "    B       loc_FFC4B438 \n"
 149 
 150 "loc_FFC4B3B4:\n"
 151 "    BL      sub_FFD0B7D8 \n"
 152 "    B       loc_FFC4B438 \n"
 153 
 154 "loc_FFC4B3BC:\n"
 155 "    BL      sub_FFD0B868 \n"
 156 "    B       loc_FFC4B438 \n"
 157 
 158 "loc_FFC4B3C4:\n"
 159 "    BL      sub_FFD0B910 \n"
 160 "    B       loc_FFC4B438 \n"
 161 
 162 "loc_FFC4B3CC:\n"
 163 "    MOV     R0, #0 \n"
 164 "    BL      sub_FFD0BAB4 \n"
 165 "    B       loc_FFC4B438 \n"
 166 
 167 "loc_FFC4B3D8:\n"
 168 "    BL      sub_FFD0BBF4 \n"
 169 "    B       loc_FFC4B438 \n"
 170 
 171 "loc_FFC4B3E0:\n"
 172 "    BL      sub_FFD0BC88 \n"
 173 "    B       loc_FFC4B438 \n"
 174 
 175 "loc_FFC4B3E8:\n"
 176 "    BL      sub_FFD0BD4C \n"
 177 "    B       loc_FFC4B438 \n"
 178 
 179 "loc_FFC4B3F0:\n"
 180 "    BL      sub_FFC4BDBC \n"
 181 "    B       loc_FFC4B438 \n"
 182 
 183 "loc_FFC4B3F8:\n"
 184 "    BL      sub_FFC4BDE8 \n"
 185 "    BL      sub_FFC1416C \n"
 186 "    B       loc_FFC4B438 \n"
 187 
 188 "loc_FFC4B404:\n"
 189 "    BL      sub_FFD0B9CC \n"
 190 "    B       loc_FFC4B438 \n"
 191 
 192 "loc_FFC4B40C:\n"
 193 "    BL      sub_FFD0BA10 \n"
 194 "    B       loc_FFC4B438 \n"
 195 
 196 "loc_FFC4B414:\n"
 197 "    BL      sub_FFC4D74C \n"
 198 "    B       loc_FFC4B438 \n"
 199 
 200 "loc_FFC4B41C:\n"
 201 "    BL      sub_FFC4D768 \n"
 202 "    B       loc_FFC4B438 \n"
 203 
 204 "loc_FFC4B424:\n"
 205 "    BL      sub_FFC4D778 \n"
 206 "    B       loc_FFC4B438 \n"
 207 
 208 "loc_FFC4B42C:\n"
 209 "    LDR     R1, =0x65E \n"
 210 "    LDR     R0, =0xFFC4AE40 /*'SsShootTask.c'*/ \n"
 211 "    BL      _DebugAssert \n"
 212 
 213 "loc_FFC4B438:\n"
 214 "    LDR     R0, [SP] \n"
 215 "    LDR     R1, [R0, #4] \n"
 216 "    LDR     R0, [R6, #4] \n"
 217 "    BL      sub_FFC166AC /*_SetEventFlag*/ \n"
 218 "    LDR     R4, [SP] \n"
 219 "    LDR     R0, [R4, #8] \n"
 220 "    CMP     R0, #0 \n"
 221 "    LDREQ   R1, =0x11D \n"
 222 "    LDREQ   R0, =0xFFC4AE40 /*'SsShootTask.c'*/ \n"
 223 "    BLEQ    _DebugAssert \n"
 224 "    MOV     R0, #0 \n"
 225 "    STR     R0, [R4, #8] \n"
 226 "    B       loc_FFC4B234 \n"
 227 );
 228 }
 229 
 230 /*************************************************************/
 231 //** sub_FFC4B554_my @ 0xFFC4B554 - 0xFFC4B634, length=57
 232 void __attribute__((naked,noinline)) sub_FFC4B554_my() {
 233 asm volatile (
 234 "    STMFD   SP!, {R3-R5,LR} \n"
 235 "    LDR     R4, [R0, #0xC] \n"
 236 "    LDR     R0, [R4, #8] \n"
 237 "    ORR     R0, R0, #1 \n"
 238 "    STR     R0, [R4, #8] \n"
 239 "    MOV     R0, #2 \n"
 240 "    BL      sub_FFC462C8 \n"
 241 "    BL      sub_FFC4BAA8 \n"
 242 "    MOV     R0, R4 \n"
 243 "    BL      sub_FFC4BD70 \n"
 244 "    MOV     R0, R4 \n"
 245 "    BL      sub_FFD0B054 \n"
 246 "    CMP     R0, #0 \n"
 247 "    MOV     R0, R4 \n"
 248 "    BEQ     loc_FFC4B5AC \n"
 249 "    BL      sub_FFD0B0F0 \n"
 250 "    TST     R0, #1 \n"
 251 "    MOVNE   R2, R4 \n"
 252 "    LDMNEFD SP!, {R3-R5,LR} \n"
 253 "    MOVNE   R1, #1 \n"
 254 "    BNE     sub_FFC49978 \n"
 255 "    B       loc_FFC4B5B0 \n"
 256 
 257 "loc_FFC4B5AC:\n"
 258 "    BL      sub_FFD0B0A4 \n"
 259 
 260 "loc_FFC4B5B0:\n"
 261 "    MOV     R0, #0 \n"
 262 "    STR     R0, [SP] \n"
 263 "    LDR     R0, =0x18C90 \n"
 264 "    MOV     R2, #2 \n"
 265 "    LDRH    R0, [R0, #0x8A] \n"
 266 "    MOV     R1, SP \n"
 267 "    CMP     R0, #3 \n"
 268 "    LDRNE   R0, [R4, #0xC] \n"
 269 "    CMPNE   R0, #1 \n"
 270 "    MOVHI   R0, #1 \n"
 271 "    STRHI   R0, [SP] \n"
 272 "    LDR     R0, =0x123 \n"
 273 "    BL      _SetPropertyCase \n"
 274 "    BL      sub_FFD2D9BC \n"
 275 "    BL      sub_FFC5965C \n"
 276 "    STR     R0, [R4, #0x18] \n"
 277 "    MOV     R0, R4 \n"
 278 "    BL      sub_FFD0C1BC \n"
 279 "    BL      sub_FFD0CD0C \n"
 280 "    MOV     R0, R4 \n"
 281 "    BL      sub_FFD0C284_my \n"  // --> Patched. Old value = 0xFFD0C284.
 282 "    MOV     R5, R0 \n"
 283 "    BL      capt_seq_hook_raw_here\n"               // added
 284 "    BL      sub_FFC4D768 \n"
 285 "    BL      sub_FFC4D7A4 \n"
 286 "    MOV     R2, R4 \n"
 287 "    MOV     R1, #1 \n"
 288 "    MOV     R0, R5 \n"
 289 "    BL      sub_FFC49978 \n"
 290 "    BL      sub_FFD0C600 \n"
 291 "    CMP     R0, #0 \n"
 292 "    LDRNE   R0, [R4, #8] \n"
 293 "    ORRNE   R0, R0, #0x2000 \n"
 294 "    STRNE   R0, [R4, #8] \n"
 295 "    LDMFD   SP!, {R3-R5,PC} \n"
 296 );
 297 }
 298 
 299 /*************************************************************/
 300 //** sub_FFD0C284_my @ 0xFFD0C284 - 0xFFD0C2EC, length=27
 301 void __attribute__((naked,noinline)) sub_FFD0C284_my() {
 302 asm volatile (
 303 "    STMFD   SP!, {R1-R9,LR} \n"
 304 "    MOV     R4, R0 \n"
 305 "    BL      sub_FFD0CE6C \n"
 306 "    MVN     R1, #0 \n"
 307 "    BL      sub_FFC166E0 /*_ClearEventFlag*/ \n"
 308 "    MOV     R2, #4 \n"
 309 "    ADD     R1, SP, #4 \n"
 310 "    MOV     R0, #0x8A \n"
 311 "    BL      _GetPropertyCase \n"
 312 "    TST     R0, #1 \n"
 313 "    MOVNE   R1, #0x35C \n"
 314 "    LDRNE   R0, =0xFFD0C3FC /*'SsCaptureSeq.c'*/ \n"
 315 "    BLNE    _DebugAssert \n"
 316 "    LDR     R7, =0x18D48 \n"
 317 "    LDR     R6, =0x18C90 \n"
 318 "    LDRSH   R1, [R7, #0xE] \n"
 319 "    LDR     R0, [R6, #0x80] \n"
 320 "    BL      sub_FFDC18E0 \n"
 321 "    BL      _GetCCDTemperature \n"
 322 "    LDR     R3, =0x8598 \n"
 323 "    STRH    R0, [R4, #0x94] \n"
 324 "    STR     R3, [SP] \n"
 325 "    MOV     R1, R0 \n"
 326 "    LDRH    R0, [R6, #0x54] \n"
 327 "    LDRSH   R2, [R7, #0xC] \n"
 328 "    SUB     R3, R3, #4 \n"
 329 "    BL      sub_FFD0D464 \n"
 330 "    BL      wait_until_remote_button_is_released\n" // added
 331 "    BL      capt_seq_hook_set_nr\n"                 // added
 332 "    LDR     PC, =0xFFD0C2F0 \n"  // Continue in firmware
 333 );
 334 }
 335 
 336 /*************************************************************/
 337 //** exp_drv_task @ 0xFFC84248 - 0xFFC84840, length=383
 338 void __attribute__((naked,noinline)) exp_drv_task() {
 339 asm volatile (
 340 "    STMFD   SP!, {R4-R8,LR} \n"
 341 "    SUB     SP, SP, #0x20 \n"
 342 "    LDR     R8, =0xBB8 \n"
 343 "    LDR     R7, =0x6258 \n"
 344 "    LDR     R5, =0x1DBD8 \n"
 345 "    MOV     R0, #0 \n"
 346 "    ADD     R6, SP, #0x10 \n"
 347 "    STR     R0, [SP, #0xC] \n"
 348 
 349 "loc_FFC84268:\n"
 350 "    LDR     R0, [R7, #0x20] \n"
 351 "    MOV     R2, #0 \n"
 352 "    ADD     R1, SP, #0x1C \n"
 353 "    BL      sub_FFC1693C /*_ReceiveMessageQueue*/ \n"
 354 "    LDR     R0, [SP, #0xC] \n"
 355 "    CMP     R0, #1 \n"
 356 "    BNE     loc_FFC842B0 \n"
 357 "    LDR     R0, [SP, #0x1C] \n"
 358 "    LDR     R0, [R0] \n"
 359 "    CMP     R0, #0x13 \n"
 360 "    CMPNE   R0, #0x14 \n"
 361 "    CMPNE   R0, #0x15 \n"
 362 "    BEQ     loc_FFC843CC \n"
 363 "    CMP     R0, #0x27 \n"
 364 "    BEQ     loc_FFC843A4 \n"
 365 "    ADD     R1, SP, #0xC \n"
 366 "    MOV     R0, #0 \n"
 367 "    BL      sub_FFC841F8 \n"
 368 
 369 "loc_FFC842B0:\n"
 370 "    LDR     R0, [SP, #0x1C] \n"
 371 "    LDR     R1, [R0] \n"
 372 "    CMP     R1, #0x2C \n"
 373 "    BNE     loc_FFC842E0 \n"
 374 "    LDR     R0, [SP, #0x1C] \n"
 375 "    BL      sub_FFC854B4 \n"
 376 "    LDR     R0, [R7, #0x1C] \n"
 377 "    MOV     R1, #1 \n"
 378 "    BL      sub_FFC166AC /*_SetEventFlag*/ \n"
 379 "    BL      _ExitTask \n"
 380 "    ADD     SP, SP, #0x20 \n"
 381 "    LDMFD   SP!, {R4-R8,PC} \n"
 382 
 383 "loc_FFC842E0:\n"
 384 "    CMP     R1, #0x2B \n"
 385 "    BNE     loc_FFC842FC \n"
 386 "    LDR     R2, [R0, #0x88]! \n"
 387 "    LDR     R1, [R0, #4] \n"
 388 "    MOV     R0, R1 \n"
 389 "    BLX     R2 \n"
 390 "    B       loc_FFC84838 \n"
 391 
 392 "loc_FFC842FC:\n"
 393 "    CMP     R1, #0x25 \n"
 394 "    BNE     loc_FFC8434C \n"
 395 "    LDR     R0, [R7, #0x1C] \n"
 396 "    MOV     R1, #0x80 \n"
 397 "    BL      sub_FFC166E0 /*_ClearEventFlag*/ \n"
 398 "    LDR     R0, =0xFFC80D04 \n"
 399 "    MOV     R1, #0x80 \n"
 400 "    BL      sub_FFD002E8 \n"
 401 "    LDR     R0, [R7, #0x1C] \n"
 402 "    MOV     R2, R8 \n"
 403 "    MOV     R1, #0x80 \n"
 404 "    BL      sub_FFC165EC /*_WaitForAllEventFlag*/ \n"
 405 "    TST     R0, #1 \n"
 406 "    LDRNE   R1, =0xD36 \n"
 407 "    BNE     loc_FFC84390 \n"
 408 
 409 "loc_FFC84338:\n"
 410 "    LDR     R1, [SP, #0x1C] \n"
 411 "    LDR     R0, [R1, #0x8C] \n"
 412 "    LDR     R1, [R1, #0x88] \n"
 413 "    BLX     R1 \n"
 414 "    B       loc_FFC84838 \n"
 415 
 416 "loc_FFC8434C:\n"
 417 "    CMP     R1, #0x26 \n"
 418 "    BNE     loc_FFC8439C \n"
 419 "    ADD     R1, SP, #0xC \n"
 420 "    BL      sub_FFC841F8 \n"
 421 "    LDR     R0, [R7, #0x1C] \n"
 422 "    MOV     R1, #0x100 \n"
 423 "    BL      sub_FFC166E0 /*_ClearEventFlag*/ \n"
 424 "    LDR     R0, =0xFFC80D14 \n"
 425 "    MOV     R1, #0x100 \n"
 426 "    BL      sub_FFD00570 \n"
 427 "    LDR     R0, [R7, #0x1C] \n"
 428 "    MOV     R2, R8 \n"
 429 "    MOV     R1, #0x100 \n"
 430 "    BL      sub_FFC165EC /*_WaitForAllEventFlag*/ \n"
 431 "    TST     R0, #1 \n"
 432 "    BEQ     loc_FFC84338 \n"
 433 "    MOV     R1, #0xD40 \n"
 434 
 435 "loc_FFC84390:\n"
 436 "    LDR     R0, =0xFFC81404 /*'ExpDrv.c'*/ \n"
 437 "    BL      _DebugAssert \n"
 438 "    B       loc_FFC84338 \n"
 439 
 440 "loc_FFC8439C:\n"
 441 "    CMP     R1, #0x27 \n"
 442 "    BNE     loc_FFC843B4 \n"
 443 
 444 "loc_FFC843A4:\n"
 445 "    LDR     R0, [SP, #0x1C] \n"
 446 "    ADD     R1, SP, #0xC \n"
 447 "    BL      sub_FFC841F8 \n"
 448 "    B       loc_FFC84338 \n"
 449 
 450 "loc_FFC843B4:\n"
 451 "    CMP     R1, #0x2A \n"
 452 "    BNE     loc_FFC843CC \n"
 453 "    BL      sub_FFC6E710 \n"
 454 "    BL      sub_FFC6F39C \n"
 455 "    BL      sub_FFC6EED4 \n"
 456 "    B       loc_FFC84338 \n"
 457 
 458 "loc_FFC843CC:\n"
 459 "    LDR     R0, [SP, #0x1C] \n"
 460 "    MOV     R4, #1 \n"
 461 "    LDR     R1, [R0] \n"
 462 "    CMP     R1, #0x11 \n"
 463 "    CMPNE   R1, #0x12 \n"
 464 "    BNE     loc_FFC8443C \n"
 465 "    LDR     R1, [R0, #0x7C] \n"
 466 "    ADD     R1, R1, R1, LSL#1 \n"
 467 "    ADD     R1, R0, R1, LSL#2 \n"
 468 "    SUB     R1, R1, #8 \n"
 469 "    LDMIA   R1, {R2-R4} \n"
 470 "    STMIA   R6, {R2-R4} \n"
 471 "    BL      sub_FFC82D84 \n"
 472 "    LDR     R0, [SP, #0x1C] \n"
 473 "    LDR     R1, [R0, #0x7C] \n"
 474 "    LDR     R3, [R0, #0x88] \n"
 475 "    LDR     R2, [R0, #0x8C] \n"
 476 "    ADD     R0, R0, #4 \n"
 477 "    BLX     R3 \n"
 478 "    LDR     R0, [SP, #0x1C] \n"
 479 "    BL      sub_FFC8588C \n"
 480 "    LDR     R0, [SP, #0x1C] \n"
 481 "    LDR     R1, [R0, #0x7C] \n"
 482 "    LDR     R3, [R0, #0x90] \n"
 483 "    LDR     R2, [R0, #0x94] \n"
 484 "    ADD     R0, R0, #4 \n"
 485 "    BLX     R3 \n"
 486 "    B       loc_FFC84778 \n"
 487 
 488 "loc_FFC8443C:\n"
 489 "    CMP     R1, #0x13 \n"
 490 "    CMPNE   R1, #0x14 \n"
 491 "    CMPNE   R1, #0x15 \n"
 492 "    BNE     loc_FFC844F0 \n"
 493 "    ADD     R3, SP, #0xC \n"
 494 "    MOV     R2, SP \n"
 495 "    ADD     R1, SP, #0x10 \n"
 496 "    BL      sub_FFC82FCC \n"
 497 "    CMP     R0, #1 \n"
 498 "    MOV     R4, R0 \n"
 499 "    CMPNE   R4, #5 \n"
 500 "    BNE     loc_FFC8448C \n"
 501 "    LDR     R0, [SP, #0x1C] \n"
 502 "    MOV     R2, R4 \n"
 503 "    LDR     R1, [R0, #0x7C]! \n"
 504 "    LDR     R12, [R0, #0xC]! \n"
 505 "    LDR     R3, [R0, #4] \n"
 506 "    MOV     R0, SP \n"
 507 "    BLX     R12 \n"
 508 "    B       loc_FFC844C4 \n"
 509 
 510 "loc_FFC8448C:\n"
 511 "    LDR     R0, [SP, #0x1C] \n"
 512 "    CMP     R4, #2 \n"
 513 "    LDR     R3, [R0, #0x8C] \n"
 514 "    CMPNE   R4, #6 \n"
 515 "    BNE     loc_FFC844D8 \n"
 516 "    LDR     R12, [R0, #0x88] \n"
 517 "    MOV     R0, SP \n"
 518 "    MOV     R2, R4 \n"
 519 "    MOV     R1, #1 \n"
 520 "    BLX     R12 \n"
 521 "    LDR     R0, [SP, #0x1C] \n"
 522 "    MOV     R2, SP \n"
 523 "    ADD     R1, SP, #0x10 \n"
 524 "    BL      sub_FFC83F44 \n"
 525 
 526 "loc_FFC844C4:\n"
 527 "    LDR     R0, [SP, #0x1C] \n"
 528 "    LDR     R2, [SP, #0xC] \n"
 529 "    MOV     R1, R4 \n"
 530 "    BL      sub_FFC84198 \n"
 531 "    B       loc_FFC84778 \n"
 532 
 533 "loc_FFC844D8:\n"
 534 "    LDR     R1, [R0, #0x7C] \n"
 535 "    LDR     R12, [R0, #0x88] \n"
 536 "    ADD     R0, R0, #4 \n"
 537 "    MOV     R2, R4 \n"
 538 "    BLX     R12 \n"
 539 "    B       loc_FFC84778 \n"
 540 
 541 "loc_FFC844F0:\n"
 542 "    CMP     R1, #0x21 \n"
 543 "    CMPNE   R1, #0x22 \n"
 544 "    BNE     loc_FFC8453C \n"
 545 "    LDR     R1, [R0, #0x7C] \n"
 546 "    ADD     R1, R1, R1, LSL#1 \n"
 547 "    ADD     R1, R0, R1, LSL#2 \n"
 548 "    SUB     R1, R1, #8 \n"
 549 "    LDMIA   R1, {R2-R4} \n"
 550 "    STMIA   R6, {R2-R4} \n"
 551 "    BL      sub_FFC82310 \n"
 552 "    LDR     R0, [SP, #0x1C] \n"
 553 "    LDR     R1, [R0, #0x7C] \n"
 554 "    LDR     R3, [R0, #0x88] \n"
 555 "    LDR     R2, [R0, #0x8C] \n"
 556 "    ADD     R0, R0, #4 \n"
 557 "    BLX     R3 \n"
 558 "    LDR     R0, [SP, #0x1C] \n"
 559 "    BL      sub_FFC82600 \n"
 560 "    B       loc_FFC84778 \n"
 561 
 562 "loc_FFC8453C:\n"
 563 "    ADD     R1, R0, #4 \n"
 564 "    LDMIA   R1, {R2,R3,R12} \n"
 565 "    STMIA   R6, {R2,R3,R12} \n"
 566 "    LDR     R1, [R0] \n"
 567 "    CMP     R1, #0x24 \n"
 568 "    ADDLS   PC, PC, R1, LSL#2 \n"
 569 "    B       loc_FFC84758 \n"
 570 "    B       loc_FFC845EC \n"
 571 "    B       loc_FFC845EC \n"
 572 "    B       loc_FFC84640 \n"
 573 "    B       loc_FFC84648 \n"
 574 "    B       loc_FFC84648 \n"
 575 "    B       loc_FFC84648 \n"
 576 "    B       loc_FFC845EC \n"
 577 "    B       loc_FFC84640 \n"
 578 "    B       loc_FFC84648 \n"
 579 "    B       loc_FFC84648 \n"
 580 "    B       loc_FFC84660 \n"
 581 "    B       loc_FFC84660 \n"
 582 "    B       loc_FFC8474C \n"
 583 "    B       loc_FFC84754 \n"
 584 "    B       loc_FFC84754 \n"
 585 "    B       loc_FFC84754 \n"
 586 "    B       loc_FFC84754 \n"
 587 "    B       loc_FFC84758 \n"
 588 "    B       loc_FFC84758 \n"
 589 "    B       loc_FFC84758 \n"
 590 "    B       loc_FFC84758 \n"
 591 "    B       loc_FFC84758 \n"
 592 "    B       loc_FFC84650 \n"
 593 "    B       loc_FFC84658 \n"
 594 "    B       loc_FFC84658 \n"
 595 "    B       loc_FFC8466C \n"
 596 "    B       loc_FFC8466C \n"
 597 "    B       loc_FFC84674 \n"
 598 "    B       loc_FFC846A4 \n"
 599 "    B       loc_FFC846D4 \n"
 600 "    B       loc_FFC84704 \n"
 601 "    B       loc_FFC84734 \n"
 602 "    B       loc_FFC84734 \n"
 603 "    B       loc_FFC84758 \n"
 604 "    B       loc_FFC84758 \n"
 605 "    B       loc_FFC8473C \n"
 606 "    B       loc_FFC84744 \n"
 607 
 608 "loc_FFC845EC:\n"
 609 "    BL      sub_FFC811F0 \n"
 610 "    B       loc_FFC84758 \n"
 611 
 612 //SKIP DATA
 613 "    .long   0xFFC80D34 \n"
 614 "    ANDEQ   R0, R0, R8, LSR R11 \n"
 615 "    ANDEQ   R0, R0, R11, ASR#22 \n"
 616 "    ANDEQ   R0, R0, R8, ASR#23 \n"
 617 "    ANDEQ   R0, R0, PC, LSR R12 \n"
 618 "    ANDEQ   R0, R0, SP, ASR#24 \n"
 619 "    MULEQ   R0, R6, R12 \n"
 620 "    MULEQ   R0, R11, R12 \n"
 621 "    ANDEQ   R0, R0, R8, LSL#16 \n"
 622 "    ANDEQ   R0, R0, R9, LSR#25 \n"
 623 "    ANDEQ   R0, R0, PC, LSR#25 \n"
 624 "    ANDEQ   R0, R0, R3, LSL#26 \n"
 625 "    ANDEQ   R0, R0, R9, LSR#26 \n"
 626 "    ANDEQ   R0, R0, R12, LSR#26 \n"
 627 "    .long   0xFFC80D24 \n"
 628 "    ANDEQ   R0, R0, SP, ASR SP \n"
 629 //END SKIP
 630 
 631 "loc_FFC84640:\n"
 632 "    BL      sub_FFC81478 \n"
 633 "    B       loc_FFC84758 \n"
 634 
 635 "loc_FFC84648:\n"
 636 "    BL      sub_FFC8167C \n"
 637 "    B       loc_FFC84758 \n"
 638 
 639 "loc_FFC84650:\n"
 640 "    BL      sub_FFC818E4 \n"
 641 "    B       loc_FFC84758 \n"
 642 
 643 "loc_FFC84658:\n"
 644 "    BL      sub_FFC81AD8 \n"
 645 "    B       loc_FFC84758 \n"
 646 
 647 "loc_FFC84660:\n"
 648 "    BL      sub_FFC81D40_my \n"  // --> Patched. Old value = 0xFFC81D40.
 649 "    MOV     R4, #0 \n"
 650 "    B       loc_FFC84758 \n"
 651 
 652 "loc_FFC8466C:\n"
 653 "    BL      sub_FFC81E7C \n"
 654 "    B       loc_FFC84758 \n"
 655 
 656 "loc_FFC84674:\n"
 657 "    LDRH    R1, [R0, #4] \n"
 658 "    STRH    R1, [SP, #0x10] \n"
 659 "    LDRH    R1, [R5, #2] \n"
 660 "    STRH    R1, [SP, #0x12] \n"
 661 "    LDRH    R1, [R5, #4] \n"
 662 "    STRH    R1, [SP, #0x14] \n"
 663 "    LDRH    R1, [R5, #6] \n"
 664 "    STRH    R1, [SP, #0x16] \n"
 665 "    LDRH    R1, [R0, #0xC] \n"
 666 "    STRH    R1, [SP, #0x18] \n"
 667 "    BL      sub_FFC85528 \n"
 668 "    B       loc_FFC84758 \n"
 669 
 670 "loc_FFC846A4:\n"
 671 "    LDRH    R1, [R0, #4] \n"
 672 "    STRH    R1, [SP, #0x10] \n"
 673 "    LDRH    R1, [R5, #2] \n"
 674 "    STRH    R1, [SP, #0x12] \n"
 675 "    LDRH    R1, [R5, #4] \n"
 676 "    STRH    R1, [SP, #0x14] \n"
 677 "    LDRH    R1, [R5, #6] \n"
 678 "    STRH    R1, [SP, #0x16] \n"
 679 "    LDRH    R1, [R5, #8] \n"
 680 "    STRH    R1, [SP, #0x18] \n"
 681 "    BL      sub_FFC856A8 \n"
 682 "    B       loc_FFC84758 \n"
 683 
 684 "loc_FFC846D4:\n"
 685 "    LDRH    R1, [R5] \n"
 686 "    STRH    R1, [SP, #0x10] \n"
 687 "    LDRH    R1, [R0, #6] \n"
 688 "    STRH    R1, [SP, #0x12] \n"
 689 "    LDRH    R1, [R5, #4] \n"
 690 "    STRH    R1, [SP, #0x14] \n"
 691 "    LDRH    R1, [R5, #6] \n"
 692 "    STRH    R1, [SP, #0x16] \n"
 693 "    LDRH    R1, [R5, #8] \n"
 694 "    STRH    R1, [SP, #0x18] \n"
 695 "    BL      sub_FFC85754 \n"
 696 "    B       loc_FFC84758 \n"
 697 
 698 "loc_FFC84704:\n"
 699 "    LDRH    R1, [R5] \n"
 700 "    STRH    R1, [SP, #0x10] \n"
 701 "    LDRH    R1, [R5, #2] \n"
 702 "    STRH    R1, [SP, #0x12] \n"
 703 "    LDRH    R1, [R5, #4] \n"
 704 "    STRH    R1, [SP, #0x14] \n"
 705 "    LDRH    R1, [R5, #6] \n"
 706 "    STRH    R1, [SP, #0x16] \n"
 707 "    LDRH    R1, [R0, #0xC] \n"
 708 "    STRH    R1, [SP, #0x18] \n"
 709 "    BL      sub_FFC857F4 \n"
 710 "    B       loc_FFC84758 \n"
 711 
 712 "loc_FFC84734:\n"
 713 "    BL      sub_FFC820F0 \n"
 714 "    B       loc_FFC84758 \n"
 715 
 716 "loc_FFC8473C:\n"
 717 "    BL      sub_FFC82704 \n"
 718 "    B       loc_FFC84758 \n"
 719 
 720 "loc_FFC84744:\n"
 721 "    BL      sub_FFC8293C \n"
 722 "    B       loc_FFC84758 \n"
 723 
 724 "loc_FFC8474C:\n"
 725 "    BL      sub_FFC82AB4 \n"
 726 "    B       loc_FFC84758 \n"
 727 
 728 "loc_FFC84754:\n"
 729 "    BL      sub_FFC82C4C \n"
 730 
 731 "loc_FFC84758:\n"
 732 "    LDR     R0, [SP, #0x1C] \n"
 733 "    LDR     R1, [R0, #0x7C] \n"
 734 "    LDR     R3, [R0, #0x88] \n"
 735 "    LDR     R2, [R0, #0x8C] \n"
 736 "    ADD     R0, R0, #4 \n"
 737 "    BLX     R3 \n"
 738 "    CMP     R4, #1 \n"
 739 "    BNE     loc_FFC847C0 \n"
 740 
 741 "loc_FFC84778:\n"
 742 "    LDR     R0, [SP, #0x1C] \n"
 743 "    MOV     R2, #0xC \n"
 744 "    LDR     R1, [R0, #0x7C] \n"
 745 "    ADD     R1, R1, R1, LSL#1 \n"
 746 "    ADD     R0, R0, R1, LSL#2 \n"
 747 "    SUB     R4, R0, #8 \n"
 748 "    LDR     R0, =0x1DBD8 \n"
 749 "    ADD     R1, SP, #0x10 \n"
 750 "    BL      sub_FFE715DC \n"
 751 "    LDR     R0, =0x1DBE4 \n"
 752 "    MOV     R2, #0xC \n"
 753 "    ADD     R1, SP, #0x10 \n"
 754 "    BL      sub_FFE715DC \n"
 755 "    LDR     R0, =0x1DBF0 \n"
 756 "    MOV     R2, #0xC \n"
 757 "    MOV     R1, R4 \n"
 758 "    BL      sub_FFE715DC \n"
 759 "    B       loc_FFC84838 \n"
 760 
 761 "loc_FFC847C0:\n"
 762 "    LDR     R0, [SP, #0x1C] \n"
 763 "    LDR     R0, [R0] \n"
 764 "    CMP     R0, #0xB \n"
 765 "    BNE     loc_FFC84808 \n"
 766 "    MOV     R3, #0 \n"
 767 "    STR     R3, [SP] \n"
 768 "    MOV     R3, #1 \n"
 769 "    MOV     R2, #1 \n"
 770 "    MOV     R1, #1 \n"
 771 "    MOV     R0, #0 \n"
 772 "    BL      sub_FFC80FF8 \n"
 773 "    MOV     R3, #0 \n"
 774 "    STR     R3, [SP] \n"
 775 "    MOV     R3, #1 \n"
 776 "    MOV     R2, #1 \n"
 777 "    MOV     R1, #1 \n"
 778 "    MOV     R0, #0 \n"
 779 "    B       loc_FFC84834 \n"
 780 
 781 "loc_FFC84808:\n"
 782 "    MOV     R3, #1 \n"
 783 "    MOV     R2, #1 \n"
 784 "    MOV     R1, #1 \n"
 785 "    MOV     R0, #1 \n"
 786 "    STR     R3, [SP] \n"
 787 "    BL      sub_FFC80FF8 \n"
 788 "    MOV     R3, #1 \n"
 789 "    MOV     R2, #1 \n"
 790 "    MOV     R1, #1 \n"
 791 "    MOV     R0, #1 \n"
 792 "    STR     R3, [SP] \n"
 793 
 794 "loc_FFC84834:\n"
 795 "    BL      sub_FFC81138 \n"
 796 
 797 "loc_FFC84838:\n"
 798 "    LDR     R0, [SP, #0x1C] \n"
 799 "    BL      sub_FFC854B4 \n"
 800 "    B       loc_FFC84268 \n"
 801 );
 802 }
 803 
 804 /*************************************************************/
 805 //** sub_FFC81D40_my @ 0xFFC81D40 - 0xFFC81DFC, length=48
 806 void __attribute__((naked,noinline)) sub_FFC81D40_my() {
 807 asm volatile (
 808 "    STMFD   SP!, {R4-R8,LR} \n"
 809 "    LDR     R7, =0x6258 \n"
 810 "    MOV     R4, R0 \n"
 811 "    LDR     R0, [R7, #0x1C] \n"
 812 "    MOV     R1, #0x3E \n"
 813 "    BL      sub_FFC166E0 /*_ClearEventFlag*/ \n"
 814 "    LDRSH   R0, [R4, #4] \n"
 815 "    MOV     R2, #0 \n"
 816 "    MOV     R1, #0 \n"
 817 "    BL      sub_FFC80D88 \n"
 818 "    MOV     R6, R0 \n"
 819 "    LDRSH   R0, [R4, #6] \n"
 820 "    BL      sub_FFC80E98 \n"
 821 "    LDRSH   R0, [R4, #8] \n"
 822 "    BL      sub_FFC80EF0 \n"
 823 "    LDRSH   R0, [R4, #0xA] \n"
 824 "    BL      sub_FFC80F48 \n"
 825 "    LDRSH   R0, [R4, #0xC] \n"
 826 "    BL      sub_FFC80FA0 \n"
 827 "    MOV     R5, R0 \n"
 828 "    LDR     R0, [R4] \n"
 829 "    LDR     R8, =0x1DBF0 \n"
 830 "    CMP     R0, #0xB \n"
 831 "    MOVEQ   R6, #0 \n"
 832 "    MOVEQ   R5, #0 \n"
 833 "    BEQ     loc_FFC81DD0 \n"
 834 "    CMP     R6, #1 \n"
 835 "    BNE     loc_FFC81DD0 \n"
 836 "    LDRSH   R0, [R4, #4] \n"
 837 "    LDR     R1, =0xFFC80CF4 \n"
 838 "    MOV     R2, #2 \n"
 839 "    BL      sub_FFD0043C \n"
 840 "    STRH    R0, [R4, #4] \n"
 841 "    MOV     R0, #0 \n"
 842 "    STR     R0, [R7, #0x28] \n"
 843 "    B       loc_FFC81DD8 \n"
 844 
 845 "loc_FFC81DD0:\n"
 846 "    LDRH    R0, [R8] \n"
 847 "    STRH    R0, [R4, #4] \n"
 848 
 849 "loc_FFC81DD8:\n"
 850 "    CMP     R5, #1 \n"
 851 "    LDRNEH  R0, [R8, #8] \n"
 852 "    BNE     loc_FFC81DF4 \n"
 853 "    LDRSH   R0, [R4, #0xC] \n"
 854 "    LDR     R1, =0xFFC80D78 \n"
 855 "    MOV     R2, #0x20 \n"
 856 "    BL      sub_FFC854E4 \n"
 857 
 858 "loc_FFC81DF4:\n"
 859 "    STRH    R0, [R4, #0xC] \n"
 860 "    LDRSH   R0, [R4, #6] \n"
 861 "    BL      sub_FFC6E480_my \n"  // --> Patched. Old value = 0xFFC6E480.
 862 "    LDR     PC, =0xFFC81E00 \n"  // Continue in firmware
 863 );
 864 }
 865 
 866 /*************************************************************/
 867 //** sub_FFC6E480_my @ 0xFFC6E480 - 0xFFC6E4E8, length=27
 868 void __attribute__((naked,noinline)) sub_FFC6E480_my() {
 869 asm volatile (
 870 "    STMFD   SP!, {R4-R6,LR} \n"
 871 "    LDR     R5, =0x5F0C \n"
 872 "    MOV     R4, R0 \n"
 873 "    LDR     R0, [R5, #4] \n"
 874 "    CMP     R0, #1 \n"
 875 "    MOVNE   R1, #0x140 \n"
 876 "    LDRNE   R0, =0xFFC6E284 /*'Shutter.c'*/ \n"
 877 "    BLNE    _DebugAssert \n"
 878 "    CMN     R4, #0xC00 \n"
 879 "    LDREQSH R4, [R5, #2] \n"
 880 "    CMN     R4, #0xC00 \n"
 881 "    LDREQ   R1, =0x146 \n"
 882 "    LDREQ   R0, =0xFFC6E284 /*'Shutter.c'*/ \n"
 883 "    STRH    R4, [R5, #2] \n"
 884 "    BLEQ    _DebugAssert \n"
 885 "    MOV     R0, R4 \n"
 886 "    BL      apex2us \n"  // --> Patched. Old value = _apex2us.
 887 "    MOV     R4, R0 \n"
 888 //"  BL      _sub_FFC9F3D8 \n"  // --> Nullsub call removed.
 889 "    MOV     R0, R4 \n"
 890 "    BL      sub_FFCA3474 \n"
 891 "    TST     R0, #1 \n"
 892 "    LDRNE   R1, =0x14B \n"
 893 "    LDMNEFD SP!, {R4-R6,LR} \n"
 894 "    LDRNE   R0, =0xFFC6E284 /*'Shutter.c'*/ \n"
 895 "    BNE     _DebugAssert \n"
 896 "    LDMFD   SP!, {R4-R6,PC} \n"
 897 );
 898 }

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