root/platform/g9/sub/100i/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. CreateTask_spytask
  2. taskCreateHook
  3. boot
  4. sub_FF8101A4_my
  5. sub_FF810FB8_my
  6. uHwSetup_my
  7. CreateTask_Startup_my
  8. task_Startup_my
  9. taskcreatePhySw_my
  10. init_file_modules_task
  11. sub_FF870024_my
  12. sub_FF85235C_my
  13. sub_FF852198_my
  14. sub_FF852030_my
  15. JogDial_task_my

   1 /*
   2  * boot.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 
   8 const char * const new_sa = &_end;
   9 
  10 extern volatile int jogdial_stopped;
  11 void JogDial_task_my(void);
  12 
  13 /*----------------------------------------------------------------------
  14     CreateTask_spytask
  15 -----------------------------------------------------------------------*/
  16 void CreateTask_spytask()
  17 {
  18     _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  19 }
  20 
  21 #define DPs (void*)0xC022006C                                   // direct-print (blue)
  22 #define LED_AF (void*)0xC0220094        //LED_AF
  23 #define LED_ISO (void*)0xC02200B0       //LED_ISO   
  24 #define LED_PWR (void*)0xC0220068       //LED_PWR   
  25 #define LED_BLUE (void*)0xC022006C      //LED_BLUE
  26 #define DELAYs 3000000
  27 
  28 void taskCreateHook(int *p) {
  29     p-=16;
  30     if (p[0]==0xff861210)  p[0]=(int)capt_seq_task;
  31     if (p[0]==0xff8b8b90)  p[0]=(int)exp_drv_task;
  32     if (p[0]==0xff85d4c0)  p[0]=(int)movie_record_task;
  33     if (p[0]==0xffa2acb8)  p[0]=(int)filewritetask;
  34     if (p[0]==0xff877284)  p[0]=(int)init_file_modules_task;
  35     if (p[0]==0xff849530)  p[0]=(int)JogDial_task_my;
  36 }
  37 
  38 void boot()
  39 {
  40     long *canon_data_src = (void*)0xFFB2E41C; // OK     //canon_data_src!!!  @FF810130
  41     long *canon_data_dst = (void*)0x1900;       // OK  //MEMBASEADDR   @FF810134
  42     long canon_data_len = 0x140E4- 0x1900; // data_end - data_start     
  43     long *canon_bss_start = (void*)0x140e4; // just after data  // OK   //@FF810138
  44     long canon_bss_len = 0xb0b68 - 0x140e4; //  MEMISOSTART - 
  45 
  46     long i;
  47 
  48 
  49     // Enable CPU caches and MPU
  50     asm volatile (
  51     "MRC     p15, 0, R0,c1,c0\n"
  52     "ORR     R0, R0, #0x1000\n"
  53     "ORR     R0, R0, #4\n"
  54     "ORR     R0, R0, #1\n"
  55     "MCR     p15, 0, R0,c1,c0\n"
  56     :::"r0");
  57 
  58     for(i=0;i<canon_data_len/4;i++)
  59     canon_data_dst[i]=canon_data_src[i];
  60 
  61     for(i=0;i<canon_bss_len/4;i++)
  62     canon_bss_start[i]=0;
  63 
  64     //Replacement of sub_FF848C84 (sub_FF822E10) for correct power-on.
  65     //(short press = playback mode, long press = record mode)
  66     *(int*)(0x261C+8)= (*(int*)0xC02200C0)&1 ? 1 : 2;
  67 
  68    *(int*)0x1930=(int)taskCreateHook;
  69    *(int*)0x1934=(int)taskCreateHook;
  70 
  71     // jump to init-sequence that follows the data-copy-routine
  72     asm volatile ("B      sub_FF8101A4_my\n");
  73 };
  74 
  75 
  76 /*************************************************************/
  77 //** sub_FF8101A4_my @ 0xFF8101A4 - 0xFF81020C, length=27
  78 void __attribute__((naked,noinline)) sub_FF8101A4_my() {
  79 asm volatile (
  80 "    LDR     R0, =0xFF81021C \n"
  81 "    MOV     R1, #0 \n"
  82 "    LDR     R3, =0xFF810254 \n"
  83 
  84 "loc_FF8101B0:\n"
  85 "    CMP     R0, R3 \n"
  86 "    LDRCC   R2, [R0], #4 \n"
  87 "    STRCC   R2, [R1], #4 \n"
  88 "    BCC     loc_FF8101B0 \n"
  89 "    LDR     R0, =0xFF810254 \n"
  90 "    MOV     R1, #0x4B0 \n"
  91 "    LDR     R3, =0xFF810468 \n"
  92 
  93 "loc_FF8101CC:\n"
  94 "    CMP     R0, R3 \n"
  95 "    LDRCC   R2, [R0], #4 \n"
  96 "    STRCC   R2, [R1], #4 \n"
  97 "    BCC     loc_FF8101CC \n"
  98 "    MOV     R0, #0xD2 \n"
  99 "    MSR     CPSR_cxsf, R0 \n"
 100 "    MOV     SP, #0x1000 \n"
 101 "    MOV     R0, #0xD3 \n"
 102 "    MSR     CPSR_cxsf, R0 \n"
 103 "    MOV     SP, #0x1000 \n"
 104 "    LDR     R0, =0x6C4 \n"
 105 "    LDR     R2, =0xEEEEEEEE \n"
 106 "    MOV     R3, #0x1000 \n"
 107 
 108 "loc_FF810200:\n"
 109 "    CMP     R0, R3 \n"
 110 "    STRCC   R2, [R0], #4 \n"
 111 "    BCC     loc_FF810200 \n"
 112 "    BL      sub_FF810FB8_my \n"  // --> Patched. Old value = 0xFF810FB8.
 113 );
 114 }
 115 
 116 /*************************************************************/
 117 //** sub_FF810FB8_my @ 0xFF810FB8 - 0xFF811058, length=41
 118 void __attribute__((naked,noinline)) sub_FF810FB8_my() {
 119 asm volatile (
 120 "    STR     LR, [SP, #-4]! \n"
 121 "    SUB     SP, SP, #0x74 \n"
 122 "    MOV     R0, SP \n"
 123 "    MOV     R1, #0x74 \n"
 124 "    BL      sub_FFABD420 \n"
 125 "    MOV     R0, #0x53000 \n"
 126 "    STR     R0, [SP, #4] \n"
 127 
 128 #if defined(CHDK_NOT_IN_CANON_HEAP) // use original heap offset if CHDK is loaded in high memory
 129 "    LDR     R0, =0xB0B68 \n"
 130 #else
 131 "    LDR     R0, =new_sa\n"   // otherwise use patched value
 132 "    LDR     R0, [R0]\n"      //
 133 #endif
 134 
 135 "    LDR     R2, =0x2ABC00 \n"
 136 "    LDR     R1, =0x2A4968 \n"
 137 "    STR     R0, [SP, #8] \n"
 138 "    SUB     R0, R1, R0 \n"
 139 "    ADD     R3, SP, #0xC \n"
 140 "    STR     R2, [SP] \n"
 141 "    STMIA   R3, {R0-R2} \n"
 142 "    MOV     R0, #0x22 \n"
 143 "    STR     R0, [SP, #0x18] \n"
 144 "    MOV     R0, #0x68 \n"
 145 "    STR     R0, [SP, #0x1C] \n"
 146 "    LDR     R0, =0x19B \n"
 147 "    MOV     R1, #0x64 \n"
 148 "    STRD    R0, [SP, #0x20] \n"
 149 "    MOV     R0, #0x78 \n"
 150 "    STRD    R0, [SP, #0x28] \n"
 151 "    MOV     R0, #0 \n"
 152 "    STR     R0, [SP, #0x30] \n"
 153 "    STR     R0, [SP, #0x34] \n"
 154 "    MOV     R0, #0x10 \n"
 155 "    STR     R0, [SP, #0x5C] \n"
 156 "    MOV     R0, #0x800 \n"
 157 "    STR     R0, [SP, #0x60] \n"
 158 "    MOV     R0, #0xA0 \n"
 159 "    STR     R0, [SP, #0x64] \n"
 160 "    MOV     R0, #0x280 \n"
 161 "    STR     R0, [SP, #0x68] \n"
 162 "    LDR     R1, =uHwSetup_my \n"  // --> Patched. Old value = 0xFF814DBC.
 163 "    MOV     R0, SP \n"
 164 "    MOV     R2, #0 \n"
 165 "    BL      sub_FF812D70 \n"
 166 "    ADD     SP, SP, #0x74 \n"
 167 "    LDR     PC, [SP], #4 \n"
 168 );
 169 }
 170 
 171 /*************************************************************/
 172 //** uHwSetup_my @ 0xFF814DBC - 0xFF814E30, length=30
 173 void __attribute__((naked,noinline)) uHwSetup_my() {
 174 asm volatile (
 175 "    STMFD   SP!, {R4,LR} \n"
 176 "    BL      sub_FF81095C \n"
 177 "    BL      sub_FF819948 \n"
 178 "    CMP     R0, #0 \n"
 179 "    LDRLT   R0, =0xFF814ED0 /*'dmSetup'*/ \n"
 180 "    BLLT    _err_init_task \n"
 181 "    BL      sub_FF8149E0 \n"
 182 "    CMP     R0, #0 \n"
 183 "    LDRLT   R0, =0xFF814ED8 /*'termDriverInit'*/ \n"
 184 "    BLLT    _err_init_task \n"
 185 "    LDR     R0, =0xFF814EE8 /*'/_term'*/ \n"
 186 "    BL      sub_FF814ACC \n"
 187 "    CMP     R0, #0 \n"
 188 "    LDRLT   R0, =0xFF814EF0 /*'termDeviceCreate'*/ \n"
 189 "    BLLT    _err_init_task \n"
 190 "    LDR     R0, =0xFF814EE8 /*'/_term'*/ \n"
 191 "    BL      sub_FF81357C \n"
 192 "    CMP     R0, #0 \n"
 193 "    LDRLT   R0, =0xFF814F04 /*'stdioSetup'*/ \n"
 194 "    BLLT    _err_init_task \n"
 195 "    BL      sub_FF8194D0 \n"
 196 "    CMP     R0, #0 \n"
 197 "    LDRLT   R0, =0xFF814F10 /*'stdlibSetup'*/ \n"
 198 "    BLLT    _err_init_task \n"
 199 "    BL      sub_FF8114D0 \n"
 200 "    CMP     R0, #0 \n"
 201 "    LDRLT   R0, =0xFF814F1C /*'armlib_setup'*/ \n"
 202 "    BLLT    _err_init_task \n"
 203 "    LDMFD   SP!, {R4,LR} \n"
 204 "    B       CreateTask_Startup_my \n"  // --> Patched. Old value = 0xFF81DC0C.
 205 );
 206 }
 207 
 208 /*************************************************************/
 209 //** CreateTask_Startup_my @ 0xFF81DC0C - 0xFF81DC88, length=32
 210 void __attribute__((naked,noinline)) CreateTask_Startup_my() {
 211 asm volatile (
 212 "    STMFD   SP!, {R3,LR} \n"
 213 //"  BL      _sub_FF822E08 \n"  // --> Nullsub call removed.
 214 "    BL      sub_FF82C8FC \n"
 215 "    CMP     R0, #0 \n"
 216 "    BNE     loc_FF81DC4C \n"
 217 "    BL      sub_FF824568 \n"
 218 "    CMP     R0, #0 \n"
 219 "    LDREQ   R2, =0xC0220000 \n"
 220 "    LDREQ   R0, [R2, #0xC0] \n"
 221 "    LDREQ   R1, [R2, #0xC4] \n"
 222 "    ORREQ   R0, R0, R1 \n"
 223 "    TSTEQ   R0, #1 \n"
 224 "    BNE     loc_FF81DC4C \n"
 225 "    MOV     R0, #0x44 \n"
 226 "    STR     R0, [R2, #0x4C] \n"
 227 
 228 "loc_FF81DC48:\n"
 229 "    B       loc_FF81DC48 \n"
 230 
 231 "loc_FF81DC4C:\n"
 232 //"  BL      _sub_FF848C84 \n"  // removed, see boot() function
 233 //"  BL      _sub_FF822E0C \n"  // --> Nullsub call removed.
 234 "    BL      sub_FF82A488 \n"
 235 "    MOV     R1, #0x300000 \n"
 236 "    MOV     R0, #0 \n"
 237 "    BL      sub_FF82A6D0 \n"
 238 "    BL      sub_FF82A67C \n"
 239 "    MOV     R3, #0 \n"
 240 "    STR     R3, [SP] \n"
 241 "    LDR     R3, =task_Startup_my \n"  // --> Patched. Old value = 0xFF81DBB0.
 242 "    MOV     R2, #0 \n"
 243 "    MOV     R1, #0x19 \n"
 244 "    LDR     R0, =0xFF81DC90 /*'Startup'*/ \n"
 245 "    BL      _CreateTask \n"
 246 "    MOV     R0, #0 \n"
 247 "    LDMFD   SP!, {R12,PC} \n"
 248 );
 249 }
 250 
 251 /*************************************************************/
 252 //** task_Startup_my @ 0xFF81DBB0 - 0xFF81DC08, length=23
 253 void __attribute__((naked,noinline)) task_Startup_my() {
 254 asm volatile (
 255 "    STMFD   SP!, {R4,LR} \n"
 256 "    BL      sub_FF81517C \n"
 257 "    BL      sub_FF823FA0 \n"
 258 "    BL      sub_FF820E60 \n"
 259 //"  BL      _sub_FF849478 \n"  // --> Nullsub call removed.
 260 "    BL      sub_FF82CADC \n"
 261 //"  BL      _sub_FF82C9C4 \n"  // load DISKBOOT.BIN
 262 "    BL      CreateTask_spytask\n" // added
 263 "    BL      sub_FF873410 \n"
 264 "    BL      sub_FF82CB2C \n"
 265 "    BL      sub_FF8299CC \n"
 266 "    BL      sub_FF82CCA8 \n"
 267 "    BL      taskcreatePhySw_my \n"  // --> Patched. Old value = 0xFF822DA8. Checks buttons and acts accordingly
 268 "    BL      sub_FF82629C \n"
 269 "    BL      sub_FF82CCC0 \n"
 270 //"  BL      _sub_FF820B00 \n"  // --> Nullsub call removed.
 271 "    BL      sub_FF822130 \n"
 272 "    BL      sub_FF82C6A8 \n"
 273 "    BL      sub_FF8228D4 \n"
 274 "    BL      sub_FF82203C \n"
 275 "    BL      sub_FF82D720 \n"
 276 "    BL      sub_FF821FF8 \n"
 277 "    LDMFD   SP!, {R4,LR} \n"
 278 "    B       sub_FF815088 \n"
 279 );
 280 }
 281 
 282 /*************************************************************/
 283 //** taskcreatePhySw_my @ 0xFF822DA8 - 0xFF822DE0, length=15
 284 void __attribute__((naked,noinline)) taskcreatePhySw_my() {
 285 asm volatile (
 286 "    STMFD   SP!, {R3-R5,LR} \n"
 287 "    LDR     R4, =0x1C98 \n"
 288 "    LDR     R0, [R4, #0x10] \n"
 289 "    CMP     R0, #0 \n"
 290 "    BNE     loc_FF822DDC \n"
 291 "    MOV     R3, #0 \n"
 292 "    STR     R3, [SP] \n"
 293 "    LDR     R3, =mykbd_task \n"  // --> Patched. Old value = 0xFF822D74.
 294 "    MOV     R2, #0x800 \n"
 295 "    MOV     R1, #0x17 \n"
 296 "    LDR     R0, =0xFF822FA0 /*'PhySw'*/ \n"
 297 "    BL      sub_FF81BDC8 /*_CreateTaskStrictly*/ \n"
 298 "    STR     R0, [R4, #0x10] \n"
 299 
 300 "loc_FF822DDC:\n"
 301 "    LDMFD   SP!, {R3-R5,LR} \n"
 302 "    B       sub_FF84962C \n"
 303 );
 304 }
 305 
 306 /*************************************************************/
 307 //** init_file_modules_task @ 0xFF877284 - 0xFF8772B8, length=14
 308 void __attribute__((naked,noinline)) init_file_modules_task() {
 309 asm volatile (
 310 "    STMFD   SP!, {R4-R6,LR} \n"
 311 "    BL      sub_FF86FFF8 \n"
 312 "    LDR     R5, =0x5006 \n"
 313 "    MOVS    R4, R0 \n"
 314 "    MOVNE   R1, #0 \n"
 315 "    MOVNE   R0, R5 \n"
 316 "    BLNE    _PostLogicalEventToUI \n"
 317 "    BL      sub_FF870024_my \n"  // --> Patched. Old value = 0xFF870024.
 318 "    BL      core_spytask_can_start\n"  // CHDK: Set "it's-safe-to-start" flag for spytask
 319 "    CMP     R4, #0 \n"
 320 "    MOVEQ   R0, R5 \n"
 321 "    LDMEQFD SP!, {R4-R6,LR} \n"
 322 "    MOVEQ   R1, #0 \n"
 323 "    BEQ     _PostLogicalEventToUI \n"
 324 "    LDMFD   SP!, {R4-R6,PC} \n"
 325 );
 326 }
 327 
 328 /*************************************************************/
 329 //** sub_FF870024_my @ 0xFF870024 - 0xFF87005C, length=15
 330 void __attribute__((naked,noinline)) sub_FF870024_my() {
 331 asm volatile (
 332 "    STMFD   SP!, {R4,LR} \n"
 333 "    BL      sub_FF85235C_my \n"  // --> Patched. Old value = 0xFF85235C.
 334 "    LDR     R4, =0x5AC4 \n"
 335 "    LDR     R0, [R4, #4] \n"
 336 "    CMP     R0, #0 \n"
 337 "    BNE     loc_FF870054 \n"
 338 "    BL      sub_FF87FD60 \n"
 339 "    BL      sub_FF90B9B4 \n"
 340 "    BL      sub_FF87FD60 \n"
 341 "    BL      sub_FF918508 \n"
 342 "    BL      sub_FF87FD70 \n"
 343 "    BL      sub_FF90BA5C \n"
 344 
 345 "loc_FF870054:\n"
 346 "    MOV     R0, #1 \n"
 347 "    STR     R0, [R4] \n"
 348 "    LDMFD   SP!, {R4,PC} \n"
 349 );
 350 }
 351 
 352 /*************************************************************/
 353 //** sub_FF85235C_my @ 0xFF85235C - 0xFF8523F4, length=39
 354 void __attribute__((naked,noinline)) sub_FF85235C_my() {
 355 asm volatile (
 356 "    STMFD   SP!, {R4-R6,LR} \n"
 357 "    MOV     R6, #0 \n"
 358 "    MOV     R0, R6 \n"
 359 "    BL      sub_FF851F2C \n"
 360 "    LDR     R4, =0x168D0 \n"
 361 "    MOV     R5, #0 \n"
 362 "    LDR     R0, [R4, #0x38] \n"
 363 "    BL      sub_FF8528F4 \n"
 364 "    CMP     R0, #0 \n"
 365 "    LDREQ   R0, =0x2D34 \n"
 366 "    STREQ   R5, [R0, #0xC] \n"
 367 "    STREQ   R5, [R0, #0x10] \n"
 368 "    STREQ   R5, [R0, #0x14] \n"
 369 "    MOV     R0, R6 \n"
 370 "    BL      sub_FF851F6C \n"
 371 "    MOV     R0, R6 \n"
 372 "    BL      sub_FF852198_my \n"  // --> Patched. Old value = 0xFF852198.
 373 "    MOV     R5, R0 \n"
 374 "    MOV     R0, R6 \n"
 375 "    BL      sub_FF852204 \n"
 376 "    LDR     R1, [R4, #0x3C] \n"
 377 "    AND     R2, R5, R0 \n"
 378 "    CMP     R1, #0 \n"
 379 "    MOV     R0, #0 \n"
 380 "    MOVEQ   R0, #0x80000001 \n"
 381 "    BEQ     loc_FF8523F0 \n"
 382 "    LDR     R3, [R4, #0x2C] \n"
 383 "    CMP     R3, #2 \n"
 384 "    MOVEQ   R0, #4 \n"
 385 "    CMP     R1, #5 \n"
 386 "    ORRNE   R0, R0, #1 \n"
 387 "    BICEQ   R0, R0, #1 \n"
 388 "    CMP     R2, #0 \n"
 389 "    BICEQ   R0, R0, #2 \n"
 390 "    ORREQ   R0, R0, #0x80000000 \n"
 391 "    BICNE   R0, R0, #0x80000000 \n"
 392 "    ORRNE   R0, R0, #2 \n"
 393 
 394 "loc_FF8523F0:\n"
 395 "    STR     R0, [R4, #0x40] \n"
 396 "    LDMFD   SP!, {R4-R6,PC} \n"
 397 );
 398 }
 399 
 400 /*************************************************************/
 401 //** sub_FF852198_my @ 0xFF852198 - 0xFF852200, length=27
 402 void __attribute__((naked,noinline)) sub_FF852198_my() {
 403 asm volatile (
 404 "    STMFD   SP!, {R4-R6,LR} \n"
 405 "    LDR     R5, =0x2D34 \n"
 406 "    MOV     R6, R0 \n"
 407 "    LDR     R0, [R5, #0x10] \n"
 408 "    CMP     R0, #0 \n"
 409 "    MOVNE   R0, #1 \n"
 410 "    LDMNEFD SP!, {R4-R6,PC} \n"
 411 "    MOV     R0, #0x17 \n"
 412 "    MUL     R1, R0, R6 \n"
 413 "    LDR     R0, =0x168D0 \n"
 414 "    ADD     R4, R0, R1, LSL#2 \n"
 415 "    LDR     R0, [R4, #0x38] \n"
 416 "    MOV     R1, R6 \n"
 417 "    BL      sub_FF852030_my \n"  // --> Patched. Old value = 0xFF852030.
 418 "    CMP     R0, #0 \n"
 419 "    LDMEQFD SP!, {R4-R6,PC} \n"
 420 "    LDR     R0, [R4, #0x38] \n"
 421 "    MOV     R1, R6 \n"
 422 "    BL      sub_FF852A0C \n"
 423 "    CMP     R0, #0 \n"
 424 "    LDMEQFD SP!, {R4-R6,PC} \n"
 425 "    MOV     R0, R6 \n"
 426 "    BL      sub_FF851B4C \n"
 427 "    CMP     R0, #0 \n"
 428 "    MOVNE   R1, #1 \n"
 429 "    STRNE   R1, [R5, #0x10] \n"
 430 "    LDMFD   SP!, {R4-R6,PC} \n"
 431 );
 432 }
 433 
 434 /*************************************************************/
 435 //** sub_FF852030_my @ 0xFF852030 - 0xFF852194, length=90
 436 void __attribute__((naked,noinline)) sub_FF852030_my() {
 437 asm volatile (
 438 "    STMFD   SP!, {R4-R8,LR} \n"
 439 "    MOV     R8, R0 \n"
 440 "    MOV     R0, #0x17 \n"
 441 "    MUL     R1, R0, R1 \n"
 442 "    LDR     R0, =0x168D0 \n"
 443 "    MOV     R6, #0 \n"
 444 "    ADD     R7, R0, R1, LSL#2 \n"
 445 "    LDR     R0, [R7, #0x3C] \n"
 446 "    MOV     R5, #0 \n"
 447 "    CMP     R0, #6 \n"
 448 "    ADDLS   PC, PC, R0, LSL#2 \n"
 449 "    B       loc_FF85217C \n"
 450 "    B       loc_FF852094 \n"
 451 "    B       loc_FF85207C \n"
 452 "    B       loc_FF85207C \n"
 453 "    B       loc_FF85207C \n"
 454 "    B       loc_FF85207C \n"
 455 "    B       loc_FF852174 \n"
 456 "    B       loc_FF85207C \n"
 457 
 458 "loc_FF85207C:\n"
 459 "    MOV     R2, #0 \n"
 460 "    MOV     R1, #0x200 \n"
 461 "    MOV     R0, #3 \n"
 462 "    BL      sub_FF86C4D0 \n"
 463 "    MOVS    R4, R0 \n"
 464 "    BNE     loc_FF85209C \n"
 465 
 466 "loc_FF852094:\n"
 467 "    MOV     R0, #0 \n"
 468 "    LDMFD   SP!, {R4-R8,PC} \n"
 469 
 470 "loc_FF85209C:\n"
 471 "    LDR     R12, [R7, #0x4C] \n"
 472 "    MOV     R3, R4 \n"
 473 "    MOV     R2, #1 \n"
 474 "    MOV     R1, #0 \n"
 475 "    MOV     R0, R8 \n"
 476 "    BLX     R12 \n"
 477 "    CMP     R0, #1 \n"
 478 "    BNE     loc_FF8520C8 \n"
 479 "    MOV     R0, #3 \n"
 480 "    BL      sub_FF86C610 \n"
 481 "    B       loc_FF852094 \n"
 482 
 483 "loc_FF8520C8:\n"
 484 "    MOV     R0, R8 \n"
 485 "    BL      sub_FF9290BC \n"
 486 
 487 "    MOV     R1, R4\n"              //  pointer to MBR in R1
 488 "    BL      mbr_read_dryos\n"      //  total sectors count in R0 before and after call
 489 
 490 // Start of DataGhost's FAT32 autodetection code
 491 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 492 // According to the code below, we can use R1, R2, R3 and R12.
 493 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 494 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 495 "    MOV     R12, R4\n"             // Copy the MBR start address so we have something to work with
 496 "    MOV     LR, R4\n"              // Save old offset for MBR signature
 497 "    MOV     R1, #1\n"              // Note the current partition number
 498 "    B       dg_sd_fat32_enter\n"   // We actually need to check the first partition as well, no increments yet!
 499 "dg_sd_fat32:\n"
 500 "    CMP     R1, #4\n"              // Did we already see the 4th partition?
 501 "    BEQ     dg_sd_fat32_end\n"     // Yes, break. We didn't find anything, so don't change anything.
 502 "    ADD     R12, R12, #0x10\n"     // Second partition
 503 "    ADD     R1, R1, #1\n"          // Second partition for the loop
 504 "dg_sd_fat32_enter:\n"
 505 "    LDRB    R2, [R12, #0x1BE]\n"   // Partition status
 506 "    LDRB    R3, [R12, #0x1C2]\n"   // Partition type (FAT32 = 0xB)
 507 "    CMP     R3, #0xB\n"            // Is this a FAT32 partition?
 508 "    CMPNE   R3, #0xC\n"            // Not 0xB, is it 0xC (FAT32 LBA) then?
 509 "    CMPNE   R3, #0x7\n"            // exFat?
 510 "    BNE     dg_sd_fat32\n"         // No, it isn't. Loop again.
 511 "    CMP     R2, #0x00\n"           // It is, check the validity of the partition type
 512 "    CMPNE   R2, #0x80\n"
 513 "    BNE     dg_sd_fat32\n"         // Invalid, go to next partition
 514                                     // This partition is valid, it's the first one, bingo!
 515 "    MOV     R4, R12\n"             // Move the new MBR offset for the partition detection.
 516 
 517 "dg_sd_fat32_end:\n"
 518 // End of DataGhost's FAT32 autodetection code
 519 
 520 "    LDRB    R1, [R4, #0x1C9] \n"
 521 "    LDRB    R3, [R4, #0x1C8] \n"
 522 "    LDRB    R12, [R4, #0x1CC] \n"
 523 "    MOV     R1, R1, LSL#24 \n"
 524 "    ORR     R1, R1, R3, LSL#16 \n"
 525 "    LDRB    R3, [R4, #0x1C7] \n"
 526 "    LDRB    R2, [R4, #0x1BE] \n"
 527 //"  LDRB    LR, [R4, #0x1FF] \n"
 528 "    ORR     R1, R1, R3, LSL#8 \n"
 529 "    LDRB    R3, [R4, #0x1C6] \n"
 530 "    CMP     R2, #0 \n"
 531 "    CMPNE   R2, #0x80 \n"
 532 "    ORR     R1, R1, R3 \n"
 533 "    LDRB    R3, [R4, #0x1CD] \n"
 534 "    MOV     R3, R3, LSL#24 \n"
 535 "    ORR     R3, R3, R12, LSL#16 \n"
 536 "    LDRB    R12, [R4, #0x1CB] \n"
 537 "    ORR     R3, R3, R12, LSL#8 \n"
 538 "    LDRB    R12, [R4, #0x1CA] \n"
 539 "    ORR     R3, R3, R12 \n"
 540 //"  LDRB    R12, [R4, #0x1FE] \n"  // Replaced, see below
 541 //mod start
 542 "    LDRB    R12, [LR,#0x1FE]\n"           // New! First MBR signature byte (0x55)
 543 "    LDRB    LR, [LR,#0x1FF]\n"            //      Last MBR signature byte (0xAA)
 544 //mod end
 545 "    MOV     R4, #0 \n"
 546 "    BNE     loc_FF852150 \n"
 547 "    CMP     R0, R1 \n"
 548 "    BCC     loc_FF852150 \n"
 549 "    ADD     R2, R1, R3 \n"
 550 "    CMP     R2, R0 \n"
 551 "    CMPLS   R12, #0x55 \n"
 552 "    CMPEQ   LR, #0xAA \n"
 553 "    MOVEQ   R6, R1 \n"
 554 "    MOVEQ   R5, R3 \n"
 555 "    MOVEQ   R4, #1 \n"
 556 
 557 "loc_FF852150:\n"
 558 "    MOV     R0, #3 \n"
 559 "    BL      sub_FF86C610 \n"
 560 "    CMP     R4, #0 \n"
 561 "    BNE     loc_FF852188 \n"
 562 "    MOV     R6, #0 \n"
 563 "    MOV     R0, R8 \n"
 564 "    BL      sub_FF9290BC \n"
 565 "    MOV     R5, R0 \n"
 566 "    B       loc_FF852188 \n"
 567 
 568 "loc_FF852174:\n"
 569 "    MOV     R5, #0x40 \n"
 570 "    B       loc_FF852188 \n"
 571 
 572 "loc_FF85217C:\n"
 573 "    LDR     R1, =0x365 \n"
 574 "    LDR     R0, =0xFF852024 /*'Mounter.c'*/ \n"
 575 "    BL      _DebugAssert \n"
 576 
 577 "loc_FF852188:\n"
 578 "    STR     R6, [R7, #0x44]! \n"
 579 "    MOV     R0, #1 \n"
 580 "    STR     R5, [R7, #4] \n"
 581 "    LDMFD   SP!, {R4-R8,PC} \n"
 582 );
 583 }
 584 
 585 /*************************************************************/
 586 //** JogDial_task_my @ 0xFF849530 - 0xFF849628, length=63
 587 void __attribute__((naked,noinline)) JogDial_task_my() {
 588 asm volatile (
 589 "    STMFD   SP!, {R3-R11,LR} \n"
 590 "    BL      sub_FF849700 \n"
 591 "    LDR     R11, =0x80000B01 \n"
 592 "    LDR     R8, =0xFFAC63E8 \n"
 593 "    LDR     R7, =0xC0240000 \n"
 594 "    LDR     R6, =0x263C \n"
 595 "    MOV     R9, #1 \n"
 596 "    MOV     R10, #0 \n"
 597 
 598 "loc_FF849550:\n"
 599 "    LDR     R3, =0x191 \n"
 600 "    LDR     R0, [R6, #0xC] \n"
 601 "    LDR     R2, =0xFF8497B8 /*'JogDial.c'*/ \n"
 602 "    MOV     R1, #0 \n"
 603 "    BL      sub_FF81BEB0 /*_TakeSemaphoreStrictly*/ \n"
 604 "    MOV     R0, #0x28 \n"
 605 "    BL      _SleepTask \n"
 606 //------------------  added code ---------------------
 607 "sleep_loop:\n"
 608 "    LDR     R0, =jogdial_stopped\n"
 609 "    LDR     R0, [R0]\n"
 610 "    CMP     R0, #1\n"
 611 "    BNE     sleep_done\n"
 612 "    MOV     R0, #40\n"
 613 "    BL      _SleepTask\n"
 614 "    B       sleep_loop\n"
 615 "sleep_done:\n"
 616 //------------------  original code ------------------
 617 "    LDR     R0, [R7, #0x304] \n"
 618 "    MOV     R0, R0, ASR#16 \n"
 619 "    STRH    R0, [R6] \n"
 620 "    LDRSH   R2, [R6, #2] \n"
 621 "    SUB     R1, R0, R2 \n"
 622 "    CMP     R1, #0 \n"
 623 "    BEQ     loc_FF849614 \n"
 624 "    MOV     R5, R1 \n"
 625 "    RSBLT   R5, R5, #0 \n"
 626 "    MOVLE   R4, #0 \n"
 627 "    MOVGT   R4, #1 \n"
 628 "    CMP     R5, #0xFF \n"
 629 "    BLS     loc_FF8495C8 \n"
 630 "    CMP     R1, #0 \n"
 631 "    RSBLE   R1, R2, #0xFF \n"
 632 "    ADDLE   R1, R1, #0x7F00 \n"
 633 "    ADDLE   R0, R1, R0 \n"
 634 "    RSBGT   R0, R0, #0xFF \n"
 635 "    ADDGT   R0, R0, #0x7F00 \n"
 636 "    ADDGT   R0, R0, R2 \n"
 637 "    ADD     R5, R0, #0x8000 \n"
 638 "    ADD     R5, R5, #1 \n"
 639 "    EOR     R4, R4, #1 \n"
 640 
 641 "loc_FF8495C8:\n"
 642 "    LDR     R0, [R6, #0x14] \n"
 643 "    CMP     R0, #0 \n"
 644 "    BEQ     loc_FF84960C \n"
 645 "    LDR     R0, [R6, #0x1C] \n"
 646 "    CMP     R0, #0 \n"
 647 "    BEQ     loc_FF8495F4 \n"
 648 "    LDR     R1, [R8, R4, LSL#2] \n"
 649 "    CMP     R1, R0 \n"
 650 "    BEQ     loc_FF8495FC \n"
 651 "    LDR     R0, =0xB01 \n"
 652 "    BL      sub_FF872EB0 \n"
 653 
 654 "loc_FF8495F4:\n"
 655 "    MOV     R0, R11 \n"
 656 "    BL      sub_FF872EB0 \n"
 657 
 658 "loc_FF8495FC:\n"
 659 "    LDR     R0, [R8, R4, LSL#2] \n"
 660 "    MOV     R1, R5 \n"
 661 "    STR     R0, [R6, #0x1C] \n"
 662 "    BL      sub_FF872E0C \n"
 663 
 664 "loc_FF84960C:\n"
 665 "    LDRH    R0, [R6] \n"
 666 "    STRH    R0, [R6, #2] \n"
 667 
 668 "loc_FF849614:\n"
 669 "    STR     R10, [R7, #0x300] \n"
 670 "    STR     R9, [R7, #0x308] \n"
 671 "    LDR     R0, [R6, #0x10] \n"
 672 "    CMP     R0, #0 \n"
 673 "    BLNE    _SleepTask \n"
 674 "    B       loc_FF849550 \n"
 675 );
 676 }

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