root/platform/ixus65_sd630/sub/100a/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. boot
  2. h_usrInit
  3. h_usrKernelInit
  4. h_usrRoot

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 //#include "stdlib.h"
   5 
   6 const char * const new_sa = &_end;
   7 
   8 /* Ours stuff */
   9 extern long wrs_kernel_bss_start;
  10 extern long wrs_kernel_bss_end;
  11 extern void createHook (void *pNewTcb);
  12 extern void deleteHook (void *pTcb);
  13 
  14 
  15 void boot();
  16 
  17 /* "relocated" functions */
  18 void __attribute__((naked,noinline)) h_usrInit();
  19 void __attribute__((naked,noinline)) h_usrKernelInit();
  20 void __attribute__((naked,noinline)) h_usrRoot();
  21 
  22 
  23 
  24 void boot()
  25 {
  26     // offset of "start of data" string in primary.bin - 4
  27     // All the asm code below is from: 0xFF8100F8
  28 
  29     long *canon_data_src = (void*)0xFFB29580;
  30     long *canon_data_dst = (void*)0x1900;
  31     // up to the end of flash
  32     long canon_data_len = 0xBDE0;
  33     // just after ROM data
  34     long *canon_bss_start = (void*)(0x1900+0xBDE0);
  35     // BSS end offset (from FF810134 disasm) minus BSS start
  36     long canon_bss_len = 0x9C6B0 - (long)canon_bss_start;
  37     long i;
  38 
  39     asm volatile (
  40         "MRC     p15, 0, R0,c1,c0\n"
  41         "ORR     R0, R0, #0x1000\n"
  42         "ORR     R0, R0, #4\n"
  43         "ORR     R0, R0, #1\n"
  44         "MCR     p15, 0, R0,c1,c0\n"
  45     :::"r0");
  46 /*
  47         int * data = (int*)0x170000;
  48         for (i = 0; i < 30*1024*1024/4; i++) {
  49           data[i] = 0xCAFEDEAD;
  50         }
  51 */
  52 
  53     for(i=0;i<canon_data_len/4;i++)
  54         canon_data_dst[i]=canon_data_src[i];
  55 
  56     for(i=0;i<canon_bss_len/4;i++)
  57         canon_bss_start[i]=0;
  58 
  59 
  60     asm volatile (
  61         "MRC     p15, 0, R0,c1,c0\n"
  62         "ORR     R0, R0, #0x1000\n"
  63         "BIC     R0, R0, #4\n"
  64         "ORR     R0, R0, #1\n"
  65         "MCR     p15, 0, R0,c1,c0\n"
  66     :::"r0");
  67     h_usrInit();
  68 }
  69 
  70 
  71 void h_usrInit()
  72 {
  73     asm volatile (
  74         "STR     LR, [SP,#-4]!\n"
  75         "BL      sub_FF81196C\n"
  76         "MOV     R0, #2\n"
  77         "MOV     R1, R0\n"
  78         "BL      sub_FFB0EED8\n"
  79         "BL      sub_FFB01B4C\n"
  80         "BL      sub_FF8111C4\n"
  81         "BL      sub_FF81172C\n"
  82         "LDR     LR, [SP],#4\n"
  83         "B       h_usrKernelInit\n"
  84     );
  85 }
  86 
  87 void  h_usrKernelInit()
  88 {
  89     asm volatile (
  90         "STMFD   SP!, {R4,LR}\n"
  91         "SUB     SP, SP, #8\n"
  92         "BL      sub_FFB0F3D8\n"
  93         "BL      sub_FFB22BE0\n"
  94         "LDR     R3, =0xC6F0\n"
  95         "LDR     R2, =0x99340\n"
  96         "LDR     R1, [R3]\n"
  97         "LDR     R0, =0x9C070\n"
  98         "MOV     R3, #0x100\n"
  99         "BL      sub_FFB1BCF0\n"
 100         "LDR     R3, =0xC6B0\n"
 101         "LDR     R0, =0xCEF8\n"
 102         "LDR     R1, [R3]\n"
 103         "BL      sub_FFB1BCF0\n"
 104         "LDR     R3, =0xC76C\n"
 105         "LDR     R0, =0x9C044\n"
 106         "LDR     R1, [R3]\n"
 107         "BL      sub_FFB1BCF0\n"
 108         "BL      sub_FFB27760\n"
 109         "BL      sub_FF8112B0\n"
 110         "MOV     R4, #0\n"
 111         "MOV     R3, R0\n"
 112         "MOV     R12, #0x800\n"
 113         "LDR     R0, =h_usrRoot\n"  // !!!
 114         "MOV     R1, #0x4000\n"
 115     );    
 116 //      "LDR     R2, =0xCC6B0\n"        // !!! 0x9C6B0 + 0x30000    MEMISOSIZE!!!
 117 //      "LDR     R2, =0x18A6B0\n"   // !!! Increased size !!! 0x9C6B0+0x1ae000= 0x24A6B0-0x18A6B0=786432
 118     asm volatile (
 119         "LDR     R2, =new_sa\n"
 120         "LDR     R2, [R2]\n"
 121     );
 122     asm volatile (
 123         "STR     R12, [SP]\n"                    
 124         "STR     R4, [SP,#4]\n"
 125         "BL      sub_FFB1FE20\n"
 126         "ADD     SP, SP, #8\n"
 127         "LDMFD   SP!, {R4,PC}\n"
 128     );
 129 }
 130 
 131 
 132 void  h_usrRoot()
 133 {
 134     asm volatile
 135     (
 136         "STMFD   SP!, {R4,R5,LR}\n"
 137         "MOV     R5, R0\n"
 138         "MOV     R4, R1\n"
 139         "BL      sub_FF8119D4\n"
 140         "MOV     R1, R4\n"
 141         "MOV     R0, R5\n"
 142         "BL      sub_FFB1406C\n"
 143         "MOV     R1, R4\n"
 144         "MOV     R0, R5\n"
 145         "BL      sub_FFB14AE4\n"
 146         "BL      sub_FF811708\n"
 147         "MOV     R0, #0x32\n"
 148         "BL      sub_FFB16A88\n"  // selectInit
 149     );
 150 
 151     asm volatile
 152     (   
 153         "BL      sub_FF811A14\n" //ios_tty_Init
 154         "BL      sub_FF8119F8\n"
 155         "BL      sub_FF811A40\n"
 156         "BL      sub_FFB16348\n"
 157         "BL      sub_FF8119C8\n"
 158     );
 159 
 160     _taskCreateHookAdd(createHook);
 161     _taskDeleteHookAdd(deleteHook);
 162 
 163     drv_self_hide();
 164 
 165     asm volatile (
 166         "LDMFD   SP!, {R4,R5,LR}\n"
 167         "B       sub_FF811370\n"
 168     );
 169 }
 170 

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