This source file includes following definitions.
- change_video_tables
- set_quality
- movie_record_task
- sub_FF96BA00_my
1 #include "conf.h"
2
3
4
5
6 void change_video_tables(__attribute__ ((unused))int a, __attribute__ ((unused))int b) {
7
8
9 }
10
11
12 void set_quality(int *x) {
13 if (conf.video_mode) *x=12-((conf.video_quality-1)*(12+17)/(99-1));
14 }
15
16
17 void __attribute__((naked,noinline)) movie_record_task() {
18 asm volatile (
19 "STMFD SP!, {R2-R8,LR}\n"
20 "LDR R8, =0x4B2\n"
21 "LDR R7, =0x2710\n"
22 "LDR R4, =0x69D8\n"
23 "MOV R6, #0\n"
24 "MOV R5, #1\n"
25 "loc_FF96BD48:\n"
26 "LDR R0, [R4,#0x1C]\n"
27 "MOV R2, #0\n"
28 "ADD R1, SP, #4\n"
29 "BL sub_FF83994C\n"
30 "LDR R0, [R4,#0x24]\n"
31 "CMP R0, #0\n"
32 "BNE loc_FF96BE24\n"
33 "LDR R0, [SP,#4]\n"
34 "LDR R1, [R0]\n"
35 "SUB R1, R1, #2\n"
36 "CMP R1, #9\n"
37 "ADDLS PC, PC, R1,LSL#2\n"
38 "B loc_FF96BE24\n"
39 "loc_FF96BD7C:\n"
40 "B loc_FF96BDD4\n"
41 "loc_FF96BD80:\n"
42 "B loc_FF96BDF8\n"
43 "loc_FF96BD84:\n"
44 "B loc_FF96BE08\n"
45 "loc_FF96BD88:\n"
46 "B loc_FF96BE10\n"
47 "loc_FF96BD8C:\n"
48 "B loc_FF96BDDC\n"
49 "loc_FF96BD90:\n"
50 "B loc_FF96BE18\n"
51 "loc_FF96BD94:\n"
52 "B loc_FF96BDE8\n"
53 "loc_FF96BD98:\n"
54 "B loc_FF96BE24\n"
55 "loc_FF96BD9C:\n"
56 "B loc_FF96BE20\n"
57 "loc_FF96BDA0:\n"
58 "B loc_FF96BDA4\n"
59 "loc_FF96BDA4:\n"
60 "LDR R0, =0xFF96B414\n"
61 "STR R6, [R4,#0x38]\n"
62 "STR R0, [R4,#0xA8]\n"
63
64
65 "LDR R0, =sub_FF96BA00_my\n"
66 "STR R0, [R4,#0xAC]\n"
67 "LDR R0, =0xFF96AD2C\n"
68 "LDR R2, =0xFF96AC48\n"
69 "LDR R1, =0x983CC\n"
70 "STR R6, [R4,#0x28]\n"
71 "BL sub_FF8511CC\n"
72 "STR R5, [R4,#0x3C]\n"
73 "B loc_FF96BE24\n"
74 "loc_FF96BDD4:\n"
75
76 "BL sub_FF96B83C\n"
77 "B loc_FF96BE24\n"
78 "loc_FF96BDDC:\n"
79 "LDR R1, [R4,#0xAC]\n"
80 "BLX R1\n"
81 "B loc_FF96BE24\n"
82 "loc_FF96BDE8:\n"
83 "LDR R1, [R0,#0x18]\n"
84 "LDR R0, [R0,#4]\n"
85 "BL sub_FFAB0524\n"
86 "B loc_FF96BE24\n"
87 "loc_FF96BDF8:\n"
88 "LDR R0, [R4,#0x3C]\n"
89 "CMP R0, #5\n"
90 "STRNE R5, [R4,#0x2C]\n"
91 "B loc_FF96BE24\n"
92 "loc_FF96BE08:\n"
93 "BL sub_FF96B0EC\n"
94 "B loc_FF96BE24\n"
95 "loc_FF96BE10:\n"
96 "BL sub_FF96AD78\n"
97 "B loc_FF96BE24\n"
98 "loc_FF96BE18:\n"
99 "BL sub_FF96ABD4\n"
100 "B loc_FF96BE24\n"
101 "loc_FF96BE20:\n"
102 "BL sub_FF96BF8C\n"
103 "loc_FF96BE24:\n"
104 "LDR R1, [SP,#4]\n"
105 "LDR R3, =0xFF96AA5C\n"
106 "STR R6, [R1]\n"
107 "STR R8, [SP]\n"
108 "LDR R0, [R4,#0x20]\n"
109 "MOV R2, R7\n"
110 "BL sub_FF83A2A0\n"
111 "B loc_FF96BD48\n"
112 );
113 }
114
115 void __attribute__((naked,noinline)) sub_FF96BA00_my() {
116 asm volatile (
117 "STMFD SP!, {R4-R8,LR}\n"
118 "SUB SP, SP, #0x40\n"
119 "MOV R7, #0\n"
120 "LDR R6, =0x69D8\n"
121 "MOV R4, R0\n"
122 "STR R7, [SP,#0x30]\n"
123 "STR R7, [SP,#0x28]\n"
124 "LDR R0, [R6,#0x3C]\n"
125 "CMP R0, #3\n"
126 "MOVEQ R0, #4\n"
127 "STREQ R0, [R6,#0x3C]\n"
128 "LDR R0, [R6,#0xA8]\n"
129 "BLX R0\n"
130 "LDR R0, [R6,#0x3C]\n"
131 "CMP R0, #4\n"
132 "BNE loc_FF96BB20\n"
133 "ADD R3, SP, #0x28\n"
134 "ADD R2, SP, #0x2C\n"
135 "ADD R1, SP, #0x30\n"
136 "ADD R0, SP, #0x34\n"
137 "BL sub_FFAB0628\n"
138 "CMP R0, #0\n"
139 "MOV R5, #1\n"
140 "BNE loc_FF96BA7C\n"
141 "LDR R1, [R6,#0x2C]\n"
142 "CMP R1, #1\n"
143 "BNE loc_FF96BB28\n"
144 "LDR R1, [R6,#0x60]\n"
145 "LDR R2, [R6,#0x40]\n"
146 "CMP R1, R2\n"
147 "BCC loc_FF96BB28\n"
148 "loc_FF96BA7C:\n"
149 "BL sub_FF96B4E8\n"
150 "BL sub_FF96C06C\n"
151 "LDR R0, [R4,#0x1C]\n"
152 "ADD R4, SP, #0x18\n"
153 "ADD R3, SP, #0x38\n"
154 "MVN R2, #1\n"
155 "MOV R1, #0\n"
156 "STMIA R4, {R0-R3}\n"
157 "ADD R1, SP, #0x3C\n"
158 "ADD R4, SP, #8\n"
159 "MOV R0, #0\n"
160 "LDRD R2, [R6,#0x78]\n"
161 "STMIA R4, {R0-R3}\n"
162 "MOV R3, #0\n"
163 "MOV R2, #0x40\n"
164 "STRD R2, [SP]\n"
165 "LDR R3, =0x98418\n"
166 "MOV R2, #0\n"
167 "MOV R1, #0\n"
168 "BL sub_FFA6746C\n"
169 "LDR R0, [R6,#0x14]\n"
170 "LDR R1, [R6,#0x58]\n"
171 "BL sub_FF839D68\n"
172 "CMP R0, #9\n"
173 "BNE loc_FF96BAF0\n"
174 "loc_FF96BAE0:\n"
175 "BL sub_FFAB0E48\n"
176 "MOV R0, #1\n"
177 "STR R5, [R6,#0x3C]\n"
178 "B loc_FF96BC48\n"
179 "loc_FF96BAF0:\n"
180 "LDR R0, [SP,#0x38]\n"
181 "CMP R0, #0\n"
182 "BEQ loc_FF96BB0C\n"
183 "loc_FF96BAFC:\n"
184 "BL sub_FFAB0E48\n"
185 "MOV R0, #1\n"
186 "STR R5, [R6,#0x3C]\n"
187 "B loc_FF96BC78\n"
188 "loc_FF96BB0C:\n"
189 "MOV R0, #1\n"
190 "BL sub_FFA67510\n"
191 "BL sub_FFA6756C\n"
192 "MOV R0, #5\n"
193 "STR R0, [R6,#0x3C]\n"
194 "loc_FF96BB20:\n"
195 "ADD SP, SP, #0x40\n"
196 "LDMFD SP!, {R4-R8,PC}\n"
197 "loc_FF96BB28:\n"
198 "LDR R12, [SP,#0x30]\n"
199 "CMP R12, #0\n"
200 "BEQ loc_FF96BCD8\n"
201 "STR R5, [R6,#0x30]\n"
202 "LDR R0, [R6,#0x60]\n"
203 "LDR R8, [R4,#0xC]\n"
204 "CMP R0, #0\n"
205 "LDRNE LR, [SP,#0x34]\n"
206 "BNE loc_FF96BBD0\n"
207 "LDR R0, [R4,#0x1C]\n"
208 "LDR R1, [R4,#0x20]\n"
209 "ADD R3, SP, #0x38\n"
210 "MVN R2, #0\n"
211 "ADD LR, SP, #0x18\n"
212 "STMIA LR, {R0-R3}\n"
213 "LDRD R2, [R6,#0x78]\n"
214 "LDR R0, [SP,#0x28]\n"
215 "ADD R1, SP, #0x3C\n"
216 "ADD LR, SP, #8\n"
217 "STMIA LR, {R0-R3}\n"
218 "LDR R3, [SP,#0x2C]\n"
219 "STR R12, [SP]\n"
220 "STR R3, [SP,#4]\n"
221 "LDMIB R4, {R0,R1}\n"
222 "LDR R3, [SP,#0x34]\n"
223 "MOV R2, R8\n"
224 "BL sub_FFA6746C\n"
225 "LDR R0, [R6,#0x14]\n"
226 "LDR R1, [R6,#0x58]\n"
227 "BL sub_FF839D68\n"
228 "CMP R0, #9\n"
229 "BEQ loc_FF96BAE0\n"
230 "LDR R0, [SP,#0x38]\n"
231 "CMP R0, #0\n"
232 "BNE loc_FF96BAFC\n"
233 "MOV R0, #1\n"
234 "BL sub_FFA67510\n"
235 "LDR R0, [SP,#0x3C]\n"
236 "LDR R1, [SP,#0x34]\n"
237 "ADD LR, R1, R0\n"
238 "LDR R1, [SP,#0x30]\n"
239 "SUB R12, R1, R0\n"
240 "loc_FF96BBD0:\n"
241 "LDR R2, [R6,#0x5C]\n"
242 "LDR R0, [R4,#0x1C]\n"
243 "LDR R1, [R4,#0x20]\n"
244 "ADD R3, SP, #0x38\n"
245 "STR R1, [SP,#0x1C]\n"
246 "STR R3, [SP,#0x24]\n"
247 "STR R2, [SP,#0x20]\n"
248 "STR R0, [SP,#0x18]\n"
249 "LDRD R2, [R6,#0x78]\n"
250 "LDR R0, [SP,#0x28]\n"
251 "STR R3, [SP,#0x14]\n"
252 "LDR R3, [SP,#0x2C]\n"
253 "ADD R1, SP, #0x3C\n"
254 "STR R2, [SP,#0x10]\n"
255 "STR R3, [SP,#4]\n"
256 "STR R1, [SP,#0xC]\n"
257 "STR R12, [SP]\n"
258 "STR R0, [SP,#8]\n"
259 "LDMIB R4, {R0,R1}\n"
260 "MOV R3, LR\n"
261 "MOV R2, R8\n"
262 "BL sub_FFA6746C\n"
263 "LDR R0, [R6,#0x14]\n"
264 "LDR R1, [R6,#0x58]\n"
265 "BL sub_FF839D68\n"
266 "CMP R0, #9\n"
267 "BNE loc_FF96BC60\n"
268 "BL sub_FFAB0E48\n"
269 "MOV R0, #0\n"
270 "STR R5, [R6,#0x3C]\n"
271 "loc_FF96BC48:\n"
272 "BL sub_FFA67510\n"
273 "BL sub_FFA6756C\n"
274 "MOV R0, #0xC\n"
275 "BL sub_FF88A11C\n"
276 "MOV R0, #0x90000\n"
277 "B loc_FF96BC8C\n"
278 "loc_FF96BC60:\n"
279 "LDR R0, [SP,#0x38]\n"
280 "CMP R0, #0\n"
281 "BEQ loc_FF96BCA0\n"
282 "BL sub_FFAB0E48\n"
283 "MOV R0, #0\n"
284 "STR R5, [R6,#0x3C]\n"
285 "loc_FF96BC78:\n"
286 "BL sub_FFA67510\n"
287 "BL sub_FFA6756C\n"
288 "MOV R0, #0xC\n"
289 "BL sub_FF88A11C\n"
290 "MOV R0, #0xA0000\n"
291 "loc_FF96BC8C:\n"
292 "BL sub_FF895E1C\n"
293 "LDR R1, [R6,#0x98]!\n"
294 "LDR R0, [R6,#0xC]\n"
295 "BLX R1\n"
296 "B loc_FF96BB20\n"
297 "loc_FF96BCA0:\n"
298 "MOV R0, #0\n"
299 "BL sub_FFA67510\n"
300 "LDR R0, [SP,#0x34]\n"
301 "LDR R1, [SP,#0x3C]\n"
302 "BL sub_FFAB0854\n"
303 "LDR R0, [R6,#0x5C]\n"
304 "LDR R3, =0x6A54\n"
305 "ADD R1, R0, #1\n"
306 "STR R1, [R6,#0x5C]\n"
307 "STR R3, [SP]\n"
308 "LDR R0, [SP,#0x3C]\n"
309 "SUB R3, R3, #4\n"
310 "MOV R2, #0xF\n"
311 "BL sub_FFAAE908\n"
312
313 "LDR R0, =0x6A54-4\n"
314 "BL set_quality\n"
315
316 "loc_FF96BCD8:\n"
317 "LDR R0, [R6,#0x60]\n"
318 "ADD R0, R0, #1\n"
319 "STR R0, [R6,#0x60]\n"
320 "LDR R1, [R6,#0x4C]\n"
321 "MUL R0, R1, R0\n"
322 "LDR R1, [R6,#0x48]\n"
323 "BL sub_FFB5BF88\n"
324 "MOV R4, R0\n"
325 "BL sub_FFAB0E80\n"
326 "LDR R1, [R6,#0x80]\n"
327 "CMP R1, R4\n"
328 "BNE loc_FF96BD14\n"
329 "LDR R0, [R6,#0x34]\n"
330 "CMP R0, #1\n"
331 "BNE loc_FF96BD28\n"
332 "loc_FF96BD14:\n"
333 "LDR R1, [R6,#0x8C]\n"
334 "MOV R0, R4\n"
335 "BLX R1\n"
336 "STR R4, [R6,#0x80]\n"
337 "STR R7, [R6,#0x34]\n"
338 "loc_FF96BD28:\n"
339 "STR R7, [R6,#0x30]\n"
340 "B loc_FF96BB20\n"
341 );
342 }