root/platform/ixus140_elph130/sub/100a/capt_seq.c

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DEFINITIONS

This source file includes following definitions.
  1. capt_seq_task
  2. sub_FF1F9248_my
  3. sub_FF1F916C_my
  4. sub_FF363740_my
  5. sub_FF36341C_my
  6. exp_drv_task
  7. sub_FF119FD0_my
  8. sub_FF108D94_my

   1 /*
   2  * capt_seq.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 
   8 // NOTE auto in P mode doesn't seem to ever enable dark frame, even if you override > 1.3 sec
   9 static long *nrflag = (long*)(0xE4F0+4); // FF3634B8, 4th arg to  sub_FF2A49C4
  10 
  11 #define PAUSE_FOR_FILE_COUNTER 100 // sometimes the file counter isn't updated when hook starts
  12 
  13 #include "../../../generic/capt_seq.c"
  14 
  15 /*************************************************************/
  16 //** capt_seq_task @ 0xFF0B06BC - 0xFF0B0950, length=166
  17 void __attribute__((naked,noinline)) capt_seq_task() {
  18 asm volatile (
  19 "    STMFD   SP!, {R3-R7,LR} \n"
  20 "    LDR     R5, =0x9EA24 \n"
  21 "    LDR     R7, =0x38E0 \n"
  22 "    MOV     R6, #0 \n"
  23 
  24 "loc_FF0B06CC:\n"
  25 "    LDR     R0, [R7, #4] \n"
  26 "    MOV     R2, #0 \n"
  27 "    MOV     R1, SP \n"
  28 "    BL      sub_00677418 /*_ReceiveMessageQueue*/ \n"
  29 "    TST     R0, #1 \n"
  30 "    BEQ     loc_FF0B06F8 \n"
  31 "    LDR     R1, =0x475 \n"
  32 "    LDR     R0, =0xFF0B0194 /*'SsShootTask.c'*/ \n"
  33 "    BL      _DebugAssert \n"
  34 "    BL      _ExitTask \n"
  35 "    LDMFD   SP!, {R3-R7,PC} \n"
  36 
  37 "loc_FF0B06F8:\n"
  38 "    LDR     R0, [SP] \n"
  39 "    LDR     R1, [R0] \n"
  40 "    CMP     R1, #0x22 \n"
  41 "    ADDCC   PC, PC, R1, LSL#2 \n"
  42 "    B       loc_FF0B0918 \n"
  43 "    B       loc_FF0B0794 \n"
  44 "    B       loc_FF0B07AC \n"
  45 "    B       loc_FF0B07B8 \n"
  46 "    B       loc_FF0B07CC \n"
  47 "    B       loc_FF0B07C4 \n"
  48 "    B       loc_FF0B07D8 \n"
  49 "    B       loc_FF0B07E0 \n"
  50 "    B       loc_FF0B07E8 \n"
  51 "    B       loc_FF0B07F4 \n"
  52 "    B       loc_FF0B0820 \n"
  53 "    B       loc_FF0B0800 \n"
  54 "    B       loc_FF0B080C \n"
  55 "    B       loc_FF0B0814 \n"
  56 "    B       loc_FF0B0828 \n"
  57 "    B       loc_FF0B0830 \n"
  58 "    B       loc_FF0B0838 \n"
  59 "    B       loc_FF0B0840 \n"
  60 "    B       loc_FF0B0848 \n"
  61 "    B       loc_FF0B0854 \n"
  62 "    B       loc_FF0B085C \n"
  63 "    B       loc_FF0B0864 \n"
  64 "    B       loc_FF0B086C \n"
  65 "    B       loc_FF0B0874 \n"
  66 "    B       loc_FF0B087C \n"
  67 "    B       loc_FF0B0884 \n"
  68 "    B       loc_FF0B088C \n"
  69 "    B       loc_FF0B0894 \n"
  70 "    B       loc_FF0B089C \n"
  71 "    B       loc_FF0B08A8 \n"
  72 "    B       loc_FF0B08B0 \n"
  73 "    B       loc_FF0B08BC \n"
  74 "    B       loc_FF0B08F8 \n"
  75 "    B       loc_FF0B0904 \n"
  76 "    B       loc_FF0B0924 \n"
  77 
  78 "loc_FF0B0794:\n"
  79 //"    BL      shooting_expo_iso_override\n"      // extra ISO override call doesn't appear to be needed on elph130
  80 "    BL      sub_FF0B0EB4 \n"
  81 "    BL      shooting_expo_param_override\n"    // added
  82 "    BL      sub_FF0AE238 \n"
  83 // try avoid intermittetant override failues on quick press, not needed?
  84 //"    MOV     R0, #0\n"                          // added
  85 //"    STR     R0, [R5,#0x28]\n"                  // added
  86 "    LDR     R0, [R5, #0x28] \n"
  87 "    CMP     R0, #0 \n"
  88 "    BLNE    sub_FF1F9248_my \n"  // --> Patched. Old value = 0xFF1F9248.
  89 "    B       loc_FF0B0924 \n"
  90 
  91 "loc_FF0B07AC:\n"
  92 "    LDR     R0, [R0, #0x10] \n"
  93 "    BL      sub_FF1F916C_my \n"  // --> Patched. Old value = 0xFF1F916C.
  94 "    B       loc_FF0B0924 \n"
  95 
  96 "loc_FF0B07B8:\n"
  97 "    MOV     R0, #1 \n"
  98 "    BL      sub_FF0B11C8 \n"
  99 "    B       loc_FF0B0924 \n"
 100 
 101 "loc_FF0B07C4:\n"
 102 "    BL      sub_FF0B0AF0 \n"
 103 "    B       loc_FF0B07D0 \n"
 104 
 105 "loc_FF0B07CC:\n"
 106 "    BL      sub_FF0B0E90 \n"
 107 
 108 "loc_FF0B07D0:\n"
 109 "    STR     R6, [R5, #0x28] \n"
 110 "    B       loc_FF0B0924 \n"
 111 
 112 "loc_FF0B07D8:\n"
 113 "    BL      sub_FF0B0E98 \n"
 114 "    B       loc_FF0B0924 \n"
 115 
 116 "loc_FF0B07E0:\n"
 117 "    BL      sub_FF0B109C \n"
 118 "    B       loc_FF0B07F8 \n"
 119 
 120 "loc_FF0B07E8:\n"
 121 "    LDR     R0, [R0, #0x10] \n"
 122 "    BL      sub_FF1F92D8 \n"
 123 "    B       loc_FF0B0924 \n"
 124 
 125 "loc_FF0B07F4:\n"
 126 "    BL      sub_FF0B1120 \n"
 127 
 128 "loc_FF0B07F8:\n"
 129 "    BL      sub_FF0AE238 \n"
 130 "    B       loc_FF0B0924 \n"
 131 
 132 "loc_FF0B0800:\n"
 133 "    LDR     R0, [R5, #0x58] \n"
 134 "    BL      sub_FF0B1780 \n"
 135 "    B       loc_FF0B0924 \n"
 136 
 137 "loc_FF0B080C:\n"
 138 "    BL      sub_FF0B1BAC \n"
 139 "    B       loc_FF0B0924 \n"
 140 
 141 "loc_FF0B0814:\n"
 142 "    MOV     R0, #0 \n"
 143 "    BL      sub_FF0B1C10 \n"
 144 "    B       loc_FF0B0924 \n"
 145 
 146 "loc_FF0B0820:\n"
 147 "    BL      sub_FF0B0E90 \n"
 148 "    B       loc_FF0B0924 \n"
 149 
 150 "loc_FF0B0828:\n"
 151 "    BL      sub_FF1F8640 \n"
 152 "    B       loc_FF0B0924 \n"
 153 
 154 "loc_FF0B0830:\n"
 155 "    BL      sub_FF1F8878 \n"
 156 "    B       loc_FF0B0924 \n"
 157 
 158 "loc_FF0B0838:\n"
 159 "    BL      sub_FF1F8934 \n"
 160 "    B       loc_FF0B0924 \n"
 161 
 162 "loc_FF0B0840:\n"
 163 "    BL      sub_FF1F8A08 \n"
 164 "    B       loc_FF0B0924 \n"
 165 
 166 "loc_FF0B0848:\n"
 167 "    MOV     R0, #0 \n"
 168 "    BL      sub_FF1F8CC0 \n"
 169 "    B       loc_FF0B0924 \n"
 170 
 171 "loc_FF0B0854:\n"
 172 "    BL      sub_FF1F8E24 \n"
 173 "    B       loc_FF0B0924 \n"
 174 
 175 "loc_FF0B085C:\n"
 176 "    BL      sub_FF1F8EB8 \n"
 177 "    B       loc_FF0B0924 \n"
 178 
 179 "loc_FF0B0864:\n"
 180 "    BL      sub_FF1F8F60 \n"
 181 "    B       loc_FF0B0924 \n"
 182 
 183 "loc_FF0B086C:\n"
 184 "    BL      sub_FF0B136C \n"
 185 "    B       loc_FF0B0924 \n"
 186 
 187 "loc_FF0B0874:\n"
 188 "    BL      sub_FF0B1400 \n"
 189 "    B       loc_FF0B0924 \n"
 190 
 191 "loc_FF0B087C:\n"
 192 "    BL      sub_FF1F8AD8 \n"
 193 "    B       loc_FF0B0924 \n"
 194 
 195 "loc_FF0B0884:\n"
 196 "    BL      sub_FF1F8B40 \n"
 197 "    B       loc_FF0B0924 \n"
 198 
 199 "loc_FF0B088C:\n"
 200 "    BL      sub_FF0B4068 \n"
 201 "    B       loc_FF0B0924 \n"
 202 
 203 "loc_FF0B0894:\n"
 204 "    BL      sub_FF0B4160 \n"
 205 "    B       loc_FF0B0924 \n"
 206 
 207 "loc_FF0B089C:\n"
 208 "    LDR     R0, [R0, #0xC] \n"
 209 "    BL      sub_FF1F9070 \n"
 210 "    B       loc_FF0B0924 \n"
 211 
 212 "loc_FF0B08A8:\n"
 213 "    BL      sub_FF1F90E0 \n"
 214 "    B       loc_FF0B0924 \n"
 215 
 216 "loc_FF0B08B0:\n"
 217 "    BL      sub_FF0B42EC \n"
 218 "    BL      sub_FF0B41B8 \n"
 219 "    B       loc_FF0B0924 \n"
 220 
 221 "loc_FF0B08BC:\n"
 222 "    MOV     R0, #1 \n"
 223 "    BL      sub_FF1F9A48 \n"
 224 "    MOV     R0, #1 \n"
 225 "    BL      sub_FF1F9B7C \n"
 226 "    LDR     R0, =0x9EB24 \n"
 227 "    LDRH    R0, [R0, #0x8C] \n"
 228 "    CMP     R0, #4 \n"
 229 "    LDRNEH  R0, [R5] \n"
 230 "    SUBNE   R1, R0, #0x8000 \n"
 231 "    SUBNES  R1, R1, #0x230 \n"
 232 "    BNE     loc_FF0B0924 \n"
 233 "    BL      sub_FF0B4160 \n"
 234 "    BL      sub_FF0B4798 \n"
 235 "    BL      sub_FF0B45FC \n"
 236 "    B       loc_FF0B0924 \n"
 237 
 238 "loc_FF0B08F8:\n"
 239 "    MOV     R2, #0 \n"
 240 "    MOV     R1, #0xD \n"
 241 "    B       loc_FF0B090C \n"
 242 
 243 "loc_FF0B0904:\n"
 244 "    MOV     R2, #0 \n"
 245 "    MOV     R1, #0xC \n"
 246 
 247 "loc_FF0B090C:\n"
 248 "    MOV     R0, #0 \n"
 249 "    BL      sub_FF0AEB38 \n"
 250 "    B       loc_FF0B0924 \n"
 251 
 252 "loc_FF0B0918:\n"
 253 "    LDR     R1, =0x5DA \n"
 254 "    LDR     R0, =0xFF0B0194 /*'SsShootTask.c'*/ \n"
 255 "    BL      _DebugAssert \n"
 256 
 257 "loc_FF0B0924:\n"
 258 "    LDR     R0, [SP] \n"
 259 "    LDR     R1, [R0, #4] \n"
 260 "    LDR     R0, [R7] \n"
 261 "    BL      sub_0067F164 /*_SetEventFlag*/ \n"
 262 "    LDR     R4, [SP] \n"
 263 "    LDR     R0, [R4, #8] \n"
 264 "    CMP     R0, #0 \n"
 265 "    LDREQ   R1, =0x116 \n"
 266 "    LDREQ   R0, =0xFF0B0194 /*'SsShootTask.c'*/ \n"
 267 "    BLEQ    _DebugAssert \n"
 268 "    STR     R6, [R4, #8] \n"
 269 "    B       loc_FF0B06CC \n"
 270 );
 271 }
 272 
 273 /*************************************************************/
 274 //** sub_FF1F9248_my @ 0xFF1F9248 - 0xFF1F92D4, length=36
 275 void __attribute__((naked,noinline)) sub_FF1F9248_my() {
 276 asm volatile (
 277 "    STMFD   SP!, {R4-R6,LR} \n"
 278 "    BL      sub_FF0AFDA8 \n"
 279 "    MOV     R4, R0 \n"
 280 "    MOV     R0, #0xC \n"
 281 "    BL      sub_FF0B5F14 \n"
 282 "    LDR     R6, =0x80CC \n"
 283 "    TST     R0, #1 \n"
 284 "    MOV     R5, #1 \n"
 285 "    BNE     loc_FF1F92D0 \n"
 286 "    BL      sub_FF0B0EA0 \n"
 287 "    BL      sub_FF0B1F38 \n"
 288 "    MOV     R1, R4 \n"
 289 "    BL      sub_FF0B1F90 \n"
 290 "    LDR     R0, =0x10E \n"
 291 "    MOV     R2, #4 \n"
 292 "    ADD     R1, R4, #0x30 \n"
 293 "    BL      _SetPropertyCase \n"
 294 "    MOV     R2, #4 \n"
 295 "    ADD     R1, R4, #0x34 \n"
 296 "    MOV     R0, #0x2C \n"
 297 "    BL      _SetPropertyCase \n"
 298 "    MOV     R2, #4 \n"
 299 "    ADD     R1, R4, #8 \n"
 300 "    MOV     R0, #0x3F \n"
 301 "    BL      _SetPropertyCase \n"
 302 "    BL      sub_FF1F9D3C \n"
 303 "    MVN     R1, #0x1000 \n"
 304 "    BL      sub_0067F198 /*_ClearEventFlag*/ \n"
 305 "    MOV     R0, R4 \n"
 306 "    BL      sub_FF36336C \n"
 307 "    MOV     R0, R4 \n"
 308 "    BL      sub_FF363740_my \n"  // --> Patched. Old value = 0xFF363740.
 309 "    TST     R0, #1 \n"
 310 "    LDMEQFD SP!, {R4-R6,PC} \n"
 311 
 312 "loc_FF1F92D0:\n"
 313 "    STR     R5, [R6] \n"
 314 "    LDMFD   SP!, {R4-R6,PC} \n"
 315 );
 316 }
 317 
 318 /*************************************************************/
 319 //** sub_FF1F916C_my @ 0xFF1F916C - 0xFF1F9224, length=47
 320 void __attribute__((naked,noinline)) sub_FF1F916C_my() {
 321 asm volatile (
 322 "    STMFD   SP!, {R4-R6,LR} \n"
 323 "    MOV     R5, R0 \n"
 324 "    LDR     R0, =0x80CC \n"
 325 "    LDR     R6, =0x9EA24 \n"
 326 "    LDR     R0, [R0] \n"
 327 "    MOV     R4, #0 \n"
 328 "    CMP     R0, #0 \n"
 329 "    MOVNE   R4, #0x1D \n"
 330 "    BNE     sub_FF1F9228 \n"
 331 "    LDR     R0, [R6, #0x28] \n"
 332 "    CMP     R0, #0 \n"
 333 "    BNE     sub_FF1F9228 \n"
 334 "    BL      sub_FF0B1F38 \n"
 335 "    MOV     R1, R5 \n"
 336 "    BL      sub_FF0B1F90 \n"
 337 "    LDR     R0, =0x10E \n"
 338 "    MOV     R2, #4 \n"
 339 "    ADD     R1, R5, #0x30 \n"
 340 "    BL      _SetPropertyCase \n"
 341 "    MOV     R2, #4 \n"
 342 "    ADD     R1, R5, #0x34 \n"
 343 "    MOV     R0, #0x2C \n"
 344 "    BL      _SetPropertyCase \n"
 345 "    MOV     R0, #0xC \n"
 346 "    BL      sub_FF0B5F14 \n"
 347 "    TST     R0, #1 \n"
 348 "    BEQ     loc_FF1F91E0 \n"
 349 "    BL      sub_FF0AE9A8 \n"
 350 "    MOV     R4, #1 \n"
 351 
 352 "loc_FF1F91E0:\n"
 353 "    TST     R4, #1 \n"
 354 "    BNE     sub_FF1F9228 \n"
 355 "    BL      sub_FF1F9D3C \n"
 356 "    MVN     R1, #0x1000 \n"
 357 "    BL      sub_0067F198 /*_ClearEventFlag*/ \n"
 358 "    MOV     R0, R5 \n"
 359 "    BL      sub_FF362ABC \n"
 360 "    TST     R0, #1 \n"
 361 "    MOV     R4, R0 \n"
 362 "    BNE     sub_FF1F9228 \n"
 363 "    BL      sub_FF0B0EA0 \n"
 364 "    MOV     R0, R5 \n"
 365 "    BL      sub_FF36336C \n"
 366 "    MOV     R0, #2 \n"
 367 "    BL      sub_FF0B77C4 \n"
 368 "    MOV     R0, R5 \n"
 369 "    BL      sub_FF363740_my \n"  // --> Patched. Old value = 0xFF363740.
 370 "    MOV     R4, R0 \n"
 371 "    BL      capt_seq_hook_raw_here \n"         // added
 372 "    LDR     PC, =0xFF1F9228 \n"  // Continue in firmware
 373 );
 374 }
 375 
 376 /*************************************************************/
 377 //** sub_FF363740_my @ 0xFF363740 - 0xFF3637CC, length=36
 378 void __attribute__((naked,noinline)) sub_FF363740_my() {
 379 asm volatile (
 380 "    STMFD   SP!, {R2-R10,LR} \n"
 381 "    MOV     R4, R0 \n"
 382 "    BL      sub_FF3632D4 \n"
 383 "    BL      sub_FF1F980C \n"
 384 "    LDR     R7, =0x9EA24 \n"
 385 "    LDR     R9, =0x820D \n"
 386 "    LDR     R0, [R7, #0x180] \n"
 387 "    ADD     R6, R7, #0x100 \n"
 388 "    CMP     R0, #2 \n"
 389 "    BNE     loc_FF363788 \n"
 390 "    LDRH    R0, [R7] \n"
 391 "    CMP     R0, R9 \n"
 392 "    LDRNEH  R0, [R6, #0x8A] \n"
 393 "    CMPNE   R0, #3 \n"
 394 "    LDRNE   R0, [R4, #8] \n"
 395 "    CMPNE   R0, #1 \n"
 396 "    MOVLS   R0, #4 \n"
 397 "    BLLS    sub_FF15C34C \n"
 398 
 399 "loc_FF363788:\n"
 400 "    LDR     R0, =0x12F \n"
 401 "    MOV     R2, #4 \n"
 402 "    ADD     R1, SP, #4 \n"
 403 "    BL      _GetPropertyCase \n"
 404 "    TST     R0, #1 \n"
 405 "    MOVNE   R1, #0x170 \n"
 406 "    LDRNE   R0, =0xFF3639F8 /*'SsStandardCaptureSeq.c'*/ \n"
 407 "    BLNE    _DebugAssert \n"
 408 "    LDR     R0, [SP, #4] \n"
 409 "    AND     R0, R0, #0xFF00 \n"
 410 "    CMP     R0, #0x600 \n"
 411 "    LDRNE   R0, =0xFF362FD4 \n"
 412 "    LDREQ   R0, =0xFF363698 \n"
 413 "    MOVNE   R1, R4 \n"
 414 "    MOVEQ   R1, #0 \n"
 415 "    BL      sub_FF1110E0 \n"
 416 "    MOV     R0, R4 \n"
 417 "    BL      sub_FF36341C_my \n"  // --> Patched. Old value = 0xFF36341C.
 418 "    LDR     PC, =0xFF3637D0 \n"  // Continue in firmware
 419 );
 420 }
 421 
 422 /*************************************************************/
 423 //** sub_FF36341C_my @ 0xFF36341C - 0xFF3634C0, length=42
 424 void __attribute__((naked,noinline)) sub_FF36341C_my() {
 425 asm volatile (
 426 "    STMFD   SP!, {R1-R7,LR} \n"
 427 "    LDR     R6, =0x9EBF4 \n"
 428 "    LDR     R5, =0x9EA24 \n"
 429 "    MOV     R4, R0 \n"
 430 "    LDR     R3, [R6] \n"
 431 "    LDRSH   R2, [R6, #0xC] \n"
 432 "    LDRSH   R1, [R6, #0xE] \n"
 433 "    LDR     R0, [R5, #0x88] \n"
 434 "    BL      sub_FF1AE7A0 \n"
 435 "    MOV     R2, #2 \n"
 436 "    ADD     R1, SP, #8 \n"
 437 "    MOV     R0, #0xFA \n"
 438 "    BL      _GetPropertyCase \n"
 439 "    TST     R0, #1 \n"
 440 "    LDRNE   R1, =0x2D9 \n"
 441 "    LDRNE   R0, =0xFF36323C /*'SsCaptureCommon.c'*/ \n"
 442 "    BLNE    _DebugAssert \n"
 443 "    LDRSH   R0, [R6, #0xC] \n"
 444 "    LDRSH   R1, [SP, #8] \n"
 445 "    BL      sub_FF159890 \n"
 446 "    LDR     R0, [R5, #0xE4] \n"
 447 "    CMP     R0, #0 \n"
 448 "    LDRNEH  R0, [R5] \n"
 449 "    LDRNE   R1, =0x820D \n"
 450 "    CMPNE   R0, R1 \n"
 451 "    LDRNE   R0, =0x9EB24 \n"
 452 "    LDRNEH  R0, [R0, #0x8A] \n"
 453 "    CMPNE   R0, #3 \n"
 454 "    LDRNE   R0, [R4, #8] \n"
 455 "    CMPNE   R0, #1 \n"
 456 "    BHI     loc_FF3634C0 \n"
 457 "    BL      _GetCCDTemperature \n"
 458 "    LDR     R3, =0xE4F0 \n"
 459 "    STRH    R0, [R4, #0xA8] \n"
 460 "    SUB     R2, R3, #4 \n"
 461 "    STRD    R2, [SP] \n"
 462 "    MOV     R1, R0 \n"
 463 "    LDRSH   R2, [R6, #0xC] \n"
 464 "    LDRH    R0, [R5, #0x5E] \n"
 465 "    ADD     R3, R3, #4 \n"
 466 "    BL      sub_FF2A49C4 \n"
 467 
 468 "loc_FF3634C0:\n"
 469 "    BL      wait_until_remote_button_is_released\n" // added
 470 "    BL      capt_seq_hook_set_nr\n"                 // added
 471 "    LDRH    R0, [R4, #0xA8] \n"
 472 "    LDR     PC, =0xFF3634C4 \n"  // Continue in firmware
 473 );
 474 }
 475 
 476 /*************************************************************/
 477 //** exp_drv_task @ 0xFF11D558 - 0xFF11DBE8, length=421
 478 void __attribute__((naked,noinline)) exp_drv_task() {
 479 asm volatile (
 480 "    STMFD   SP!, {R4-R9,LR} \n"
 481 "    SUB     SP, SP, #0x2C \n"
 482 "    LDR     R6, =0x4CF8 \n"
 483 "    LDR     R7, =0xBB8 \n"
 484 "    LDR     R4, =0xF2910 \n"
 485 "    MOV     R0, #0 \n"
 486 "    ADD     R5, SP, #0x1C \n"
 487 "    STR     R0, [SP, #0xC] \n"
 488 
 489 "loc_FF11D578:\n"
 490 "    LDR     R0, [R6, #0x20] \n"
 491 "    MOV     R2, #0 \n"
 492 "    ADD     R1, SP, #0x28 \n"
 493 "    BL      sub_00677418 /*_ReceiveMessageQueue*/ \n"
 494 "    LDR     R0, [SP, #0xC] \n"
 495 "    CMP     R0, #1 \n"
 496 "    BNE     loc_FF11D5C4 \n"
 497 "    LDR     R0, [SP, #0x28] \n"
 498 "    LDR     R0, [R0] \n"
 499 "    CMP     R0, #0x14 \n"
 500 "    CMPNE   R0, #0x15 \n"
 501 "    CMPNE   R0, #0x16 \n"
 502 "    CMPNE   R0, #0x17 \n"
 503 "    BEQ     loc_FF11D724 \n"
 504 "    CMP     R0, #0x2A \n"
 505 "    BEQ     loc_FF11D6AC \n"
 506 "    ADD     R1, SP, #0xC \n"
 507 "    MOV     R0, #0 \n"
 508 "    BL      sub_FF11D508 \n"
 509 
 510 "loc_FF11D5C4:\n"
 511 "    LDR     R0, [SP, #0x28] \n"
 512 "    LDR     R1, [R0] \n"
 513 "    CMP     R1, #0x30 \n"
 514 "    BNE     loc_FF11D5F0 \n"
 515 "    BL      sub_FF11EA8C \n"
 516 "    LDR     R0, [R6, #0x1C] \n"
 517 "    MOV     R1, #1 \n"
 518 "    BL      sub_0067F164 /*_SetEventFlag*/ \n"
 519 "    BL      _ExitTask \n"
 520 "    ADD     SP, SP, #0x2C \n"
 521 "    LDMFD   SP!, {R4-R9,PC} \n"
 522 
 523 "loc_FF11D5F0:\n"
 524 "    CMP     R1, #0x2F \n"
 525 "    BNE     loc_FF11D60C \n"
 526 "    LDR     R2, [R0, #0x8C]! \n"
 527 "    LDR     R1, [R0, #4] \n"
 528 "    MOV     R0, R1 \n"
 529 "    BLX     R2 \n"
 530 "    B       loc_FF11DBE0 \n"
 531 
 532 "loc_FF11D60C:\n"
 533 "    CMP     R1, #0x28 \n"
 534 "    BNE     loc_FF11D65C \n"
 535 "    LDR     R0, [R6, #0x1C] \n"
 536 "    MOV     R1, #0x80 \n"
 537 "    BL      sub_0067F198 /*_ClearEventFlag*/ \n"
 538 "    LDR     R0, =0xFF118BCC \n"
 539 "    MOV     R1, #0x80 \n"
 540 "    BL      sub_FF1EB704 \n"
 541 "    LDR     R0, [R6, #0x1C] \n"
 542 "    MOV     R2, R7 \n"
 543 "    MOV     R1, #0x80 \n"
 544 "    BL      sub_0067F0A4 /*_WaitForAllEventFlag*/ \n"
 545 "    TST     R0, #1 \n"
 546 "    LDRNE   R1, =0x1664 \n"
 547 "    BNE     loc_FF11D718 \n"
 548 
 549 "loc_FF11D648:\n"
 550 "    LDR     R1, [SP, #0x28] \n"
 551 "    LDR     R0, [R1, #0x90] \n"
 552 "    LDR     R1, [R1, #0x8C] \n"
 553 "    BLX     R1 \n"
 554 "    B       loc_FF11DBE0 \n"
 555 
 556 "loc_FF11D65C:\n"
 557 "    CMP     R1, #0x29 \n"
 558 "    BNE     loc_FF11D6A4 \n"
 559 "    ADD     R1, SP, #0xC \n"
 560 "    BL      sub_FF11D508 \n"
 561 "    LDR     R0, [R6, #0x1C] \n"
 562 "    MOV     R1, #0x100 \n"
 563 "    BL      sub_0067F198 /*_ClearEventFlag*/ \n"
 564 "    LDR     R0, =0xFF118BDC \n"
 565 "    MOV     R1, #0x100 \n"
 566 "    BL      sub_FF1EB8A4 \n"
 567 "    LDR     R0, [R6, #0x1C] \n"
 568 "    MOV     R2, R7 \n"
 569 "    MOV     R1, #0x100 \n"
 570 "    BL      sub_0067F0A4 /*_WaitForAllEventFlag*/ \n"
 571 "    TST     R0, #1 \n"
 572 "    BEQ     loc_FF11D648 \n"
 573 "    LDR     R1, =0x166E \n"
 574 "    B       loc_FF11D718 \n"
 575 
 576 "loc_FF11D6A4:\n"
 577 "    CMP     R1, #0x2A \n"
 578 "    BNE     loc_FF11D6BC \n"
 579 
 580 "loc_FF11D6AC:\n"
 581 "    LDR     R0, [SP, #0x28] \n"
 582 "    ADD     R1, SP, #0xC \n"
 583 "    BL      sub_FF11D508 \n"
 584 "    B       loc_FF11D648 \n"
 585 
 586 "loc_FF11D6BC:\n"
 587 "    CMP     R1, #0x2D \n"
 588 "    BNE     loc_FF11D6D4 \n"
 589 "    BL      sub_FF109048 \n"
 590 "    BL      sub_FF109E04 \n"
 591 "    BL      sub_FF109918 \n"
 592 "    B       loc_FF11D648 \n"
 593 
 594 "loc_FF11D6D4:\n"
 595 "    CMP     R1, #0x2E \n"
 596 "    BNE     loc_FF11D724 \n"
 597 "    LDR     R0, [R6, #0x1C] \n"
 598 "    MOV     R1, #4 \n"
 599 "    BL      sub_0067F198 /*_ClearEventFlag*/ \n"
 600 "    LDR     R1, =0xFF118BFC \n"
 601 "    LDR     R0, =0xFFFFF400 \n"
 602 "    MOV     R2, #4 \n"
 603 "    BL      sub_FF108A98 \n"
 604 "    BL      sub_FF108D28 \n"
 605 "    LDR     R0, [R6, #0x1C] \n"
 606 "    MOV     R2, R7 \n"
 607 "    MOV     R1, #4 \n"
 608 "    BL      sub_0067EFC0 /*_WaitForAnyEventFlag*/ \n"
 609 "    TST     R0, #1 \n"
 610 "    BEQ     loc_FF11D648 \n"
 611 "    LDR     R1, =0x1696 \n"
 612 
 613 "loc_FF11D718:\n"
 614 "    LDR     R0, =0xFF119360 /*'ExpDrv.c'*/ \n"
 615 "    BL      _DebugAssert \n"
 616 "    B       loc_FF11D648 \n"
 617 
 618 "loc_FF11D724:\n"
 619 "    LDR     R0, [SP, #0x28] \n"
 620 "    MOV     R8, #1 \n"
 621 "    LDR     R1, [R0] \n"
 622 "    CMP     R1, #0x12 \n"
 623 "    CMPNE   R1, #0x13 \n"
 624 "    BNE     loc_FF11D78C \n"
 625 "    LDR     R1, [R0, #0x7C] \n"
 626 "    ADD     R1, R1, R1, LSL#1 \n"
 627 "    ADD     R1, R0, R1, LSL#2 \n"
 628 "    SUB     R1, R1, #8 \n"
 629 "    LDMIA   R1, {R2,R3,R9} \n"
 630 "    STMIA   R5, {R2,R3,R9} \n"
 631 "    BL      sub_FF11B918 \n"
 632 "    LDR     R0, [SP, #0x28] \n"
 633 "    LDR     R1, [R0, #0x7C] \n"
 634 "    LDR     R3, [R0, #0x8C] \n"
 635 "    LDR     R2, [R0, #0x90] \n"
 636 "    ADD     R0, R0, #4 \n"
 637 "    BLX     R3 \n"
 638 "    LDR     R0, [SP, #0x28] \n"
 639 "    BL      sub_FF11EEAC \n"
 640 "    LDR     R0, [SP, #0x28] \n"
 641 "    LDR     R1, [R0, #0x7C] \n"
 642 "    LDR     R2, [R0, #0x98] \n"
 643 "    LDR     R3, [R0, #0x94] \n"
 644 "    B       loc_FF11DAA4 \n"
 645 
 646 "loc_FF11D78C:\n"
 647 "    CMP     R1, #0x14 \n"
 648 "    CMPNE   R1, #0x15 \n"
 649 "    CMPNE   R1, #0x16 \n"
 650 "    CMPNE   R1, #0x17 \n"
 651 "    BNE     loc_FF11D844 \n"
 652 "    ADD     R3, SP, #0xC \n"
 653 "    MOV     R2, SP \n"
 654 "    ADD     R1, SP, #0x1C \n"
 655 "    BL      sub_FF11BB7C \n"
 656 "    CMP     R0, #1 \n"
 657 "    MOV     R9, R0 \n"
 658 "    CMPNE   R9, #5 \n"
 659 "    BNE     loc_FF11D7E0 \n"
 660 "    LDR     R0, [SP, #0x28] \n"
 661 "    MOV     R2, R9 \n"
 662 "    LDR     R1, [R0, #0x7C]! \n"
 663 "    LDR     R12, [R0, #0x10]! \n"
 664 "    LDR     R3, [R0, #4] \n"
 665 "    MOV     R0, SP \n"
 666 "    BLX     R12 \n"
 667 "    B       loc_FF11D818 \n"
 668 
 669 "loc_FF11D7E0:\n"
 670 "    LDR     R0, [SP, #0x28] \n"
 671 "    CMP     R9, #2 \n"
 672 "    LDR     R3, [R0, #0x90] \n"
 673 "    CMPNE   R9, #6 \n"
 674 "    BNE     loc_FF11D82C \n"
 675 "    LDR     R12, [R0, #0x8C] \n"
 676 "    MOV     R2, R9 \n"
 677 "    MOV     R1, #1 \n"
 678 "    MOV     R0, SP \n"
 679 "    BLX     R12 \n"
 680 "    LDR     R0, [SP, #0x28] \n"
 681 "    MOV     R2, SP \n"
 682 "    ADD     R1, SP, #0x1C \n"
 683 "    BL      sub_FF11D17C \n"
 684 
 685 "loc_FF11D818:\n"
 686 "    LDR     R0, [SP, #0x28] \n"
 687 "    LDR     R2, [SP, #0xC] \n"
 688 "    MOV     R1, R9 \n"
 689 "    BL      sub_FF11D4A8 \n"
 690 "    B       loc_FF11DAAC \n"
 691 
 692 "loc_FF11D82C:\n"
 693 "    LDR     R1, [R0, #0x7C] \n"
 694 "    LDR     R12, [R0, #0x8C] \n"
 695 "    MOV     R2, R9 \n"
 696 "    ADD     R0, R0, #4 \n"
 697 "    BLX     R12 \n"
 698 "    B       loc_FF11DAAC \n"
 699 
 700 "loc_FF11D844:\n"
 701 "    CMP     R1, #0x24 \n"
 702 "    CMPNE   R1, #0x25 \n"
 703 "    BNE     loc_FF11D890 \n"
 704 "    LDR     R1, [R0, #0x7C] \n"
 705 "    ADD     R1, R1, R1, LSL#1 \n"
 706 "    ADD     R1, R0, R1, LSL#2 \n"
 707 "    SUB     R1, R1, #8 \n"
 708 "    LDMIA   R1, {R2,R3,R9} \n"
 709 "    STMIA   R5, {R2,R3,R9} \n"
 710 "    BL      sub_FF11A8EC \n"
 711 "    LDR     R0, [SP, #0x28] \n"
 712 "    LDR     R1, [R0, #0x7C] \n"
 713 "    LDR     R3, [R0, #0x8C] \n"
 714 "    LDR     R2, [R0, #0x90] \n"
 715 "    ADD     R0, R0, #4 \n"
 716 "    BLX     R3 \n"
 717 "    LDR     R0, [SP, #0x28] \n"
 718 "    BL      sub_FF11AD30 \n"
 719 "    B       loc_FF11DAAC \n"
 720 
 721 "loc_FF11D890:\n"
 722 "    ADD     R1, R0, #4 \n"
 723 "    LDMIA   R1, {R2,R3,R9} \n"
 724 "    STMIA   R5, {R2,R3,R9} \n"
 725 "    LDR     R1, [R0] \n"
 726 "    CMP     R1, #0x28 \n"
 727 "    ADDCC   PC, PC, R1, LSL#2 \n"
 728 "    B       loc_FF11DA94 \n"
 729 "    B       loc_FF11D94C \n"
 730 "    B       loc_FF11D94C \n"
 731 "    B       loc_FF11D954 \n"
 732 "    B       loc_FF11D95C \n"
 733 "    B       loc_FF11D95C \n"
 734 "    B       loc_FF11D95C \n"
 735 "    B       loc_FF11D94C \n"
 736 "    B       loc_FF11D954 \n"
 737 "    B       loc_FF11D95C \n"
 738 "    B       loc_FF11D95C \n"
 739 "    B       loc_FF11D974 \n"
 740 "    B       loc_FF11D974 \n"
 741 "    B       loc_FF11DA80 \n"
 742 "    B       loc_FF11DA88 \n"
 743 "    B       loc_FF11DA88 \n"
 744 "    B       loc_FF11DA88 \n"
 745 "    B       loc_FF11DA88 \n"
 746 "    B       loc_FF11DA90 \n"
 747 "    B       loc_FF11DA94 \n"
 748 "    B       loc_FF11DA94 \n"
 749 "    B       loc_FF11DA94 \n"
 750 "    B       loc_FF11DA94 \n"
 751 "    B       loc_FF11DA94 \n"
 752 "    B       loc_FF11DA94 \n"
 753 "    B       loc_FF11D964 \n"
 754 "    B       loc_FF11D96C \n"
 755 "    B       loc_FF11D96C \n"
 756 "    B       loc_FF11D96C \n"
 757 "    B       loc_FF11D980 \n"
 758 "    B       loc_FF11D980 \n"
 759 "    B       loc_FF11D988 \n"
 760 "    B       loc_FF11D9C0 \n"
 761 "    B       loc_FF11D9F8 \n"
 762 "    B       loc_FF11DA30 \n"
 763 "    B       loc_FF11DA68 \n"
 764 "    B       loc_FF11DA68 \n"
 765 "    B       loc_FF11DA94 \n"
 766 "    B       loc_FF11DA94 \n"
 767 "    B       loc_FF11DA70 \n"
 768 "    B       loc_FF11DA78 \n"
 769 
 770 "loc_FF11D94C:\n"
 771 "    BL      sub_FF1191E0 \n"
 772 "    B       loc_FF11DA94 \n"
 773 
 774 "loc_FF11D954:\n"
 775 "    BL      sub_FF11949C \n"
 776 "    B       loc_FF11DA94 \n"
 777 
 778 "loc_FF11D95C:\n"
 779 "    BL      sub_FF1196C8 \n"
 780 "    B       loc_FF11DA94 \n"
 781 
 782 "loc_FF11D964:\n"
 783 "    BL      sub_FF1199F4 \n"
 784 "    B       loc_FF11DA94 \n"
 785 
 786 "loc_FF11D96C:\n"
 787 "    BL      sub_FF119C10 \n"
 788 "    B       loc_FF11DA94 \n"
 789 
 790 "loc_FF11D974:\n"
 791 "    BL      sub_FF119FD0_my \n"  // --> Patched. Old value = 0xFF119FD0.
 792 "    MOV     R8, #0 \n"
 793 "    B       loc_FF11DA94 \n"
 794 
 795 "loc_FF11D980:\n"
 796 "    BL      sub_FF11A114 \n"
 797 "    B       loc_FF11DA94 \n"
 798 
 799 "loc_FF11D988:\n"
 800 "    LDRH    R1, [R0, #4] \n"
 801 "    STRH    R1, [SP, #0x1C] \n"
 802 "    LDRH    R1, [R4, #2] \n"
 803 "    STRH    R1, [SP, #0x1E] \n"
 804 "    LDRH    R1, [R4, #4] \n"
 805 "    STRH    R1, [SP, #0x20] \n"
 806 "    LDRH    R1, [R4, #6] \n"
 807 "    STRH    R1, [SP, #0x22] \n"
 808 "    LDRH    R1, [R0, #0xC] \n"
 809 "    STRH    R1, [SP, #0x24] \n"
 810 "    LDRH    R1, [R4, #0xA] \n"
 811 "    STRH    R1, [SP, #0x26] \n"
 812 "    BL      sub_FF11EB30 \n"
 813 "    B       loc_FF11DA94 \n"
 814 
 815 "loc_FF11D9C0:\n"
 816 "    LDRH    R1, [R0, #4] \n"
 817 "    STRH    R1, [SP, #0x1C] \n"
 818 "    LDRH    R1, [R4, #2] \n"
 819 "    STRH    R1, [SP, #0x1E] \n"
 820 "    LDRH    R1, [R4, #4] \n"
 821 "    STRH    R1, [SP, #0x20] \n"
 822 "    LDRH    R1, [R4, #6] \n"
 823 "    STRH    R1, [SP, #0x22] \n"
 824 "    LDRH    R1, [R4, #8] \n"
 825 "    STRH    R1, [SP, #0x24] \n"
 826 "    LDRH    R1, [R4, #0xA] \n"
 827 "    STRH    R1, [SP, #0x26] \n"
 828 "    BL      sub_FF11ECA8 \n"
 829 "    B       loc_FF11DA94 \n"
 830 
 831 "loc_FF11D9F8:\n"
 832 "    LDRH    R1, [R4] \n"
 833 "    STRH    R1, [SP, #0x1C] \n"
 834 "    LDRH    R1, [R0, #6] \n"
 835 "    STRH    R1, [SP, #0x1E] \n"
 836 "    LDRH    R1, [R4, #4] \n"
 837 "    STRH    R1, [SP, #0x20] \n"
 838 "    LDRH    R1, [R4, #6] \n"
 839 "    STRH    R1, [SP, #0x22] \n"
 840 "    LDRH    R1, [R4, #8] \n"
 841 "    STRH    R1, [SP, #0x24] \n"
 842 "    LDRH    R1, [R4, #0xA] \n"
 843 "    STRH    R1, [SP, #0x26] \n"
 844 "    BL      sub_FF11ED60 \n"
 845 "    B       loc_FF11DA94 \n"
 846 
 847 "loc_FF11DA30:\n"
 848 "    LDRH    R1, [R4] \n"
 849 "    STRH    R1, [SP, #0x1C] \n"
 850 "    LDRH    R1, [R4, #2] \n"
 851 "    STRH    R1, [SP, #0x1E] \n"
 852 "    LDRH    R1, [R4, #4] \n"
 853 "    STRH    R1, [SP, #0x20] \n"
 854 "    LDRH    R1, [R4, #6] \n"
 855 "    STRH    R1, [SP, #0x22] \n"
 856 "    LDRH    R1, [R0, #0xC] \n"
 857 "    STRH    R1, [SP, #0x24] \n"
 858 "    LDRH    R1, [R4, #0xA] \n"
 859 "    STRH    R1, [SP, #0x26] \n"
 860 "    BL      sub_FF11EE08 \n"
 861 "    B       loc_FF11DA94 \n"
 862 
 863 "loc_FF11DA68:\n"
 864 "    BL      sub_FF11A69C \n"
 865 "    B       loc_FF11DA94 \n"
 866 
 867 "loc_FF11DA70:\n"
 868 "    BL      sub_FF11AE34 \n"
 869 "    B       loc_FF11DA94 \n"
 870 
 871 "loc_FF11DA78:\n"
 872 "    BL      sub_FF11B11C \n"
 873 "    B       loc_FF11DA94 \n"
 874 
 875 "loc_FF11DA80:\n"
 876 "    BL      sub_FF11B3E0 \n"
 877 "    B       loc_FF11DA94 \n"
 878 
 879 "loc_FF11DA88:\n"
 880 "    BL      sub_FF11B5A0 \n"
 881 "    B       loc_FF11DA94 \n"
 882 
 883 "loc_FF11DA90:\n"
 884 "    BL      sub_FF11B70C \n"
 885 
 886 "loc_FF11DA94:\n"
 887 "    LDR     R0, [SP, #0x28] \n"
 888 "    LDR     R1, [R0, #0x7C] \n"
 889 "    LDR     R2, [R0, #0x90] \n"
 890 "    LDR     R3, [R0, #0x8C] \n"
 891 
 892 "loc_FF11DAA4:\n"
 893 "    ADD     R0, R0, #4 \n"
 894 "    BLX     R3 \n"
 895 
 896 "loc_FF11DAAC:\n"
 897 "    LDR     R0, [SP, #0x28] \n"
 898 "    LDR     R0, [R0] \n"
 899 "    CMP     R0, #0x10 \n"
 900 "    BEQ     loc_FF11DAE4 \n"
 901 "    BGT     loc_FF11DAD4 \n"
 902 "    CMP     R0, #1 \n"
 903 "    CMPNE   R0, #4 \n"
 904 "    CMPNE   R0, #0xE \n"
 905 "    BNE     loc_FF11DB18 \n"
 906 "    B       loc_FF11DAE4 \n"
 907 
 908 "loc_FF11DAD4:\n"
 909 "    CMP     R0, #0x13 \n"
 910 "    CMPNE   R0, #0x17 \n"
 911 "    CMPNE   R0, #0x1A \n"
 912 "    BNE     loc_FF11DB18 \n"
 913 
 914 "loc_FF11DAE4:\n"
 915 "    LDRSH   R0, [R4] \n"
 916 "    CMN     R0, #0xC00 \n"
 917 "    LDRNESH R1, [R4, #8] \n"
 918 "    CMNNE   R1, #0xC00 \n"
 919 "    STRNEH  R0, [SP, #0x1C] \n"
 920 "    STRNEH  R1, [SP, #0x24] \n"
 921 "    BNE     loc_FF11DB18 \n"
 922 "    ADD     R0, SP, #0x10 \n"
 923 "    BL      sub_FF11F0C0 \n"
 924 "    LDRH    R0, [SP, #0x10] \n"
 925 "    STRH    R0, [SP, #0x1C] \n"
 926 "    LDRH    R0, [SP, #0x18] \n"
 927 "    STRH    R0, [SP, #0x24] \n"
 928 
 929 "loc_FF11DB18:\n"
 930 "    LDR     R0, [SP, #0x28] \n"
 931 "    CMP     R8, #1 \n"
 932 "    BNE     loc_FF11DB68 \n"
 933 "    LDR     R1, [R0, #0x7C] \n"
 934 "    MOV     R2, #0xC \n"
 935 "    ADD     R1, R1, R1, LSL#1 \n"
 936 "    ADD     R0, R0, R1, LSL#2 \n"
 937 "    SUB     R8, R0, #8 \n"
 938 "    LDR     R0, =0xF2910 \n"
 939 "    ADD     R1, SP, #0x1C \n"
 940 "    BL      sub_006950D8 \n"
 941 "    LDR     R0, =0xF291C \n"
 942 "    MOV     R2, #0xC \n"
 943 "    ADD     R1, SP, #0x1C \n"
 944 "    BL      sub_006950D8 \n"
 945 "    LDR     R0, =0xF2928 \n"
 946 "    MOV     R2, #0xC \n"
 947 "    MOV     R1, R8 \n"
 948 "    BL      sub_006950D8 \n"
 949 "    B       loc_FF11DBE0 \n"
 950 
 951 "loc_FF11DB68:\n"
 952 "    LDR     R0, [R0] \n"
 953 "    MOV     R3, #1 \n"
 954 "    CMP     R0, #0xB \n"
 955 "    BNE     loc_FF11DBAC \n"
 956 "    MOV     R2, #0 \n"
 957 "    STRD    R2, [SP] \n"
 958 "    MOV     R2, R3 \n"
 959 "    MOV     R1, R3 \n"
 960 "    MOV     R0, #0 \n"
 961 "    BL      sub_FF118FC0 \n"
 962 "    MOV     R3, #1 \n"
 963 "    MOV     R2, #0 \n"
 964 "    STRD    R2, [SP] \n"
 965 "    MOV     R2, R3 \n"
 966 "    MOV     R1, R3 \n"
 967 "    MOV     R0, #0 \n"
 968 "    B       loc_FF11DBDC \n"
 969 
 970 "loc_FF11DBAC:\n"
 971 "    MOV     R2, #1 \n"
 972 "    STRD    R2, [SP] \n"
 973 "    MOV     R3, R2 \n"
 974 "    MOV     R1, R2 \n"
 975 "    MOV     R0, R2 \n"
 976 "    BL      sub_FF118FC0 \n"
 977 "    MOV     R3, #1 \n"
 978 "    MOV     R2, R3 \n"
 979 "    MOV     R1, R3 \n"
 980 "    MOV     R0, R3 \n"
 981 "    STR     R3, [SP] \n"
 982 "    STR     R3, [SP, #4] \n"
 983 
 984 "loc_FF11DBDC:\n"
 985 "    BL      sub_FF11912C \n"
 986 
 987 "loc_FF11DBE0:\n"
 988 "    LDR     R0, [SP, #0x28] \n"
 989 "    BL      sub_FF11EA8C \n"
 990 "    B       loc_FF11D578 \n"
 991 );
 992 }
 993 
 994 /*************************************************************/
 995 //** sub_FF119FD0_my @ 0xFF119FD0 - 0xFF11A094, length=50
 996 void __attribute__((naked,noinline)) sub_FF119FD0_my() {
 997 asm volatile (
 998 "    STMFD   SP!, {R4-R8,LR} \n"
 999 "    LDR     R7, =0x4CF8 \n"
1000 "    MOV     R4, R0 \n"
1001 "    LDR     R0, [R7, #0x1C] \n"
1002 "    MOV     R1, #0x3E \n"
1003 "    BL      sub_0067F198 /*_ClearEventFlag*/ \n"
1004 "    MOV     R2, #0 \n"
1005 "    LDRSH   R0, [R4, #4] \n"
1006 "    MOV     R3, #1 \n"
1007 "    MOV     R1, R2 \n"
1008 "    BL      sub_FF118C64 \n"
1009 "    MOV     R6, R0 \n"
1010 "    LDRSH   R0, [R4, #6] \n"
1011 "    BL      sub_FF118E20 \n"
1012 "    LDRSH   R0, [R4, #8] \n"
1013 "    BL      sub_FF118E78 \n"
1014 "    LDRSH   R0, [R4, #0xA] \n"
1015 "    BL      sub_FF118ED0 \n"
1016 "    LDRSH   R0, [R4, #0xC] \n"
1017 "    MOV     R1, #0 \n"
1018 "    BL      sub_FF118F28 \n"
1019 "    MOV     R5, R0 \n"
1020 "    LDR     R0, [R4] \n"
1021 "    LDR     R8, =0xF2928 \n"
1022 "    CMP     R0, #0xB \n"
1023 "    MOVEQ   R6, #0 \n"
1024 "    MOVEQ   R5, R6 \n"
1025 "    BEQ     loc_FF11A068 \n"
1026 "    CMP     R6, #1 \n"
1027 "    BNE     loc_FF11A068 \n"
1028 "    LDRSH   R0, [R4, #4] \n"
1029 "    LDR     R1, =0xFF118BBC \n"
1030 "    MOV     R2, #2 \n"
1031 "    BL      sub_FF1EB788 \n"
1032 "    STRH    R0, [R4, #4] \n"
1033 "    MOV     R0, #0 \n"
1034 "    STR     R0, [R7, #0x28] \n"
1035 "    B       loc_FF11A070 \n"
1036 
1037 "loc_FF11A068:\n"
1038 "    LDRH    R0, [R8] \n"
1039 "    STRH    R0, [R4, #4] \n"
1040 
1041 "loc_FF11A070:\n"
1042 "    CMP     R5, #1 \n"
1043 "    LDRNEH  R0, [R8, #8] \n"
1044 "    BNE     loc_FF11A08C \n"
1045 "    LDRSH   R0, [R4, #0xC] \n"
1046 "    LDR     R1, =0xFF118C40 \n"
1047 "    MOV     R2, #0x20 \n"
1048 "    BL      sub_FF11EAEC \n"
1049 
1050 "loc_FF11A08C:\n"
1051 "    STRH    R0, [R4, #0xC] \n"
1052 "    LDRSH   R0, [R4, #6] \n"
1053 "    BL      sub_FF108D94_my \n"  // --> Patched. Old value = 0xFF108D94.
1054 "    LDR     PC, =0xFF11A098 \n"  // Continue in firmware
1055 );
1056 }
1057 
1058 /*************************************************************/
1059 //** sub_FF108D94_my @ 0xFF108D94 - 0xFF108DD4, length=17
1060 void __attribute__((naked,noinline)) sub_FF108D94_my() {
1061 asm volatile (
1062 "    STMFD   SP!, {R4-R6,LR} \n"
1063 "    LDR     R5, =0x4978 \n"
1064 "    MOV     R4, R0 \n"
1065 "    LDR     R0, [R5, #4] \n"
1066 "    CMP     R0, #1 \n"
1067 "    MOVNE   R1, #0x154 \n"
1068 "    LDRNE   R0, =0xFF108BCC /*'Shutter.c'*/ \n"
1069 "    BLNE    _DebugAssert \n"
1070 "    CMN     R4, #0xC00 \n"
1071 "    LDREQSH R4, [R5, #2] \n"
1072 "    CMN     R4, #0xC00 \n"
1073 "    LDREQ   R1, =0x15A \n"
1074 "    LDREQ   R0, =0xFF108BCC /*'Shutter.c'*/ \n"
1075 "    STRH    R4, [R5, #2] \n"
1076 "    BLEQ    _DebugAssert \n"
1077 "    MOV     R0, R4 \n"
1078 "    BL      apex2us \n"  // --> Patched. Old value = _apex2us.
1079 "    LDR     PC, =0xFF108DD8 \n"  // Continue in firmware
1080 );
1081 }

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