platform/ixus950_sd850/sub/100c/boot.c

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This source file includes following definitions.
boot
h_usrInit
h_usrKernelInit
h_usrRoot
   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 const char * const new_sa = &_end;
   6 
   7 /* Ours stuff */
   8 extern long wrs_kernel_bss_start;
   9 extern long wrs_kernel_bss_end;
  10 extern void createHook (void *pNewTcb);
  11 extern void deleteHook (void *pTcb);
  12 
  13 
  14 void boot();
  15 
  16 /* "relocated" functions */
  17 void __attribute__((naked,noinline)) h_usrInit();
  18 void __attribute__((naked,noinline)) h_usrKernelInit();
  19 void __attribute__((naked,noinline)) h_usrRoot();
  20 
  21 
  22 
  23 void boot()
  24 {
  25         // address of "start of data" string in FW:
  26     long *canon_data_src = (void*)0xFFB99360;
  27     long *canon_data_dst = (void*)0x1900;
  28         // size from "start of data" to the end of FW at FFBA7D40, =E9E0:
  29     long canon_data_len = 0xE9E0;
  30     long *canon_bss_start = (void*)0x102E0; // 1900+data_len=102E0
  31         // R2 before original kernelInit (MEMISOSTART) minus bss_start
  32         // (kernelInit at FF932E10)
  33     long canon_bss_len = 0xAC070 - 0x102E0;
  34     long i;
  35 
  36     asm volatile (
  37         "MRC     p15, 0, R0,c1,c0\n"
  38         "ORR     R0, R0, #0x1000\n"
  39         "ORR     R0, R0, #4\n"
  40         "ORR     R0, R0, #1\n"
  41         "MCR     p15, 0, R0,c1,c0\n"
  42     :::"r0");
  43 
  44     for(i=0;i<canon_data_len/4;i++)
  45         canon_data_dst[i]=canon_data_src[i];
  46 
  47     for(i=0;i<canon_bss_len/4;i++)
  48         canon_bss_start[i]=0;
  49 
  50     asm volatile (
  51         "MRC     p15, 0, R0,c1,c0\n"
  52         "ORR     R0, R0, #0x1000\n"
  53         "BIC     R0, R0, #4\n"
  54         "ORR     R0, R0, #1\n"
  55         "MCR     p15, 0, R0,c1,c0\n"
  56     :::"r0");
  57 
  58     h_usrInit();
  59 }
  60 
  61 void h_usrInit()
  62 {
  63     asm volatile (
  64         "STR     LR, [SP,#-4]!\n"
  65         "BL      sub_FF811968\n"
  66         "MOV     R0, #2\n"
  67         "MOV     R1, R0\n"
  68         "BL      sub_FF9255A4\n"
  69         "BL      sub_FF91969C\n" //excVecInit
  70         "BL      sub_FF8111C4\n"
  71         "BL      sub_FF811728\n"
  72         "LDR     LR, [SP],#4\n"
  73         "B       h_usrKernelInit\n" // !! has to be here
  74     );
  75 }
  76 
  77 void  h_usrKernelInit()
  78 {
  79     asm volatile (
  80         "STMFD   SP!, {R4,LR}\n"
  81         "SUB     SP, SP, #8\n"
  82         "BL      sub_FF925AA4\n" //classLibInit
  83         "BL      sub_FF935BD0\n" //taskLibInit
  84         "LDR     R3, =0x5B20\n"
  85         "LDR     R2, =0xA90C0\n"
  86         "LDR     R1, [R3]\n"
  87         "LDR     R0, =0xA9D10\n"
  88         "MOV     R3, #0x100\n"
  89         "BL      sub_FF9317C0\n" //qInit
  90         "LDR     R3, =0x5AE0\n"
  91         "LDR     R0, =0x5E80\n"
  92         "LDR     R1, [R3]\n"
  93         "BL      sub_FF9317C0\n" //qInit
  94         "LDR     R3, =0x5B9C\n"
  95         "LDR     R0, =0xA9CE4\n"
  96         "LDR     R1, [R3]\n"
  97         "BL      sub_FF9317C0\n" //qInit
  98         "BL      sub_FF939F8C\n" //workQInit
  99         "BL      sub_FF8112AC\n"
 100         "MOV     R4, #0\n"
 101         "MOV     R3, R0\n"
 102         "MOV     R12, #0x800\n"
 103         "LDR     R0, =h_usrRoot\n"      // !! has to be here
 104         "MOV     R1, #0x4000\n"
 105     );    
 106 //        "LDR     R2, =0xDC070\n"      // !! MEMISOSTART 0xAC070 + MEMISOSIZE 0x30000
 107     asm volatile (
 108         "LDR     R2, =new_sa\n"
 109         "LDR     R2, [R2]\n"
 110     );
 111     asm volatile (
 112         "STR     R12, [SP]\n"
 113         "STR     R4, [SP,#4]\n"
 114         "BL      sub_FF932E10\n" //kernelInit
 115         "ADD     SP, SP, #8\n"
 116         "LDMFD   SP!, {R4,PC}\n"
 117     );
 118 }
 119 
 120 
 121 void  h_usrRoot()
 122 {
 123     asm volatile (
 124         "STMFD   SP!, {R4,R5,LR}\n"
 125         "MOV     R5, R0\n"
 126         "MOV     R4, R1\n"
 127         "BL      sub_FF8119D0\n"
 128         "MOV     R1, R4\n"
 129         "MOV     R0, R5\n"
 130         "BL      sub_FF92A55C\n" //memInit
 131         "MOV     R1, R4\n"
 132         "MOV     R0, R5\n"
 133         "BL      sub_FF92AFD4\n" //memPartLibInit
 134 //      "BL      sub_FF8117E8\n" // nullsub 3
 135         "BL      sub_FF811704\n"
 136         "BL      sub_FF811A0C\n"
 137         "BL      sub_FF8119F0\n"
 138         "BL      sub_FF811A38\n"
 139         "BL      sub_FF8119C4\n"
 140     );
 141 
 142     _taskCreateHookAdd(createHook);
 143     _taskDeleteHookAdd(deleteHook);
 144 
 145     drv_self_hide();
 146 
 147     asm volatile (
 148         "LDMFD   SP!, {R4,R5,LR}\n"
 149         "B       sub_FF81136C\n" //IsEmptyWriteCache_2
 150     );
 151 }
 152
/* [<][>][^][v][top][bottom][index][help] */
root/platform/ixus950_sd850/sub/100c/boot.c

DEFINITIONS
