root/platform/ixus870_sd880/sub/102b/filewrite.c

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DEFINITIONS

This source file includes following definitions.
  1. filewritetask
  2. sub_FFA1E860_my
  3. sub_FFA1E99C_my
  4. sub_FFA1EA98_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 
   4 typedef struct {
   5     unsigned int address;
   6     unsigned int length;
   7 } cam_ptp_data_chunk; //camera specific structure
   8 
   9 #define MAX_CHUNKS_FOR_JPEG 3 //model specific
  10 /*
  11  * fwt_data_struct: defined here as it's camera dependent
  12  * unneeded members are designated with unkn
  13  * file_offset, full_size, seek_flag only needs to be defined for DryOS>=r50 generation cameras
  14  * pdc is always required
  15  * name is not currently used
  16  */
  17 typedef struct
  18 {
  19     int unkn1, unkn2, unkn3, unkn4, unkn5;
  20     cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_JPEG];
  21     char name[32];
  22 } fwt_data_struct;
  23 
  24 #include "../../../generic/filewrite.c"
  25 
  26 // filewritetask
  27 
  28 void __attribute__((naked,noinline)) filewritetask() { //sub_FFA1E5C0
  29 asm volatile (
  30       "    STMFD   SP!, {R1-R5,LR} \n" 
  31       "    LDR     R4, =0xBF3C \n" 
  32 "loc_FFA1E5C8:\n"
  33       "    LDR     R0, [R4, #0x10] \n" 
  34       "    MOV     R2, #0 \n" 
  35       "    ADD     R1, SP, #8 \n" 
  36       "    BL      sub_FF827098 \n" 
  37       "    CMP     R0, #0 \n" 
  38       "    BNE     loc_FFA1E5F8 \n" 
  39       "    LDR     R0, [SP, #8] \n" 
  40       "    LDR     R1, [R0] \n" 
  41       "    CMP     R1, #1 \n" 
  42       "    BNE     loc_FFA1E600 \n" 
  43       "    LDR     R0, [R4, #8] \n" 
  44       "    BL      sub_FF827584 \n" 
  45 "loc_FFA1E5F8:\n"
  46       "    BL      sub_FF81B184 \n" 
  47       "    LDMFD   SP!, {R1-R5,PC} \n" 
  48 "loc_FFA1E600:\n"
  49       "    SUB     R1, R1, #2 \n" 
  50       "    CMP     R1, #5 \n" 
  51       "    ADDLS   PC, PC, R1, LSL #2 \n" 
  52       "    B       loc_FFA1E5C8 \n" 
  53       "    B       loc_FFA1E628 \n" 
  54       "    B       loc_FFA1E68C \n" 
  55       "    B       loc_FFA1E694 \n" 
  56       "    B       loc_FFA1E694 \n" 
  57       "    B       loc_FFA1E694 \n" 
  58       "    B       loc_FFA1E69C \n" 
  59 "loc_FFA1E628:\n"
  60       "    MOV     R0, #0 \n" 
  61       "    STR     R0, [SP] \n" 
  62 "loc_FFA1E630:\n"
  63       "    LDR     R0, [R4, #0x10] \n" 
  64       "    MOV     R1, SP \n" 
  65       "    BL      sub_FF8272DC \n" 
  66       "    LDR     R0, [SP] \n" 
  67       "    CMP     R0, #0 \n" 
  68       "    BEQ     loc_FFA1E65C \n" 
  69       "    LDR     R0, [R4, #0x10] \n" 
  70       "    MOV     R2, #0 \n" 
  71       "    ADD     R1, SP, #4 \n" 
  72       "    BL      sub_FF827098 \n" 
  73       "    B       loc_FFA1E630 \n" 
  74 "loc_FFA1E65C:\n"
  75       "    LDR     R0, [R4] \n" 
  76       "    CMN     R0, #1 \n" 
  77       "    BEQ     loc_FFA1E680 \n" 
  78 //      "    BL      sub_FF823AF4 \n"   //-
  79       "    BL      fwt_close\n"         //+
  80       "    MVN     R0, #0 \n" 
  81       "    STR     R0, [R4] \n" 
  82       "    LDR     R0, =0xB1CF4 \n" 
  83       "    BL      sub_FF8555B0 \n" 
  84       "    BL      sub_FF853C58 \n" 
  85 "loc_FFA1E680:\n"
  86       "    LDR     R0, [R4, #0xC] \n" 
  87       "    BL      sub_FF827584 \n" 
  88       "    B       loc_FFA1E5C8 \n" 
  89 "loc_FFA1E68C:\n"
  90       "    BL      sub_FFA1E860_my \n" //->
  91       "    B       loc_FFA1E5C8 \n" 
  92 "loc_FFA1E694:\n"
  93       "    BL      sub_FFA1E99C_my \n" //-> 
  94       "    B       loc_FFA1E5C8 \n" 
  95 "loc_FFA1E69C:\n"
  96       "    BL      sub_FFA1EA98_my \n" //-> 
  97       "    B       loc_FFA1E5C8 \n" 
  98       ".ltorg\n"    //+
  99     );
 100 }
 101 
 102 
 103 void __attribute__((naked,noinline)) sub_FFA1E860_my(  ) {
 104 asm volatile (
 105       "    STMFD   SP!, {R4-R8,LR} \n" 
 106       "    MOV     R4, R0 \n" 
 107       "    ADD     R0, R0, #0x2C \n" 
 108       "    SUB     SP, SP, #0x38 \n" 
 109       "    BL      sub_FF8555B0 \n" 
 110       "    MOV     R1, #0 \n" 
 111       "    BL      sub_FF853C08 \n" 
 112       "    LDR     R0, [R4, #0xC] \n" 
 113       "    BL      sub_FF851F18 \n" 
 114       "    LDR     R7, [R4, #8] \n" 
 115       "    LDR     R8, =0x1B6 \n" 
 116       "    ADD     R6, R4, #0x2C \n" 
 117       "    LDR     R5, [R4, #0xC] \n" 
 118 //hook start
 119       "STMFD SP!, {R4-R12,LR}\n"
 120       "MOV R0, R4\n"
 121       "BL filewrite_main_hook\n"
 122       "LDMFD SP!, {R4-R12,LR}\n"
 123 //hook end
 124       "    MOV     R0, R6 \n" 
 125       "    MOV     R1, R7 \n" 
 126       "    MOV     R2, R8 \n" 
 127 //      "    BL      sub_FF823ACC \n"   //-
 128       "    BL      fwt_open\n"          //+
 129       "LDR PC, =0xFFA1E8A4\n"           //+ jump back to ROM
 130 /*      "    CMN     R0, #1 \n"         //@sub_FFA1E860+0x44
 131       "    BNE     loc_FFA1E904 \n" 
 132       "    MOV     R0, R6 \n" 
 133       "    BL      sub_FF823FD4 \n" 
 134       "    MOV     R2, #0xF \n" 
 135       "    MOV     R1, R6 \n" 
 136       "    MOV     R0, SP \n" 
 137       "    BL      sub_FFAD18A8 \n" 
 138       "    LDR     R0, =0x41FF \n" 
 139       "    MOV     R1, #0 \n" 
 140       "    STRB    R1, [SP, #0xF] \n" 
 141       "    STR     R0, [SP, #0x20] \n" 
 142       "    MOV     R0, #0x10 \n" 
 143       "    ADD     R2, SP, #0x24 \n" 
 144       "    STMIA   R2, {R0,R1,R5} \n" 
 145       "    ADD     R1, SP, #0x20 \n" 
 146       "    MOV     R0, SP \n" 
 147       "    STR     R5, [SP, #0x30] \n" 
 148       "    STR     R5, [SP, #0x34] \n" 
 149       "    BL      sub_FF85351C \n" 
 150       "    MOV     R2, R8 \n" 
 151       "    MOV     R1, R7 \n" 
 152       "    MOV     R0, R6 \n" 
 153       "    BL      sub_FF823ACC \n" 
 154 "loc_FFA1E904:\n"
 155       "    LDR     R5, =0xBF3C \n" 
 156       "    CMN     R0, #1 \n" 
 157       "    STR     R0, [R5] \n" 
 158       "    BNE     loc_FFA1E940 \n" 
 159       "    ADD     R0, R4, #0x2C \n" 
 160       "    BL      sub_FF8555B0 \n" 
 161       "    BL      sub_FF853C58 \n" 
 162       "    LDR     R1, [R5, #0x14] \n" 
 163       "    CMP     R1, #0 \n" 
 164       "    ADDNE   SP, SP, #0x38 \n" 
 165       "    LDMNEFD SP!, {R4-R8,LR} \n" 
 166       "    LDRNE   R0, =0x9200001 \n" 
 167       "    BXNE    R1 \n" 
 168 "loc_FFA1E938:\n"
 169       "    ADD     SP, SP, #0x38 \n" 
 170       "    LDMFD   SP!, {R4-R8,PC} \n" 
 171 "loc_FFA1E940:\n"
 172       "    LDR     R0, =0xB1CF4 \n" 
 173       "    MOV     R2, #0x20 \n" 
 174       "    ADD     R1, R4, #0x2C \n" 
 175       "    BL      sub_FFAD1A10 \n" 
 176       "    MOV     R1, R4 \n" 
 177       "    MOV     R0, #4 \n" 
 178       "    BL      sub_FFA1E518 \n" 
 179       "    B       loc_FFA1E938 \n" */
 180     );
 181 }
 182 
 183 
 184 void __attribute__((naked,noinline)) sub_FFA1E99C_my(  ) {
 185 asm volatile (
 186       "    STMFD   SP!, {R4-R10,LR} \n" 
 187       "    MOV     R4, R0 \n" 
 188       "    LDR     R0, [R0] \n" 
 189       "    CMP     R0, #4 \n" 
 190       "    LDREQ   R6, [R4, #0x18] \n" 
 191       "    LDREQ   R7, [R4, #0x14] \n" 
 192       "    BEQ     loc_FFA1E9D8 \n" 
 193       "    CMP     R0, #5 \n" 
 194       "    LDREQ   R6, [R4, #0x20] \n" 
 195       "    LDREQ   R7, [R4, #0x1C] \n" 
 196       "    BEQ     loc_FFA1E9D8 \n" 
 197       "    CMP     R0, #6 \n" 
 198       "    BNE     loc_FFA1E9EC \n" 
 199       "    LDR     R6, [R4, #0x28] \n" 
 200       "    LDR     R7, [R4, #0x24] \n" 
 201 "loc_FFA1E9D8:\n"
 202       "    CMP     R6, #0 \n" 
 203       "    BNE     loc_FFA1E9FC \n" 
 204 "loc_FFA1E9E0:\n"
 205       "    MOV     R1, R4 \n" 
 206       "    MOV     R0, #7 \n" 
 207       "    B       loc_FFA1EA90 \n" 
 208 "loc_FFA1E9EC:\n"
 209       "    LDR     R1, =0x205 \n" 
 210       "    LDR     R0, =0xFFA1E97C \n" 
 211       "    BL      sub_FF81B1CC \n" 
 212       "    B       loc_FFA1E9E0 \n" 
 213 "loc_FFA1E9FC:\n"
 214       "    LDR     R9, =0xBF3C \n" 
 215       "    MOV     R5, R6 \n" 
 216 "loc_FFA1EA04:\n"
 217       "    LDR     R0, [R4, #4] \n" 
 218       "    CMP     R5, #0x1000000 \n" 
 219       "    MOVLS   R8, R5 \n" 
 220       "    MOVHI   R8, #0x1000000 \n" 
 221       "    BIC     R1, R0, #0xFF000000 \n" 
 222       "    CMP     R1, #0 \n" 
 223       "    BICNE   R0, R0, #0xFF000000 \n" 
 224       "    RSBNE   R0, R0, #0x1000000 \n" 
 225       "    CMPNE   R8, R0 \n" 
 226       "    MOVHI   R8, R0 \n" 
 227       "    LDR     R0, [R9] \n" 
 228       "    MOV     R2, R8 \n" 
 229       "    MOV     R1, R7 \n" 
 230 //      "    BL      sub_FF823BA0 \n"   //-
 231       "    BL      fwt_write\n"         //+
 232       "    LDR     R1, [R4, #4] \n" 
 233       "    CMP     R8, R0 \n" 
 234       "    ADD     R1, R1, R0 \n" 
 235       "    STR     R1, [R4, #4] \n" 
 236       "    BEQ     loc_FFA1EA64 \n" 
 237       "    LDR     R0, =0x10B1 \n" 
 238       "    BL      sub_FF878BA8 \n" 
 239       "    LDR     R1, =0x9200005 \n" 
 240       "    STR     R1, [R4, #0x10] \n" 
 241       "    B       loc_FFA1E9E0 \n" 
 242 "loc_FFA1EA64:\n"
 243       "    SUB     R5, R5, R0 \n" 
 244       "    CMP     R5, R6 \n" 
 245       "    ADD     R7, R7, R0 \n" 
 246       "    LDRCS   R0, =0xFFA1E97C \n" 
 247       "    MOVCS   R1, #0x234 \n" 
 248       "    BLCS    sub_FF81B1CC \n" 
 249       "    CMP     R5, #0 \n" 
 250       "    BNE     loc_FFA1EA04 \n" 
 251       "    LDR     R0, [R4] \n" 
 252       "    MOV     R1, R4 \n" 
 253       "    ADD     R0, R0, #1 \n" 
 254 "loc_FFA1EA90:\n"
 255       "    LDMFD   SP!, {R4-R10,LR} \n" 
 256       "    B       sub_FFA1E518 \n" 
 257     );
 258 }
 259 
 260 
 261 void __attribute__((naked,noinline)) sub_FFA1EA98_my(  ) {
 262 asm volatile (
 263       "    STMFD   SP!, {R4,R5,LR} \n" 
 264       "    LDR     R5, =0xBF3C \n" 
 265       "    MOV     R4, R0 \n" 
 266       "    LDR     R0, [R5] \n" 
 267       "    SUB     SP, SP, #0x1C \n" 
 268       "    CMN     R0, #1 \n" 
 269       "    BEQ     loc_FFA1EACC \n" 
 270 //      "    BL      sub_FF823AF4 \n"   //-
 271       "    BL      fwt_close\n"         //+
 272       "    CMP     R0, #0 \n" 
 273       "    LDRNE   R0, =0x9200003 \n" 
 274       "    STRNE   R0, [R4, #0x10] \n" 
 275       "    MVN     R0, #0 \n" 
 276       "    STR     R0, [R5] \n" 
 277 "loc_FFA1EACC:\n"
 278       "LDR PC, =0xFFA1EACC\n"
 279 /*      "    LDR     R0, [R4, #0x10] \n" 
 280       "    TST     R0, #1 \n" 
 281       "    BNE     loc_FFA1EB14 \n" 
 282       "    LDR     R0, =0x81FF \n" 
 283       "    ADD     R1, SP, #4 \n" 
 284       "    STR     R0, [SP, #4] \n" 
 285       "    MOV     R0, #0x20 \n" 
 286       "    STR     R0, [SP, #8] \n" 
 287       "    LDR     R0, [R4, #4] \n" 
 288       "    STR     R0, [SP, #0xC] \n" 
 289       "    LDR     R0, [R4, #0xC] \n" 
 290       "    STR     R0, [SP, #0x10] \n" 
 291       "    LDR     R0, [R4, #0xC] \n" 
 292       "    STR     R0, [SP, #0x14] \n" 
 293       "    LDR     R0, [R4, #0xC] \n" 
 294       "    STR     R0, [SP, #0x18] \n" 
 295       "    ADD     R0, R4, #0x2C \n" 
 296       "    BL      sub_FF85351C \n" 
 297 "loc_FFA1EB14:\n"
 298       "    ADD     R0, R4, #0x2C \n" 
 299       "    BL      sub_FF8555B0 \n" 
 300       "    BL      sub_FF853C58 \n" 
 301       "    LDR     R1, [R5, #0x14] \n" 
 302       "    CMP     R1, #0 \n" 
 303       "    LDRNE   R0, [R4, #0x10] \n" 
 304       "    BLXNE   R1 \n" 
 305       "    ADD     SP, SP, #0x1C \n" 
 306       "    LDMFD   SP!, {R4,R5,PC} \n" */
 307     );
 308 }
 309 

/* [<][>][^][v][top][bottom][index][help] */