root/platform/a470/sub/100e/capt_seq.c

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DEFINITIONS

This source file includes following definitions.
  1. capt_seq_task
  2. sub_FFD0CAE8_my
  3. exp_drv_task
  4. sub_FFC8DB9C_my
  5. sub_FFC6FC5C_my

   1 /*
   2  * capt_seq.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 
   8 #define USE_STUBS_NRFLAG 1          // see stubs_entry.S
   9 
  10 #include "../../../generic/capt_seq.c"
  11 
  12 /*************************************************************/
  13 //** capt_seq_task @ 0xFFC488A4 - 0xFFC48B28, length=162
  14 void __attribute__((naked,noinline)) capt_seq_task() {
  15 asm volatile (
  16 "    STMFD   SP!, {R3-R7,LR} \n"
  17 "    LDR     R6, =0x52D0 \n"
  18 
  19 "loc_FFC488AC:\n"
  20 "    LDR     R0, [R6, #8] \n"
  21 "    MOV     R2, #0 \n"
  22 "    MOV     R1, SP \n"
  23 "    BL      sub_FFC1763C /*_ReceiveMessageQueue*/ \n"
  24 "    TST     R0, #1 \n"
  25 "    BEQ     loc_FFC488D8 \n"
  26 "    LDR     R1, =0x48E \n"
  27 "    LDR     R0, =0xFFC485CC /*'SsShootTask.c'*/ \n"
  28 "    BL      _DebugAssert \n"
  29 "    BL      _ExitTask \n"
  30 "    LDMFD   SP!, {R3-R7,PC} \n"
  31 
  32 "loc_FFC488D8:\n"
  33 "    LDR     R0, [SP] \n"
  34 "    LDR     R1, [R0] \n"
  35 "    CMP     R1, #0x19 \n"
  36 "    ADDLS   PC, PC, R1, LSL#2 \n"
  37 "    B       loc_FFC48AEC \n"
  38 "    B       loc_FFC48954 \n"
  39 "    B       loc_FFC4895C \n"
  40 "    B       loc_FFC489DC \n"
  41 "    B       loc_FFC489F0 \n"
  42 "    B       loc_FFC489E8 \n"
  43 "    B       loc_FFC489F8 \n"
  44 "    B       loc_FFC48A00 \n"
  45 "    B       loc_FFC48A0C \n"
  46 "    B       loc_FFC48A64 \n"
  47 "    B       loc_FFC489F0 \n"
  48 "    B       loc_FFC48A6C \n"
  49 "    B       loc_FFC48A74 \n"
  50 "    B       loc_FFC48A7C \n"
  51 "    B       loc_FFC48A84 \n"
  52 "    B       loc_FFC48A8C \n"
  53 "    B       loc_FFC48A98 \n"
  54 "    B       loc_FFC48AA0 \n"
  55 "    B       loc_FFC48AA8 \n"
  56 "    B       loc_FFC48AB0 \n"
  57 "    B       loc_FFC48ABC \n"
  58 "    B       loc_FFC48AC4 \n"
  59 "    B       loc_FFC48ACC \n"
  60 "    B       loc_FFC48AD4 \n"
  61 "    B       loc_FFC48ADC \n"
  62 "    B       loc_FFC48AE4 \n"
  63 "    B       loc_FFC48AF8 \n"
  64 
  65 "loc_FFC48954:\n"
  66 "    BL      sub_FFD0B650 \n"
  67 "    BL      shooting_expo_param_override\n"      // added
  68 "    B       loc_FFC48A04 \n"
  69 
  70 "loc_FFC4895C:\n"
  71 "    LDR     R4, [R0, #0xC] \n"
  72 "    LDR     R0, [R4, #8] \n"
  73 "    ORR     R0, R0, #1 \n"
  74 "    STR     R0, [R4, #8] \n"
  75 "    BL      sub_FFD0B640 \n"
  76 "    MOV     R0, R4 \n"
  77 "    BL      sub_FFD0BA28 \n"
  78 "    TST     R0, #1 \n"
  79 "    MOVNE   R2, R4 \n"
  80 "    MOVNE   R1, #1 \n"
  81 "    BNE     loc_FFC48A5C \n"
  82 "    BL      sub_FFD2A204 \n"
  83 "    BL      sub_FFC57098 \n"
  84 "    STR     R0, [R4, #0x14] \n"
  85 "    MOV     R0, R4 \n"
  86 "    BL      sub_FFD0CA20 \n"
  87 "    BL      sub_FFD0D484 \n"
  88 "    MOV     R0, R4 \n"
  89 "    BL      sub_FFD0CAE8_my \n"  // --> Patched. Old value = 0xFFD0CAE8.
  90 "    BL      capt_seq_hook_raw_here \n"         // added
  91 "    MOV     R5, R0 \n"
  92 "    BL      sub_FFD0E464 \n"
  93 "    BL      sub_FFD0E4A0 \n"
  94 "    MOV     R2, R4 \n"
  95 "    MOV     R1, #1 \n"
  96 "    MOV     R0, R5 \n"
  97 "    BL      sub_FFC47080 \n"
  98 "    BL      sub_FFD0CE98 \n"
  99 "    CMP     R0, #0 \n"
 100 "    LDRNE   R0, [R4, #8] \n"
 101 "    ORRNE   R0, R0, #0x2000 \n"
 102 "    STRNE   R0, [R4, #8] \n"
 103 "    B       loc_FFC48AF8 \n"
 104 
 105 "loc_FFC489DC:\n"
 106 "    MOV     R0, #1 \n"
 107 "    BL      sub_FFD0B7E4 \n"
 108 "    B       loc_FFC48AF8 \n"
 109 
 110 "loc_FFC489E8:\n"
 111 "    BL      sub_FFD0B2B0 \n"
 112 "    B       loc_FFC48AF8 \n"
 113 
 114 "loc_FFC489F0:\n"
 115 "    BL      sub_FFD0B630 \n"
 116 "    B       loc_FFC48AF8 \n"
 117 
 118 "loc_FFC489F8:\n"
 119 "    BL      sub_FFD0B638 \n"
 120 "    B       loc_FFC48AF8 \n"
 121 
 122 "loc_FFC48A00:\n"
 123 "    BL      sub_FFD0B704 \n"
 124 
 125 "loc_FFC48A04:\n"
 126 "    BL      sub_FFC46D00 \n"
 127 "    B       loc_FFC48AF8 \n"
 128 
 129 "loc_FFC48A0C:\n"
 130 "    LDR     R4, [R0, #0xC] \n"
 131 "    BL      sub_FFD0B640 \n"
 132 "    MOV     R0, R4 \n"
 133 "    BL      sub_FFD0BDA8 \n"
 134 "    TST     R0, #1 \n"
 135 "    MOV     R5, R0 \n"
 136 "    BNE     loc_FFC48A4C \n"
 137 "    BL      sub_FFC57098 \n"
 138 "    STR     R0, [R4, #0x14] \n"
 139 "    MOV     R0, R4 \n"
 140 "    BL      sub_FFD0CA20 \n"
 141 "    MOV     R0, R4 \n"
 142 "    BL      sub_FFD0CEF8 \n"
 143 "    MOV     R5, R0 \n"
 144 "    LDR     R0, [R4, #0x14] \n"
 145 "    BL      sub_FFC572A4 \n"
 146 
 147 "loc_FFC48A4C:\n"
 148 "    BL      sub_FFD0B630 \n"
 149 "    MOV     R2, R4 \n"
 150 "    MOV     R1, #9 \n"
 151 "    MOV     R0, R5 \n"
 152 
 153 "loc_FFC48A5C:\n"
 154 "    BL      sub_FFC47080 \n"
 155 "    B       loc_FFC48AF8 \n"
 156 
 157 "loc_FFC48A64:\n"
 158 "    BL      sub_FFD0B764 \n"
 159 "    B       loc_FFC48A04 \n"
 160 
 161 "loc_FFC48A6C:\n"
 162 "    BL      sub_FFD0C024 \n"
 163 "    B       loc_FFC48AF8 \n"
 164 
 165 "loc_FFC48A74:\n"
 166 "    BL      sub_FFD0C20C \n"
 167 "    B       loc_FFC48AF8 \n"
 168 
 169 "loc_FFC48A7C:\n"
 170 "    BL      sub_FFD0C29C \n"
 171 "    B       loc_FFC48AF8 \n"
 172 
 173 "loc_FFC48A84:\n"
 174 "    BL      sub_FFD0C350 \n"
 175 "    B       loc_FFC48AF8 \n"
 176 
 177 "loc_FFC48A8C:\n"
 178 "    MOV     R0, #0 \n"
 179 "    BL      sub_FFD0C4F4 \n"
 180 "    B       loc_FFC48AF8 \n"
 181 
 182 "loc_FFC48A98:\n"
 183 "    BL      sub_FFD0C644 \n"
 184 "    B       loc_FFC48AF8 \n"
 185 
 186 "loc_FFC48AA0:\n"
 187 "    BL      sub_FFD0C6D8 \n"
 188 "    B       loc_FFC48AF8 \n"
 189 
 190 "loc_FFC48AA8:\n"
 191 "    BL      sub_FFD0C7A0 \n"
 192 "    B       loc_FFC48AF8 \n"
 193 
 194 "loc_FFC48AB0:\n"
 195 "    BL      sub_FFD0B900 \n"
 196 "    BL      sub_FFC149A0 \n"
 197 "    B       loc_FFC48AF8 \n"
 198 
 199 "loc_FFC48ABC:\n"
 200 "    BL      sub_FFD0C40C \n"
 201 "    B       loc_FFC48AF8 \n"
 202 
 203 "loc_FFC48AC4:\n"
 204 "    BL      sub_FFD0C450 \n"
 205 "    B       loc_FFC48AF8 \n"
 206 
 207 "loc_FFC48ACC:\n"
 208 "    BL      sub_FFD0E448 \n"
 209 "    B       loc_FFC48AF8 \n"
 210 
 211 "loc_FFC48AD4:\n"
 212 "    BL      sub_FFD0E464 \n"
 213 "    B       loc_FFC48AF8 \n"
 214 
 215 "loc_FFC48ADC:\n"
 216 "    BL      sub_FFD0E474 \n"
 217 "    B       loc_FFC48AF8 \n"
 218 
 219 "loc_FFC48AE4:\n"
 220 "    BL      sub_FFD0E4A0 \n"
 221 "    B       loc_FFC48AF8 \n"
 222 
 223 "loc_FFC48AEC:\n"
 224 "    LDR     R1, =0x58E \n"
 225 "    LDR     R0, =0xFFC485CC /*'SsShootTask.c'*/ \n"
 226 "    BL      _DebugAssert \n"
 227 
 228 "loc_FFC48AF8:\n"
 229 "    LDR     R0, [SP] \n"
 230 "    LDR     R1, [R0, #4] \n"
 231 "    LDR     R0, [R6, #4] \n"
 232 "    BL      sub_FFC173B8 /*_SetEventFlag*/ \n"
 233 "    LDR     R4, [SP] \n"
 234 "    LDR     R0, [R4, #8] \n"
 235 "    CMP     R0, #0 \n"
 236 "    LDREQ   R1, =0x10D \n"
 237 "    LDREQ   R0, =0xFFC485CC /*'SsShootTask.c'*/ \n"
 238 "    BLEQ    _DebugAssert \n"
 239 "    MOV     R0, #0 \n"
 240 "    STR     R0, [R4, #8] \n"
 241 "    B       loc_FFC488AC \n"
 242 );
 243 }
 244 
 245 /*************************************************************/
 246 //** sub_FFD0CAE8_my @ 0xFFD0CAE8 - 0xFFD0CB58, length=29
 247 void __attribute__((naked,noinline)) sub_FFD0CAE8_my() {
 248 asm volatile (
 249 "    STMFD   SP!, {R0-R10,LR} \n"
 250 "    MOV     R6, #0 \n"
 251 "    MOV     R4, R0 \n"
 252 "    BL      sub_FFD0D5E8 \n"
 253 "    MVN     R1, #0 \n"
 254 "    BL      sub_FFC173EC /*_ClearEventFlag*/ \n"
 255 "    MOV     R2, #4 \n"
 256 "    ADD     R1, SP, #8 \n"
 257 "    MOV     R0, #0x8A \n"
 258 "    BL      _GetPropertyCase \n"
 259 "    TST     R0, #1 \n"
 260 "    MOVNE   R1, #0x218 \n"
 261 "    LDRNE   R0, =0xFFD0CCFC /*'SsCaptureSeq.c'*/ \n"
 262 "    BLNE    _DebugAssert \n"
 263 "    LDR     R8, =0x1973C \n"
 264 "    LDR     R5, =0x19690 \n"
 265 "    LDRSH   R1, [R8, #0xE] \n"
 266 "    LDR     R0, [R5, #0x74] \n"
 267 //"  BL      _sub_FFCCB1F0 \n"  // --> Nullsub call removed.
 268 "    BL      _GetCCDTemperature \n"
 269 "    LDR     R2, =0x888C \n"
 270 "    ADD     R3, R4, #0x8C \n"
 271 "    STRH    R0, [R4, #0x88] \n"
 272 "    STRD    R2, [SP] \n"
 273 "    MOV     R1, R0 \n"
 274 "    LDRH    R0, [R5, #0x4C] \n"
 275 "    LDRSH   R2, [R8, #0xC] \n"
 276 "    LDR     R3, =0x8888 \n"
 277 "    BL      sub_FFD0DAD4 \n"
 278 "    BL      wait_until_remote_button_is_released\n" // added
 279 "    BL      capt_seq_hook_set_nr\n"                 // added
 280 "    LDR     PC, =0xFFD0CB5C \n"  // Continue in firmware
 281 );
 282 }
 283 
 284 /*************************************************************/
 285 //** exp_drv_task @ 0xFFC900B8 - 0xFFC906A8, length=381
 286 void __attribute__((naked,noinline)) exp_drv_task() {
 287 asm volatile (
 288 "    STMFD   SP!, {R4-R8,LR} \n"
 289 "    SUB     SP, SP, #0x20 \n"
 290 "    LDR     R8, =0xBB8 \n"
 291 "    LDR     R7, =0x64D4 \n"
 292 "    LDR     R5, =0x3D3DC \n"
 293 "    MOV     R0, #0 \n"
 294 "    ADD     R6, SP, #0x10 \n"
 295 "    STR     R0, [SP, #0xC] \n"
 296 
 297 "loc_FFC900D8:\n"
 298 "    LDR     R0, [R7, #0x20] \n"
 299 "    MOV     R2, #0 \n"
 300 "    ADD     R1, SP, #0x1C \n"
 301 "    BL      sub_FFC1763C /*_ReceiveMessageQueue*/ \n"
 302 "    LDR     R0, [SP, #0xC] \n"
 303 "    CMP     R0, #1 \n"
 304 "    BNE     loc_FFC90120 \n"
 305 "    LDR     R0, [SP, #0x1C] \n"
 306 "    LDR     R0, [R0] \n"
 307 "    CMP     R0, #0x13 \n"
 308 "    CMPNE   R0, #0x14 \n"
 309 "    CMPNE   R0, #0x15 \n"
 310 "    BEQ     loc_FFC9023C \n"
 311 "    CMP     R0, #0x27 \n"
 312 "    BEQ     loc_FFC90214 \n"
 313 "    ADD     R1, SP, #0xC \n"
 314 "    MOV     R0, #0 \n"
 315 "    BL      sub_FFC90068 \n"
 316 
 317 "loc_FFC90120:\n"
 318 "    LDR     R0, [SP, #0x1C] \n"
 319 "    LDR     R1, [R0] \n"
 320 "    CMP     R1, #0x2C \n"
 321 "    BNE     loc_FFC90150 \n"
 322 "    LDR     R0, [SP, #0x1C] \n"
 323 "    BL      sub_FFC9131C \n"
 324 "    LDR     R0, [R7, #0x1C] \n"
 325 "    MOV     R1, #1 \n"
 326 "    BL      sub_FFC173B8 /*_SetEventFlag*/ \n"
 327 "    BL      _ExitTask \n"
 328 "    ADD     SP, SP, #0x20 \n"
 329 "    LDMFD   SP!, {R4-R8,PC} \n"
 330 
 331 "loc_FFC90150:\n"
 332 "    CMP     R1, #0x2B \n"
 333 "    BNE     loc_FFC9016C \n"
 334 "    LDR     R2, [R0, #0x88]! \n"
 335 "    LDR     R1, [R0, #4] \n"
 336 "    MOV     R0, R1 \n"
 337 "    BLX     R2 \n"
 338 "    B       loc_FFC906A0 \n"
 339 
 340 "loc_FFC9016C:\n"
 341 "    CMP     R1, #0x25 \n"
 342 "    BNE     loc_FFC901BC \n"
 343 "    LDR     R0, [R7, #0x1C] \n"
 344 "    MOV     R1, #0x80 \n"
 345 "    BL      sub_FFC173EC /*_ClearEventFlag*/ \n"
 346 "    LDR     R0, =0xFFC8CB5C \n"
 347 "    MOV     R1, #0x80 \n"
 348 "    BL      sub_FFD02FE0 \n"
 349 "    LDR     R0, [R7, #0x1C] \n"
 350 "    MOV     R2, R8 \n"
 351 "    MOV     R1, #0x80 \n"
 352 "    BL      sub_FFC172F0 /*_WaitForAllEventFlag*/ \n"
 353 "    TST     R0, #1 \n"
 354 "    LDRNE   R1, =0xD1B \n"
 355 "    BNE     loc_FFC90200 \n"
 356 
 357 "loc_FFC901A8:\n"
 358 "    LDR     R1, [SP, #0x1C] \n"
 359 "    LDR     R0, [R1, #0x8C] \n"
 360 "    LDR     R1, [R1, #0x88] \n"
 361 "    BLX     R1 \n"
 362 "    B       loc_FFC906A0 \n"
 363 
 364 "loc_FFC901BC:\n"
 365 "    CMP     R1, #0x26 \n"
 366 "    BNE     loc_FFC9020C \n"
 367 "    ADD     R1, SP, #0xC \n"
 368 "    BL      sub_FFC90068 \n"
 369 "    LDR     R0, [R7, #0x1C] \n"
 370 "    MOV     R1, #0x100 \n"
 371 "    BL      sub_FFC173EC /*_ClearEventFlag*/ \n"
 372 "    LDR     R0, =0xFFC8CB6C \n"
 373 "    MOV     R1, #0x100 \n"
 374 "    BL      sub_FFD03268 \n"
 375 "    LDR     R0, [R7, #0x1C] \n"
 376 "    MOV     R2, R8 \n"
 377 "    MOV     R1, #0x100 \n"
 378 "    BL      sub_FFC172F0 /*_WaitForAllEventFlag*/ \n"
 379 "    TST     R0, #1 \n"
 380 "    BEQ     loc_FFC901A8 \n"
 381 "    LDR     R1, =0xD25 \n"
 382 
 383 "loc_FFC90200:\n"
 384 "    LDR     R0, =0xFFC8D25C /*'ExpDrv.c'*/ \n"
 385 "    BL      _DebugAssert \n"
 386 "    B       loc_FFC901A8 \n"
 387 
 388 "loc_FFC9020C:\n"
 389 "    CMP     R1, #0x27 \n"
 390 "    BNE     loc_FFC90224 \n"
 391 
 392 "loc_FFC90214:\n"
 393 "    LDR     R0, [SP, #0x1C] \n"
 394 "    ADD     R1, SP, #0xC \n"
 395 "    BL      sub_FFC90068 \n"
 396 "    B       loc_FFC901A8 \n"
 397 
 398 "loc_FFC90224:\n"
 399 "    CMP     R1, #0x2A \n"
 400 "    BNE     loc_FFC9023C \n"
 401 "    BL      sub_FFC6FF10 \n"
 402 "    BL      sub_FFC70CDC \n"
 403 "    BL      sub_FFC70760 \n"
 404 "    B       loc_FFC901A8 \n"
 405 
 406 "loc_FFC9023C:\n"
 407 "    LDR     R0, [SP, #0x1C] \n"
 408 "    MOV     R4, #1 \n"
 409 "    LDR     R1, [R0] \n"
 410 "    CMP     R1, #0x11 \n"
 411 "    CMPNE   R1, #0x12 \n"
 412 "    BNE     loc_FFC902AC \n"
 413 "    LDR     R1, [R0, #0x7C] \n"
 414 "    ADD     R1, R1, R1, LSL#1 \n"
 415 "    ADD     R1, R0, R1, LSL#2 \n"
 416 "    SUB     R1, R1, #8 \n"
 417 "    LDMIA   R1, {R2-R4} \n"
 418 "    STMIA   R6, {R2-R4} \n"
 419 "    BL      sub_FFC8EBE8 \n"
 420 "    LDR     R0, [SP, #0x1C] \n"
 421 "    LDR     R1, [R0, #0x7C] \n"
 422 "    LDR     R3, [R0, #0x88] \n"
 423 "    LDR     R2, [R0, #0x8C] \n"
 424 "    ADD     R0, R0, #4 \n"
 425 "    BLX     R3 \n"
 426 "    LDR     R0, [SP, #0x1C] \n"
 427 "    BL      sub_FFC916F4 \n"
 428 "    LDR     R0, [SP, #0x1C] \n"
 429 "    LDR     R1, [R0, #0x7C] \n"
 430 "    LDR     R3, [R0, #0x90] \n"
 431 "    LDR     R2, [R0, #0x94] \n"
 432 "    ADD     R0, R0, #4 \n"
 433 "    BLX     R3 \n"
 434 "    B       loc_FFC905E0 \n"
 435 
 436 "loc_FFC902AC:\n"
 437 "    CMP     R1, #0x13 \n"
 438 "    CMPNE   R1, #0x14 \n"
 439 "    CMPNE   R1, #0x15 \n"
 440 "    BNE     loc_FFC90360 \n"
 441 "    ADD     R3, SP, #0xC \n"
 442 "    MOV     R2, SP \n"
 443 "    ADD     R1, SP, #0x10 \n"
 444 "    BL      sub_FFC8EE30 \n"
 445 "    CMP     R0, #1 \n"
 446 "    MOV     R4, R0 \n"
 447 "    CMPNE   R4, #5 \n"
 448 "    BNE     loc_FFC902FC \n"
 449 "    LDR     R0, [SP, #0x1C] \n"
 450 "    MOV     R2, R4 \n"
 451 "    LDR     R1, [R0, #0x7C]! \n"
 452 "    LDR     R12, [R0, #0xC]! \n"
 453 "    LDR     R3, [R0, #4] \n"
 454 "    MOV     R0, SP \n"
 455 "    BLX     R12 \n"
 456 "    B       loc_FFC90334 \n"
 457 
 458 "loc_FFC902FC:\n"
 459 "    LDR     R0, [SP, #0x1C] \n"
 460 "    CMP     R4, #2 \n"
 461 "    LDR     R3, [R0, #0x8C] \n"
 462 "    CMPNE   R4, #6 \n"
 463 "    BNE     loc_FFC90348 \n"
 464 "    LDR     R12, [R0, #0x88] \n"
 465 "    MOV     R0, SP \n"
 466 "    MOV     R2, R4 \n"
 467 "    MOV     R1, #1 \n"
 468 "    BLX     R12 \n"
 469 "    LDR     R0, [SP, #0x1C] \n"
 470 "    MOV     R2, SP \n"
 471 "    ADD     R1, SP, #0x10 \n"
 472 "    BL      sub_FFC8FDB4 \n"
 473 
 474 "loc_FFC90334:\n"
 475 "    LDR     R0, [SP, #0x1C] \n"
 476 "    LDR     R2, [SP, #0xC] \n"
 477 "    MOV     R1, R4 \n"
 478 "    BL      sub_FFC90008 \n"
 479 "    B       loc_FFC905E0 \n"
 480 
 481 "loc_FFC90348:\n"
 482 "    LDR     R1, [R0, #0x7C] \n"
 483 "    LDR     R12, [R0, #0x88] \n"
 484 "    ADD     R0, R0, #4 \n"
 485 "    MOV     R2, R4 \n"
 486 "    BLX     R12 \n"
 487 "    B       loc_FFC905E0 \n"
 488 
 489 "loc_FFC90360:\n"
 490 "    CMP     R1, #0x21 \n"
 491 "    CMPNE   R1, #0x22 \n"
 492 "    BNE     loc_FFC903AC \n"
 493 "    LDR     R1, [R0, #0x7C] \n"
 494 "    ADD     R1, R1, R1, LSL#1 \n"
 495 "    ADD     R1, R0, R1, LSL#2 \n"
 496 "    SUB     R1, R1, #8 \n"
 497 "    LDMIA   R1, {R2-R4} \n"
 498 "    STMIA   R6, {R2-R4} \n"
 499 "    BL      sub_FFC8E174 \n"
 500 "    LDR     R0, [SP, #0x1C] \n"
 501 "    LDR     R1, [R0, #0x7C] \n"
 502 "    LDR     R3, [R0, #0x88] \n"
 503 "    LDR     R2, [R0, #0x8C] \n"
 504 "    ADD     R0, R0, #4 \n"
 505 "    BLX     R3 \n"
 506 "    LDR     R0, [SP, #0x1C] \n"
 507 "    BL      sub_FFC8E464 \n"
 508 "    B       loc_FFC905E0 \n"
 509 
 510 "loc_FFC903AC:\n"
 511 "    ADD     R1, R0, #4 \n"
 512 "    LDMIA   R1, {R2,R3,R12} \n"
 513 "    STMIA   R6, {R2,R3,R12} \n"
 514 "    LDR     R1, [R0] \n"
 515 "    CMP     R1, #0x24 \n"
 516 "    ADDLS   PC, PC, R1, LSL#2 \n"
 517 "    B       loc_FFC905C0 \n"
 518 "    B       loc_FFC9045C \n"
 519 "    B       loc_FFC9045C \n"
 520 "    B       loc_FFC90464 \n"
 521 "    B       loc_FFC9046C \n"
 522 "    B       loc_FFC9046C \n"
 523 "    B       loc_FFC9046C \n"
 524 "    B       loc_FFC9045C \n"
 525 "    B       loc_FFC90464 \n"
 526 "    B       loc_FFC9046C \n"
 527 "    B       loc_FFC9046C \n"
 528 "    B       loc_FFC904C8 \n"
 529 "    B       loc_FFC904C8 \n"
 530 "    B       loc_FFC905B4 \n"
 531 "    B       loc_FFC905BC \n"
 532 "    B       loc_FFC905BC \n"
 533 "    B       loc_FFC905BC \n"
 534 "    B       loc_FFC905BC \n"
 535 "    B       loc_FFC905C0 \n"
 536 "    B       loc_FFC905C0 \n"
 537 "    B       loc_FFC905C0 \n"
 538 "    B       loc_FFC905C0 \n"
 539 "    B       loc_FFC905C0 \n"
 540 "    B       loc_FFC90474 \n"
 541 "    B       loc_FFC9047C \n"
 542 "    B       loc_FFC9047C \n"
 543 "    B       loc_FFC904D4 \n"
 544 "    B       loc_FFC904D4 \n"
 545 "    B       loc_FFC904DC \n"
 546 "    B       loc_FFC9050C \n"
 547 "    B       loc_FFC9053C \n"
 548 "    B       loc_FFC9056C \n"
 549 "    B       loc_FFC9059C \n"
 550 "    B       loc_FFC9059C \n"
 551 "    B       loc_FFC905C0 \n"
 552 "    B       loc_FFC905C0 \n"
 553 "    B       loc_FFC905A4 \n"
 554 "    B       loc_FFC905AC \n"
 555 
 556 "loc_FFC9045C:\n"
 557 "    BL      sub_FFC8D044 \n"
 558 "    B       loc_FFC905C0 \n"
 559 
 560 "loc_FFC90464:\n"
 561 "    BL      sub_FFC8D2D4 \n"
 562 "    B       loc_FFC905C0 \n"
 563 
 564 "loc_FFC9046C:\n"
 565 "    BL      sub_FFC8D4D8 \n"
 566 "    B       loc_FFC905C0 \n"
 567 
 568 "loc_FFC90474:\n"
 569 "    BL      sub_FFC8D740 \n"
 570 "    B       loc_FFC905C0 \n"
 571 
 572 "loc_FFC9047C:\n"
 573 "    BL      sub_FFC8D934 \n"
 574 "    B       loc_FFC905C0 \n"
 575 
 576 "loc_FFC904C8:\n"
 577 "    BL      sub_FFC8DB9C_my \n"  // --> Patched. Old value = 0xFFC8DB9C.
 578 "    MOV     R4, #0 \n"
 579 "    B       loc_FFC905C0 \n"
 580 
 581 "loc_FFC904D4:\n"
 582 "    BL      sub_FFC8DCD8 \n"
 583 "    B       loc_FFC905C0 \n"
 584 
 585 "loc_FFC904DC:\n"
 586 "    LDRH    R1, [R0, #4] \n"
 587 "    STRH    R1, [SP, #0x10] \n"
 588 "    LDRH    R1, [R5, #2] \n"
 589 "    STRH    R1, [SP, #0x12] \n"
 590 "    LDRH    R1, [R5, #4] \n"
 591 "    STRH    R1, [SP, #0x14] \n"
 592 "    LDRH    R1, [R5, #6] \n"
 593 "    STRH    R1, [SP, #0x16] \n"
 594 "    LDRH    R1, [R0, #0xC] \n"
 595 "    STRH    R1, [SP, #0x18] \n"
 596 "    BL      sub_FFC91390 \n"
 597 "    B       loc_FFC905C0 \n"
 598 
 599 "loc_FFC9050C:\n"
 600 "    LDRH    R1, [R0, #4] \n"
 601 "    STRH    R1, [SP, #0x10] \n"
 602 "    LDRH    R1, [R5, #2] \n"
 603 "    STRH    R1, [SP, #0x12] \n"
 604 "    LDRH    R1, [R5, #4] \n"
 605 "    STRH    R1, [SP, #0x14] \n"
 606 "    LDRH    R1, [R5, #6] \n"
 607 "    STRH    R1, [SP, #0x16] \n"
 608 "    LDRH    R1, [R5, #8] \n"
 609 "    STRH    R1, [SP, #0x18] \n"
 610 "    BL      sub_FFC91510 \n"
 611 "    B       loc_FFC905C0 \n"
 612 
 613 "loc_FFC9053C:\n"
 614 "    LDRH    R1, [R5] \n"
 615 "    STRH    R1, [SP, #0x10] \n"
 616 "    LDRH    R1, [R0, #6] \n"
 617 "    STRH    R1, [SP, #0x12] \n"
 618 "    LDRH    R1, [R5, #4] \n"
 619 "    STRH    R1, [SP, #0x14] \n"
 620 "    LDRH    R1, [R5, #6] \n"
 621 "    STRH    R1, [SP, #0x16] \n"
 622 "    LDRH    R1, [R5, #8] \n"
 623 "    STRH    R1, [SP, #0x18] \n"
 624 "    BL      sub_FFC915BC \n"
 625 "    B       loc_FFC905C0 \n"
 626 
 627 "loc_FFC9056C:\n"
 628 "    LDRH    R1, [R5] \n"
 629 "    STRH    R1, [SP, #0x10] \n"
 630 "    LDRH    R1, [R5, #2] \n"
 631 "    STRH    R1, [SP, #0x12] \n"
 632 "    LDRH    R1, [R5, #4] \n"
 633 "    STRH    R1, [SP, #0x14] \n"
 634 "    LDRH    R1, [R5, #6] \n"
 635 "    STRH    R1, [SP, #0x16] \n"
 636 "    LDRH    R1, [R0, #0xC] \n"
 637 "    STRH    R1, [SP, #0x18] \n"
 638 "    BL      sub_FFC9165C \n"
 639 "    B       loc_FFC905C0 \n"
 640 
 641 "loc_FFC9059C:\n"
 642 "    BL      sub_FFC8DF4C \n"
 643 "    B       loc_FFC905C0 \n"
 644 
 645 "loc_FFC905A4:\n"
 646 "    BL      sub_FFC8E568 \n"
 647 "    B       loc_FFC905C0 \n"
 648 
 649 "loc_FFC905AC:\n"
 650 "    BL      sub_FFC8E7A0 \n"
 651 "    B       loc_FFC905C0 \n"
 652 
 653 "loc_FFC905B4:\n"
 654 "    BL      sub_FFC8E918 \n"
 655 "    B       loc_FFC905C0 \n"
 656 
 657 "loc_FFC905BC:\n"
 658 "    BL      sub_FFC8EAB0 \n"
 659 
 660 "loc_FFC905C0:\n"
 661 "    LDR     R0, [SP, #0x1C] \n"
 662 "    LDR     R1, [R0, #0x7C] \n"
 663 "    LDR     R3, [R0, #0x88] \n"
 664 "    LDR     R2, [R0, #0x8C] \n"
 665 "    ADD     R0, R0, #4 \n"
 666 "    BLX     R3 \n"
 667 "    CMP     R4, #1 \n"
 668 "    BNE     loc_FFC90628 \n"
 669 
 670 "loc_FFC905E0:\n"
 671 "    LDR     R0, [SP, #0x1C] \n"
 672 "    MOV     R2, #0xC \n"
 673 "    LDR     R1, [R0, #0x7C] \n"
 674 "    ADD     R1, R1, R1, LSL#1 \n"
 675 "    ADD     R0, R0, R1, LSL#2 \n"
 676 "    SUB     R4, R0, #8 \n"
 677 "    LDR     R0, =0x3D3DC \n"
 678 "    ADD     R1, SP, #0x10 \n"
 679 "    BL      sub_FFE4E008 \n"
 680 "    LDR     R0, =0x3D3E8 \n"
 681 "    MOV     R2, #0xC \n"
 682 "    ADD     R1, SP, #0x10 \n"
 683 "    BL      sub_FFE4E008 \n"
 684 "    LDR     R0, =0x3D3F4 \n"
 685 "    MOV     R2, #0xC \n"
 686 "    MOV     R1, R4 \n"
 687 "    BL      sub_FFE4E008 \n"
 688 "    B       loc_FFC906A0 \n"
 689 
 690 "loc_FFC90628:\n"
 691 "    LDR     R0, [SP, #0x1C] \n"
 692 "    LDR     R0, [R0] \n"
 693 "    CMP     R0, #0xB \n"
 694 "    BNE     loc_FFC90670 \n"
 695 "    MOV     R3, #0 \n"
 696 "    STR     R3, [SP] \n"
 697 "    MOV     R3, #1 \n"
 698 "    MOV     R2, #1 \n"
 699 "    MOV     R1, #1 \n"
 700 "    MOV     R0, #0 \n"
 701 "    BL      sub_FFC8CE4C \n"
 702 "    MOV     R3, #0 \n"
 703 "    STR     R3, [SP] \n"
 704 "    MOV     R3, #1 \n"
 705 "    MOV     R2, #1 \n"
 706 "    MOV     R1, #1 \n"
 707 "    MOV     R0, #0 \n"
 708 "    B       loc_FFC9069C \n"
 709 
 710 "loc_FFC90670:\n"
 711 "    MOV     R3, #1 \n"
 712 "    MOV     R2, #1 \n"
 713 "    MOV     R1, #1 \n"
 714 "    MOV     R0, #1 \n"
 715 "    STR     R3, [SP] \n"
 716 "    BL      sub_FFC8CE4C \n"
 717 "    MOV     R3, #1 \n"
 718 "    MOV     R2, #1 \n"
 719 "    MOV     R1, #1 \n"
 720 "    MOV     R0, #1 \n"
 721 "    STR     R3, [SP] \n"
 722 
 723 "loc_FFC9069C:\n"
 724 "    BL      sub_FFC8CF8C \n"
 725 
 726 "loc_FFC906A0:\n"
 727 "    LDR     R0, [SP, #0x1C] \n"
 728 "    BL      sub_FFC9131C \n"
 729 "    B       loc_FFC900D8 \n"
 730 );
 731 }
 732 
 733 /*************************************************************/
 734 //** sub_FFC8DB9C_my @ 0xFFC8DB9C - 0xFFC8DC58, length=48
 735 void __attribute__((naked,noinline)) sub_FFC8DB9C_my() {
 736 asm volatile (
 737 "    STMFD   SP!, {R4-R8,LR} \n"
 738 "    LDR     R7, =0x64D4 \n"
 739 "    MOV     R4, R0 \n"
 740 "    LDR     R0, [R7, #0x1C] \n"
 741 "    MOV     R1, #0x3E \n"
 742 "    BL      sub_FFC173EC /*_ClearEventFlag*/ \n"
 743 "    LDRSH   R0, [R4, #4] \n"
 744 "    MOV     R2, #0 \n"
 745 "    MOV     R1, #0 \n"
 746 "    BL      sub_FFC8CBE0 \n"
 747 "    MOV     R6, R0 \n"
 748 "    LDRSH   R0, [R4, #6] \n"
 749 "    BL      sub_FFC8CCEC \n"
 750 "    LDRSH   R0, [R4, #8] \n"
 751 "    BL      sub_FFC8CD44 \n"
 752 "    LDRSH   R0, [R4, #0xA] \n"
 753 "    BL      sub_FFC8CD9C \n"
 754 "    LDRSH   R0, [R4, #0xC] \n"
 755 "    BL      sub_FFC8CDF4 \n"
 756 "    MOV     R5, R0 \n"
 757 "    LDR     R0, [R4] \n"
 758 "    LDR     R8, =0x3D3F4 \n"
 759 "    CMP     R0, #0xB \n"
 760 "    MOVEQ   R6, #0 \n"
 761 "    MOVEQ   R5, #0 \n"
 762 "    BEQ     loc_FFC8DC2C \n"
 763 "    CMP     R6, #1 \n"
 764 "    BNE     loc_FFC8DC2C \n"
 765 "    LDRSH   R0, [R4, #4] \n"
 766 "    LDR     R1, =0xFFC8CB4C \n"
 767 "    MOV     R2, #2 \n"
 768 "    BL      sub_FFD03134 \n"
 769 "    STRH    R0, [R4, #4] \n"
 770 "    MOV     R0, #0 \n"
 771 "    STR     R0, [R7, #0x28] \n"
 772 "    B       loc_FFC8DC34 \n"
 773 
 774 "loc_FFC8DC2C:\n"
 775 "    LDRH    R0, [R8] \n"
 776 "    STRH    R0, [R4, #4] \n"
 777 
 778 "loc_FFC8DC34:\n"
 779 "    CMP     R5, #1 \n"
 780 "    LDRNEH  R0, [R8, #8] \n"
 781 "    BNE     loc_FFC8DC50 \n"
 782 "    LDRSH   R0, [R4, #0xC] \n"
 783 "    MOV     R2, #0x20 \n"
 784 "    LDR     R1, =0xFFC8CBD0 \n"
 785 "    BL      sub_FFC9134C \n"
 786 
 787 "loc_FFC8DC50:\n"
 788 "    STRH    R0, [R4, #0xC] \n"
 789 "    LDRSH   R0, [R4, #6] \n"
 790 "    BL      sub_FFC6FC5C_my \n"  // --> Patched. Old value = 0xFFC6FC5C.
 791 "    LDR     PC, =0xFFC8DC5C \n"  // Continue in firmware
 792 );
 793 }
 794 
 795 /*************************************************************/
 796 //** sub_FFC6FC5C_my @ 0xFFC6FC5C - 0xFFC6FCC4, length=27
 797 void __attribute__((naked,noinline)) sub_FFC6FC5C_my() {
 798 asm volatile (
 799 "    STMFD   SP!, {R4-R6,LR} \n"
 800 "    LDR     R5, =0x5FAC \n"
 801 "    MOV     R4, R0 \n"
 802 "    LDR     R0, [R5, #4] \n"
 803 "    CMP     R0, #1 \n"
 804 "    LDRNE   R1, =0x16D \n"
 805 "    LDRNE   R0, =0xFFC6F9F4 /*'Shutter.c'*/ \n"
 806 "    BLNE    _DebugAssert \n"
 807 "    CMN     R4, #0xC00 \n"
 808 "    LDREQSH R4, [R5, #2] \n"
 809 "    CMN     R4, #0xC00 \n"
 810 "    LDREQ   R1, =0x173 \n"
 811 "    LDREQ   R0, =0xFFC6F9F4 /*'Shutter.c'*/ \n"
 812 "    STRH    R4, [R5, #2] \n"
 813 "    BLEQ    _DebugAssert \n"
 814 "    MOV     R0, R4 \n"
 815 "    BL      apex2us \n"  // --> Patched. Old value = _apex2us.
 816 "    MOV     R4, R0 \n"
 817 //"  BL      _sub_FFC9E864 \n"  // --> Nullsub call removed.
 818 "    MOV     R0, R4 \n"
 819 "    BL      sub_FFCA25DC \n"
 820 "    TST     R0, #1 \n"
 821 "    LDMNEFD SP!, {R4-R6,LR} \n"
 822 "    MOVNE   R1, #0x178 \n"
 823 "    LDRNE   R0, =0xFFC6F9F4 /*'Shutter.c'*/ \n"
 824 "    BNE     _DebugAssert \n"
 825 "    LDMFD   SP!, {R4-R6,PC} \n"
 826 );
 827 }

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