This source file includes following definitions.
- sub_FF941BA0_my
- sub_FF9432B8_my
- capt_seq_task
- exp_drv_task
- sub_FF8F54A0_my
- sub_FF8A90B0_my
1 #include "lolevel.h"
2 #include "platform.h"
3 #include "core.h"
4
5 #define NR_ON (2)
6 #define NR_OFF (1)
7 #define NR_AUTO (0)
8
9 static long *nrflag = (long*)0x5cdc;
10
11 #include "../../../generic/capt_seq.c"
12
13
14
15
16
17
18
19 void __attribute__((naked,noinline)) sub_FF941BA0_my( ) {
20 asm volatile (
21 " STMFD SP!, {R4,R5,LR} \n"
22 " BL sub_FF98A850 \n"
23 " LDR R5, =0x5B94 \n"
24 " LDR R3, =0x5B90 \n"
25 " MOV R2, #0x1C \n"
26 " LDR R1, [R3] \n"
27 " MOV R0, R5 \n"
28 " BL sub_FFABC2F8 \n"
29 " BL sub_FF82CF00 \n"
30 " LDR R4, =0x5BB0 \n"
31 " MOV R3, R0 \n"
32 " LDR R12, [R4] \n"
33 " MOV R2, #0x154 \n"
34 " TST R3, #1 \n"
35 " LDR R1, =0xFF941B94 \n"
36 " ADD R2, R2, #3 \n"
37 " LDR R0, =0xFF941B5C \n"
38 " STR R3, [R12, #4] \n"
39 " BEQ loc_FF941BF0 \n"
40 " BL sub_FF814C10 \n"
41 "loc_FF941BF0:\n"
42 " BL sub_FFA4872C \n"
43 " LDR R2, [R4] \n"
44 " LDR R3, =0x5B74 \n"
45 " STRH R0, [R2, #0x14] \n"
46 " LDR R1, [R3] \n"
47 " LDRH R0, [R1, #0x10] \n"
48 " LDRSH R1, [R2, #0x14] \n"
49 " LDRSH R2, [R5, #8] \n"
50 "BL capt_seq_hook_set_nr\n"
51 " BL sub_FF946310 \n"
52 " LDR R3, =0x5B70 \n"
53 " LDR R2, [R3] \n"
54 " LDR R1, [R2, #4] \n"
55 " LDR R2, =0x5B8C \n"
56 " CMP R1, #2 \n"
57 " STR R0, [R2] \n"
58 " MOVEQ R3, #0 \n"
59 " STREQ R3, [R2] \n"
60 " LDMFD SP!, {R4,R5,PC} \n"
61 );
62 }
63
64
65 void __attribute__((naked,noinline)) sub_FF9432B8_my( ) {
66 asm volatile (
67 " STMFD SP!, {R4-R6,LR} \n"
68 " LDR R3, =0x5B70 \n"
69 " LDR R2, [R3] \n"
70 " CMP R2, #0 \n"
71 " BEQ loc_FF9432FC \n"
72 " LDR R3, =0x5B90 \n"
73 " LDR R2, [R3] \n"
74 " CMP R2, #0 \n"
75 " BEQ loc_FF9432FC \n"
76 " LDR R3, =0x5B74 \n"
77 " LDR R2, [R3] \n"
78 " CMP R2, #0 \n"
79 " BEQ loc_FF9432FC \n"
80 " LDR R3, =0x5BB0 \n"
81 " LDR R2, [R3] \n"
82 " CMP R2, #0 \n"
83 " BNE loc_FF943310 \n"
84 "loc_FF9432FC:\n"
85 " MOV R2, #0x520 \n"
86 " LDR R0, =0xFF9431DC \n"
87 " LDR R1, =0xFF941B94 \n"
88 " ADD R2, R2, #2 \n"
89 " BL sub_FF814C10 \n"
90 "loc_FF943310:\n"
91 " BL sub_FF941A14 \n"
92 " CMP R0, #0 \n"
93 " BNE loc_FF94334C \n"
94 " LDR R3, =0x5B90 \n"
95 " LDR R2, [R3] \n"
96 " LDR R1, [R2, #4] \n"
97 " CMP R1, #0 \n"
98 " BEQ loc_FF94334C \n"
99 " LDR R0, =0xFF943264 \n"
100 " BL sub_FFAC03C4 \n"
101 " LDR R0, =0xFF943284 \n"
102 " BL sub_FFAC03C4 \n"
103 " BL sub_FF941A48 \n"
104 " LDR R0, =0xFF9432A8 \n"
105 " BL sub_FFAC03C4 \n"
106 "loc_FF94334C:\n"
107 " LDR R3, =0x6763C \n"
108 " MVN R4, #0 \n"
109 " LDR R0, [R3] \n"
110 " MOV R1, R4 \n"
111 " BL sub_FF821CB4 \n"
112 " LDR R3, =0x67640 \n"
113 " MOV R1, R4 \n"
114 " LDR R0, [R3] \n"
115 " BL sub_FF821CB4 \n"
116
117 "BL shooting_expo_param_override\n"
118 " LDR R3, =0x5B80 \n"
119 " LDR R3, [R3] \n"
120 " CMP R3, #1 \n"
121 " CMPNE R3, #3 \n"
122 " BEQ loc_FF9433C0 \n"
123 " CMP R3, #4 \n"
124 " BEQ loc_FF9433C0 \n"
125 " LDR R3, =0x5B74 \n"
126 " LDR R2, [R3] \n"
127 " LDRH R1, [R2, #2] \n"
128 " CMP R1, #1 \n"
129 " BNE loc_FF9433BC \n"
130 " LDR R3, =0x5BB0 \n"
131 " LDR R2, [R3] \n"
132 " LDR R1, [R2, #8] \n"
133 " CMP R1, #1 \n"
134 " BLS loc_FF9433BC \n"
135 " BL sub_FF942354 \n"
136 " B loc_FF9433C0 \n"
137 "loc_FF9433BC:\n"
138 " BL sub_FF942984 \n"
139 "loc_FF9433C0:\n"
140 " BL sub_FF942C6C \n"
141 " MOV R4, R0 \n"
142 " TST R4, #1 \n"
143 " BEQ loc_FF943404 \n"
144 " LDR R6, =0x5BC4 \n"
145 " LDR R2, [R6] \n"
146 " CMP R2, #0 \n"
147 " BEQ loc_FF9433F0 \n"
148 " LDR R3, =0x5BC8 \n"
149 " LDR R1, [R3] \n"
150 " MOV LR, PC \n"
151 " MOV PC, R2 \n"
152 "loc_FF9433F0:\n"
153 " LDR R5, =0x67638 \n"
154 " MOV R1, #2 \n"
155 " LDR R0, [R5] \n"
156 " BL sub_FF821B20 \n"
157 " B loc_FF94340C \n"
158 "loc_FF943404:\n"
159 " LDR R6, =0x5BC4 \n"
160 " LDR R5, =0x67638 \n"
161 "loc_FF94340C:\n"
162 " BL sub_FF941BA0_my \n"
163 " LDR R3, =0x5BB4 \n"
164 " LDR R2, [R3] \n"
165 " CMP R2, #0 \n"
166 " BEQ loc_FF943434 \n"
167 " LDR R3, =0x5BB8 \n"
168 " MOV R0, R4 \n"
169 " LDR R1, [R3] \n"
170 " MOV LR, PC \n"
171 " MOV PC, R2 \n"
172 "loc_FF943434:\n"
173 " BL sub_FF942E68 \n"
174 " BL sub_FF942F54 \n"
175 " BL sub_FF942FFC \n"
176 "BL capt_seq_hook_raw_here\n"
177 " LDR R2, [R6] \n"
178 " CMP R2, #0 \n"
179 " BEQ loc_FF94345C \n"
180 " LDR R3, =0x5BC8 \n"
181 " LDR R1, [R3] \n"
182 " MOV LR, PC \n"
183 " MOV PC, R2 \n"
184 "loc_FF94345C:\n"
185 " LDR R0, [R5] \n"
186 " MOV R1, #2 \n"
187 " LDMFD SP!, {R4-R6,LR} \n"
188 " B sub_FF821B20 \n"
189 );
190 }
191
192
193 void __attribute__((naked,noinline)) capt_seq_task()
194 {
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211 asm volatile (
212 " STMFD SP!, {R4,R5,LR} \n"
213 " SUB SP, SP, #4 \n"
214
215 " LDR R4, =0x5bd0\n"
216 " LDR R5, =sub_FF9432B8_my\n"
217 " STR R5, [R4, #4]\n"
218
219 " MOV R5, SP \n"
220 " B loc_FF944B78 \n"
221 "loc_FF944B58:\n"
222 " LDR R12, [SP] \n"
223 " CMP R12, #0xD \n"
224 " BLS loc_FF944B6C \n"
225 " BL sub_FF814C10 \n"
226 " LDR R12, [SP] \n"
227 "loc_FF944B6C:\n"
228 " STMFD SP!, {R0}\n"
229 " MOV R0, R12\n"
230 " BL set_shooting_status\n"
231 " LDMFD SP!, {R0}\n"
232 " LDR R3, =0x5BD0 \n"
233 " MOV LR, PC \n"
234 " LDR PC, [R3, R12, LSL #2] \n"
235 "loc_FF944B78:\n"
236 " LDR R3, =0x67644 \n"
237 " MOV R12, #0 \n"
238 " LDR R4, =0x5B7C \n"
239 " MOV R2, R12 \n"
240 " MOV R1, R5 \n"
241 " LDR R0, [R3] \n"
242 " STR R12, [R4] \n"
243 " BL sub_FF822320 \n"
244 " MOV R2, #0x7B0 \n"
245 " TST R0, #1 \n"
246 " LDR R1, =0xFF941B94 \n"
247 " ADD R2, R2, #5 \n"
248 " LDR R0, =0xFF944B30 \n"
249 " BEQ loc_FF944B58 \n"
250 " BL sub_FF823B44 \n"
251 " ADD SP, SP, #4 \n"
252 " LDMFD SP!, {R4,R5,PC} \n"
253 );
254 }
255
256
257
258 void __attribute__((naked,noinline)) exp_drv_task() {
259 asm volatile (
260 " STMFD SP!, {R4-R6,LR} \n"
261 " SUB SP, SP, #0xC \n"
262 " MOV R5, SP \n"
263 " B loc_FF8F5EA8 \n"
264
265 "loc_FF8F5CD0:\n"
266 " CMP R3, #0x11 \n"
267 " BNE loc_FF8F5CE8 \n"
268 " LDR R0, [R2, #0x2C] \n"
269 " MOV LR, PC \n"
270 " LDR PC, [R2, #0x28] \n"
271 " B loc_FF8F5D18 \n"
272
273 "loc_FF8F5CE8:\n"
274 " CMP R3, #0xF \n"
275 " BNE loc_FF8F5CF8 \n"
276 " BL sub_FFA58A6C \n"
277 " B loc_FF8F5D08 \n"
278
279 "loc_FF8F5CF8:\n"
280 " CMP R3, #0x10 \n"
281 " BNE loc_FF8F5D24 \n"
282 " BL sub_FF8A93BC \n"
283 " BL sub_FF8AB6E0 \n"
284
285 "loc_FF8F5D08:\n"
286 " LDR R3, [SP] \n"
287 " LDR R0, [R3, #0x2C] \n"
288 " MOV LR, PC \n"
289 " LDR PC, [R3, #0x28] \n"
290
291 "loc_FF8F5D18:\n"
292 " LDR R0, [SP] \n"
293 " BL sub_FF8F4B84 \n"
294 " B loc_FF8F5EA8 \n"
295
296 "loc_FF8F5D24:\n"
297 " CMP R3, #0xB \n"
298 " MOV R6, #1 \n"
299 " BNE loc_FF8F5D94 \n"
300 " LDR R1, [R2, #0x24] \n"
301 " ADD R1, R1, R1, LSL#1 \n"
302 " ADD R4, SP, #4 \n"
303 " ADD R1, R2, R1, LSL#1 \n"
304 " SUB R1, R1, #2 \n"
305 " MOV R2, #6 \n"
306 " MOV R0, R4 \n"
307 " BL _memcpy \n"
308 " LDR R0, [SP] \n"
309 " BL sub_FF8F56B8 \n"
310 " LDR R3, [SP] \n"
311 " LDR R1, [R3, #0x24] \n"
312 " LDR R2, [R3, #0x2C] \n"
313 " ADD R0, R3, #4 \n"
314 " MOV LR, PC \n"
315 " LDR PC, [R3, #0x28] \n"
316 " LDR R0, [SP] \n"
317 " BL sub_FF8F5838 \n"
318 " LDR R3, [SP] \n"
319 " ADD R0, R3, #4 \n"
320 " LDR R1, [R3, #0x24] \n"
321 " LDR R2, [R3, #0x34] \n"
322 " MOV LR, PC \n"
323 " LDR PC, [R3, #0x30] \n"
324 " B loc_FF8F5E58 \n"
325
326 "loc_FF8F5D94:\n"
327 " ADD R4, SP, #4 \n"
328 " ADD R1, R2, #4 \n"
329 " MOV R0, R4 \n"
330 " MOV R2, #6 \n"
331 " BL _memcpy \n"
332 " LDR R12, [SP] \n"
333 " LDR R3, [R12] \n"
334 " MOV R1, R4 \n"
335 " MOV R0, R12 \n"
336 " CMP R3, #0xE \n"
337 " LDRLS PC, [PC, R3, LSL#2] \n"
338 " B loc_FF8F5E44 \n"
339 " .long loc_FF8F5E00 \n"
340 " .long loc_FF8F5E08 \n"
341 " .long loc_FF8F5E10 \n"
342 " .long loc_FF8F5E10 \n"
343 " .long loc_FF8F5E00 \n"
344 " .long loc_FF8F5E08 \n"
345 " .long loc_FF8F5E10 \n"
346 " .long loc_FF8F5E10 \n"
347 " .long loc_FF8F5E28 \n"
348 " .long loc_FF8F5E34 \n"
349 " .long loc_FF8F5E3C \n"
350 " .long loc_FF8F5E44 \n"
351 " .long loc_FF8F5E18 \n"
352 " .long loc_FF8F5E18 \n"
353 " .long loc_FF8F5E20 \n"
354
355 "loc_FF8F5E00:\n"
356 " BL sub_FF8F4F68 \n"
357 " B loc_FF8F5E40 \n"
358
359 "loc_FF8F5E08:\n"
360 " BL sub_FF8F50A0 \n"
361 " B loc_FF8F5E40 \n"
362
363 "loc_FF8F5E10:\n"
364 " BL sub_FF8F51CC \n"
365 " B loc_FF8F5E40 \n"
366
367 "loc_FF8F5E18:\n"
368 " BL sub_FF8F58B4 \n"
369 " B loc_FF8F5E40 \n"
370
371 "loc_FF8F5E20:\n"
372 " BL sub_FF8F539C \n"
373 " B loc_FF8F5E40 \n"
374
375 "loc_FF8F5E28:\n"
376 " BL sub_FF8F54A0_my \n"
377 " MOV R6, #0 \n"
378 " B loc_FF8F5E40 \n"
379
380 "loc_FF8F5E34:\n"
381 " BL sub_FF8F5550 \n"
382 " B loc_FF8F5E40 \n"
383
384 "loc_FF8F5E3C:\n"
385 " BL sub_FF8F5638 \n"
386
387 "loc_FF8F5E40:\n"
388 " LDR R12, [SP] \n"
389
390 "loc_FF8F5E44:\n"
391 " ADD R0, R12, #4 \n"
392 " LDR R1, [R12, #0x24] \n"
393 " LDR R2, [R12, #0x2C] \n"
394 " MOV LR, PC \n"
395 " LDR PC, [R12, #0x28] \n"
396
397 "loc_FF8F5E58:\n"
398 " CMP R6, #1 \n"
399 " BNE loc_FF8F5E80 \n"
400 " LDR R1, [SP] \n"
401 " LDR R3, [R1, #0x24] \n"
402 " ADD R3, R3, R3, LSL#1 \n"
403 " ADD R1, R1, R3, LSL#1 \n"
404 " MOV R0, R4 \n"
405 " SUB R1, R1, #2 \n"
406 " BL sub_FF8F4EB8 \n"
407 " B loc_FF8F5EA0 \n"
408
409 "loc_FF8F5E80:\n"
410 " MOV R0, #1 \n"
411 " MOV R1, R0 \n"
412 " MOV R2, R0 \n"
413 " BL sub_FF8F4E5C \n"
414 " MOV R0, #1 \n"
415 " MOV R1, R0 \n"
416 " MOV R2, R0 \n"
417 " BL sub_FF8F4EEC \n"
418
419 "loc_FF8F5EA0:\n"
420 " LDR R0, [SP] \n"
421 " BL sub_FF8F4B84 \n"
422
423 "loc_FF8F5EA8:\n"
424 " LDR R3, =0x4BD10 \n"
425 " MOV R2, #0 \n"
426 " LDR R0, [R3] \n"
427 " MOV R1, R5 \n"
428 " BL sub_FF822320 /*_ReceiveMessageQueue*/ \n"
429 " LDR R2, [SP] \n"
430 " LDR R3, [R2] \n"
431 " CMP R3, #0x12 \n"
432 " BNE loc_FF8F5CD0 \n"
433 " MOV R0, R2 \n"
434 " BL sub_FF8F4B84 \n"
435 " LDR R3, =0x4BD0C \n"
436 " MOV R1, #1 \n"
437 " LDR R0, [R3] \n"
438 " BL sub_FF821B20 /*_SetEventFlag*/ \n"
439 " BL _ExitTask \n"
440 " ADD SP, SP, #0xC \n"
441 " LDMFD SP!, {R4-R6,PC} \n"
442 );
443 }
444
445
446
447 void __attribute__((naked,noinline)) sub_FF8F54A0_my() {
448 asm volatile (
449 " STMFD SP!, {R4,R5,LR} \n"
450 " LDR R3, =0x4BD0C \n"
451 " MOV R4, R0 \n"
452 " MOV R1, #0xE \n"
453 " LDR R0, [R3] \n"
454 " BL sub_FF821CB4 /*_ClearEventFlag*/ \n"
455 " MOV R1, #0 \n"
456 " LDRSH R0, [R4, #4] \n"
457 " BL sub_FF8F4C08 \n"
458 " MOV R5, R0 \n"
459 " LDRSH R0, [R4, #6] \n"
460 " BL sub_FF8F4D38 \n"
461 " LDRSH R0, [R4, #8] \n"
462 " BL sub_FF8F4DD4 \n"
463 " CMP R5, #1 \n"
464 " LDR R1, =0xFF8F4BB4 \n"
465 " MOV R2, #2 \n"
466 " BNE loc_FF8F5500 \n"
467 " LDRSH R0, [R4, #4] \n"
468 " BL sub_FFA58750 \n"
469 " LDR R2, =0x4BD34 \n"
470 " MOV R3, #0 \n"
471 " STR R3, [R2] \n"
472 " B loc_FF8F5504 \n"
473
474 "loc_FF8F5500:\n"
475 " BL sub_FF8F4E2C \n"
476
477 "loc_FF8F5504:\n"
478 " STRH R0, [R4, #4] \n"
479 " LDRSH R0, [R4, #6] \n"
480 " BL sub_FF8A90B0_my \n"
481 " LDRSH R0, [R4, #8] \n"
482 " BL sub_FF8AB084 \n"
483 " MOV R1, #0 \n"
484 " ADD R0, R4, #8 \n"
485 " BL sub_FF8AB1D0 \n"
486 " CMP R5, #1 \n"
487 " MOV R1, #2 \n"
488 " MOV R2, #0 \n"
489 " LDMNEFD SP!, {R4,R5,PC} \n"
490 " LDR R3, =0x4BD0C \n"
491 " LDR R0, [R3] \n"
492 " LDMFD SP!, {R4,R5,LR} \n"
493 " B sub_FF821B10 /*_WaitForAllEventFlag*/ \n"
494 );
495 }
496
497
498
499 void __attribute__((naked,noinline)) sub_FF8A90B0_my() {
500 asm volatile (
501 " STMFD SP!, {R4,LR} \n"
502 " LDR R3, =0x3274 \n"
503 " LDR R12, [R3] \n"
504 " MOV R3, R0, LSL#16 \n"
505 " CMP R12, #1 \n"
506 " LDR R1, =0xFF8A8A9C \n"
507 " MOV R2, #0xF5 \n"
508 " LDR R0, =0xFF8A8CC0 \n"
509 " MOV R4, R3, ASR#16 \n"
510 " BEQ loc_FF8A90DC \n"
511 " BL _DebugAssert \n"
512
513 "loc_FF8A90DC:\n"
514 " CMN R4, #0xC00 \n"
515 " LDR R3, =0x2F256 \n"
516 " LDR R0, =0xFF8A8CCC \n"
517 " LDR R1, =0xFF8A8A9C \n"
518 " MOV R2, #0xFB \n"
519 " LDREQSH R4, [R3] \n"
520 " LDRNE R3, =0x2F256 \n"
521 " CMN R4, #0xC00 \n"
522 " STRH R4, [R3] \n"
523 " BNE loc_FF8A9108 \n"
524 " BL _DebugAssert \n"
525
526 "loc_FF8A9108:\n"
527 " MOV R0, R4 \n"
528 " BL apex2us \n"
529 " LDR PC, =0xFF8A9110 \n"
530 );
531 }