root/platform/s90/sub/100c/boot.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. taskCreateHook
  2. taskCreateHook2
  3. boot
  4. sub_FF810354_my
  5. sub_FF811178_my
  6. sub_FF815E34_my
  7. taskcreate_Startup_my
  8. task_Startup_my
  9. spytask
  10. CreateTask_spytask
  11. CreateTask_PhySw
  12. init_file_modules_task
  13. sub_FF88D330_my
  14. sub_FF86DFAC_my
  15. sub_FF86DBE0_my
  16. sub_FF86D8DC_my
  17. JogDial_task_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 #include "stdlib.h"
   5 
   6 
   7 const char * const new_sa = &_end;
   8 
   9 
  10 // Forward declarations
  11 void CreateTask_PhySw();
  12 void CreateTask_spytask();
  13 extern volatile int jogdial_stopped;
  14 void JogDial_task_my(void);
  15 
  16 void taskCreateHook(int *p) { 
  17 p-=17;
  18 if (p[0]==0xFF87A208)  p[0]=(int)capt_seq_task;
  19 if (p[0]==0xFF96172C)  p[0]=(int)movie_record_task;
  20 if (p[0]==0xFF8982E8)  p[0]=(int)init_file_modules_task;
  21 if (p[0]==0xFF8C0E54)  p[0]=(int)exp_drv_task;
  22 if (p[0]==0xFF85E508)  p[0]=(int)JogDial_task_my;
  23 if (p[0]==0xFFA78FA0)  p[0]=(int)filewritetask;
  24 }
  25 
  26 void taskCreateHook2(int *p) { 
  27 p-=17;
  28 if (p[0]==0xFF8982E8)  p[0]=(int)init_file_modules_task;
  29 if (p[0]==0xFF8C0E54)  p[0]=(int)exp_drv_task;
  30 if (p[0]==0xFFA78FA0)  p[0]=(int)filewritetask;
  31 }
  32 
  33 void __attribute__((naked,noinline)) boot() {
  34     asm volatile (
  35                 "LDR     R1, =0xC0410000\n"
  36                 "MOV     R0, #0\n"
  37                 "STR     R0, [R1]\n"
  38                 "MOV     R1, #0x78\n"
  39                 "MCR     p15, 0, R1,c1,c0\n"
  40                 "MOV     R1, #0\n"
  41                 "MCR     p15, 0, R1,c7,c10, 4\n"
  42                 "MCR     p15, 0, R1,c7,c5\n"
  43                 "MCR     p15, 0, R1,c7,c6\n"
  44                 "MOV     R0, #0x3D\n"
  45                 "MCR     p15, 0, R0,c6,c0\n"
  46                 "MOV     R0, #0xC000002F\n"
  47                 "MCR     p15, 0, R0,c6,c1\n"
  48                 "MOV     R0, #0x33\n"
  49                 "MCR     p15, 0, R0,c6,c2\n"
  50                 "MOV     R0, #0x40000033\n"
  51                 "MCR     p15, 0, R0,c6,c3\n"
  52                 "MOV     R0, #0x80000017\n"
  53                 "MCR     p15, 0, R0,c6,c4\n"
  54                 "LDR     R0, =0xFF80002D\n"
  55                 "MCR     p15, 0, R0,c6,c5\n"
  56                 "MOV     R0, #0x34\n"
  57                 "MCR     p15, 0, R0,c2,c0\n"
  58                 "MOV     R0, #0x34\n"
  59                 "MCR     p15, 0, R0,c2,c0, 1\n"
  60                 "MOV     R0, #0x34\n"
  61                 "MCR     p15, 0, R0,c3,c0\n"
  62                 "LDR     R0, =0x3333330\n"
  63                 "MCR     p15, 0, R0,c5,c0, 2\n"
  64                 "LDR     R0, =0x3333330\n"
  65                 "MCR     p15, 0, R0,c5,c0, 3\n"
  66                 "MRC     p15, 0, R0,c1,c0\n"
  67                 "ORR     R0, R0, #0x1000\n"
  68                 "ORR     R0, R0, #4\n"
  69                 "ORR     R0, R0, #1\n"
  70                 "MCR     p15, 0, R0,c1,c0\n"
  71                 "MOV     R1, #0x80000006\n"
  72                 "MCR     p15, 0, R1,c9,c1\n"
  73                 "MOV     R1, #6\n"
  74                 "MCR     p15, 0, R1,c9,c1, 1\n"
  75                 "MRC     p15, 0, R1,c1,c0\n"
  76                 "ORR     R1, R1, #0x50000\n"
  77                 "MCR     p15, 0, R1,c1,c0\n"
  78                 "LDR     R2, =0xC0200000\n"
  79                 "MOV     R1, #1\n"
  80                 "STR     R1, [R2,#0x10C]\n"
  81                 "MOV     R1, #0xFF\n"
  82                 "STR     R1, [R2,#0xC]\n"
  83                 "STR     R1, [R2,#0x1C]\n"
  84                 "STR     R1, [R2,#0x2C]\n"
  85                 "STR     R1, [R2,#0x3C]\n"
  86                 "STR     R1, [R2,#0x4C]\n"
  87                 "STR     R1, [R2,#0x5C]\n"
  88                 "STR     R1, [R2,#0x6C]\n"
  89                 "STR     R1, [R2,#0x7C]\n"
  90                 "STR     R1, [R2,#0x8C]\n"
  91                 "STR     R1, [R2,#0x9C]\n"
  92                 "STR     R1, [R2,#0xAC]\n"
  93                 "STR     R1, [R2,#0xBC]\n"
  94                 "STR     R1, [R2,#0xCC]\n"
  95                 "STR     R1, [R2,#0xDC]\n"
  96                 "STR     R1, [R2,#0xEC]\n"
  97                 "STR     R1, [R2,#0xFC]\n"
  98                 "LDR     R1, =0xC0400008\n"
  99                 "LDR     R2, =0x430005\n"
 100                 "STR     R2, [R1]\n"
 101                 "MOV     R1, #1\n"
 102                 "LDR     R2, =0xC0243100\n"
 103                 "STR     R2, [R1]\n"
 104                 "LDR     R2, =0xC0242010\n"
 105                 "LDR     R1, [R2]\n"
 106                 "ORR     R1, R1, #1\n"
 107                 "STR     R1, [R2]\n"
 108                 "LDR     R0, =0xFFC14C88\n" //"dated already"
 109                 "LDR     R1, =0x1900\n" // MEMBASEADDR=0x1900
 110                 "LDR     R3, =0xF470\n"
 111 
 112  "loc_FF81013C:\n"
 113                 "CMP     R1, R3\n"
 114                 "LDRCC   R2, [R0],#4\n"
 115                 "STRCC   R2, [R1],#4\n"
 116                 "BCC     loc_FF81013C\n"
 117                 "LDR     R1, =0x141DBC\n"       // MEMISOSTART=0x141DBC
 118                 "MOV     R2, #0\n"
 119 
 120 "loc_FF810154:\n"
 121                 "CMP     R3, R1\n"
 122                 "STRCC   R2, [R3],#4\n"
 123                 "BCC     loc_FF810154\n"
 124                 // "B       loc_FF810354\n"
 125                                 "B       sub_FF810354_my\n" // ---------------->
 126     );
 127 };
 128 
 129 void __attribute__((naked,noinline)) sub_FF810354_my() {
 130 
 131     *(int*)0x1930=(int)taskCreateHook; 
 132     *(int*)0x1934=(int)taskCreateHook2; 
 133     *(int*)0x1938=(int)taskCreateHook;          
 134 
 135     /* Power ON/OFF detection */
 136         *(int*)(0x254C)= (*(int*)0xC0220128)&1 ? 0x2000000 : 0x1000000; // replacement  for correct power-on.
 137 
 138                 asm volatile (  
 139                 "LDR     R0, =0xFF8103CC\n"
 140                 "MOV     R1, #0\n"
 141                 "LDR     R3, =0xFF810404\n"
 142 
 143 "loc_FF810360:\n"
 144                 "CMP     R0, R3\n"
 145                 "LDRCC   R2, [R0],#4\n"
 146                 "STRCC   R2, [R1],#4\n"
 147                 "BCC     loc_FF810360\n"
 148                 "LDR     R0, =0xFF810404\n"
 149                 "MOV     R1, #0x4B0\n"
 150                 "LDR     R3, =0xFF810618\n"
 151 
 152 "loc_FF81037C:\n"
 153                 "CMP     R0, R3\n"
 154                 "LDRCC   R2, [R0],#4\n"
 155                 "STRCC   R2, [R1],#4\n"
 156                 "BCC     loc_FF81037C\n"
 157                 "MOV     R0, #0xD2\n"
 158                 "MSR     CPSR_cxsf, R0\n"
 159                 "MOV     SP, #0x1000\n"
 160                 "MOV     R0, #0xD3\n"
 161                 "MSR     CPSR_cxsf, R0\n"
 162                 "MOV     SP, #0x1000\n"
 163                 "LDR     R0, =0x6C4\n"
 164                 "LDR     R2, =0xEEEEEEEE\n"
 165                 "MOV     R3, #0x1000\n"
 166 
 167 "loc_FF8103B0:\n"
 168                 "CMP     R0, R3\n"
 169                 "STRCC   R2, [R0],#4\n"
 170                 "BCC     loc_FF8103B0\n"
 171                 //"BL      sub_FF811178\n"
 172                                 "BL      sub_FF811178_my\n" // ------------->
 173 
 174 "loc_FF8103C0:\n"
 175                 "ANDEQ   R0, R0, R4,ASR#13\n"
 176 
 177 "loc_FF8103C4:\n"
 178                 "ANDEQ   R0, R0, R0,ROR R6\n"
 179 
 180 "loc_FF8103C8:\n"
 181                 "ANDEQ   R0, R0, R4,ROR R6\n"
 182                 "NOP\n"
 183                 "LDR     PC, =0xFF810618\n"
 184   );                            
 185 };
 186 
 187 
 188 void __attribute__((naked,noinline)) sub_FF811178_my() { 
 189         asm volatile ( 
 190         "STR     LR, [SP,#-4]!\n"
 191         "SUB     SP, SP, #0x74\n"
 192         "MOV     R0, SP\n"
 193         "MOV     R1, #0x74\n"
 194         "BL      sub_FFB34E24\n"
 195         "MOV     R0, #0x53000\n"
 196         "STR     R0, [SP,#4]\n"
 197         //"LDR     R0, =0x141DBC\n"
 198                  "LDR     R0, =new_sa\n"        // +
 199                  "LDR     R0, [R0]\n"           // +    
 200         "LDR     R2, =0x379C00\n"
 201         "LDR     R1, =0x3724A8\n"
 202         "STR     R0, [SP,#8]\n"
 203         "SUB     R0, R1, R0\n"
 204         "ADD     R3, SP, #0xC\n"
 205         "STR     R2, [SP]\n"
 206         "STMIA   R3, {R0-R2}\n"
 207         "MOV     R0, #0x22\n"
 208         "STR     R0, [SP,#0x18]\n"
 209         "MOV     R0, #0x68\n"
 210         "STR     R0, [SP,#0x1C]\n"
 211         "LDR     R0, =0x19B\n"
 212         //"LDR     R1, =sub_FF815E34\n"
 213                 "LDR     R1, =sub_FF815E34_my\n"
 214         "STR     R0, [SP,#0x20]\n"
 215         "MOV     R0, #0x96\n"
 216         "STR     R0, [SP,#0x24]\n"
 217         "MOV     R0, #0x78\n"
 218         "STR     R0, [SP,#0x28]\n"
 219         "MOV     R0, #0x64\n"
 220         "STR     R0, [SP,#0x2C]\n"
 221         "MOV     R0, #0\n"
 222         "STR     R0, [SP,#0x30]\n"
 223         "STR     R0, [SP,#0x34]\n"
 224         "MOV     R0, #0x10\n"
 225         "STR     R0, [SP,#0x5C]\n"
 226         "MOV     R0, #0x800\n"
 227         "STR     R0, [SP,#0x60]\n"
 228         "MOV     R0, #0xA0\n"
 229         "STR     R0, [SP,#0x64]\n"
 230         "MOV     R0, #0x280\n"
 231         "STR     R0, [SP,#0x68]\n"
 232         "MOV     R0, SP\n"
 233         "MOV     R2, #0\n"
 234         "BL      sub_FF8133E4\n"
 235         "ADD     SP, SP, #0x74\n"
 236         "LDR     PC, [SP],#4\n"
 237         );
 238 }; 
 239 
 240 void __attribute__((naked,noinline)) sub_FF815E34_my() {
 241         asm volatile (
 242         "STMFD   SP!, {R4,LR}\n"
 243         "BL      sub_FF810B08\n"
 244         "BL      sub_FF81A148\n"
 245         "CMP     R0, #0\n"
 246         //"ADRLT   R0, 0xFF815F48\n"
 247                 "LDRLT   R0, =0xFF815F48\n"
 248         "BLLT    sub_FF815F28\n"
 249         "BL      sub_FF815A70\n"
 250         "CMP     R0, #0\n"
 251         //"ADRLT   R0, 0xFF815F50\n"
 252                 "LDRLT   R0, =0xFF815F50\n"
 253         "BLLT    sub_FF815F28\n"
 254         //"ADR     R0, 0xFF815F60\n"
 255                 "LDR     R0, =0xFF815F60\n"
 256         "BL      sub_FF815B58\n"
 257         "CMP     R0, #0\n"
 258         //"ADRLT   R0, 0xFF815F68\n"
 259                 "LDRLT   R0, =0xFF815F68\n"
 260         "BLLT    sub_FF815F28\n"
 261         //"ADR     R0, 0xFF815F60\n"
 262                 "LDR     R0, =0xFF815F60\n"
 263         "BL      sub_FF813BE0\n"
 264         "CMP     R0, #0\n"
 265         //"ADRLT   R0, 0xFF815F7C\n"
 266                 "LDRLT   R0, =0xFF815F7C\n"
 267         "BLLT    sub_FF815F28\n"
 268         "BL      sub_FF819B5C\n"
 269         "CMP     R0, #0\n"
 270         //"ADRLT   R0, 0xFF815F88\n"
 271                 "LDRLT   R0, =0xFF815F88\n"
 272         "BLLT    sub_FF815F28\n"
 273         "BL      sub_FF81165C\n"
 274         "CMP     R0, #0\n"
 275         //"ADRLT   R0, 0xFF815F94\n"
 276                 "LDRLT   R0, =0xFF815F94\n"
 277         "BLLT    sub_FF815F28\n"
 278         "LDMFD   SP!, {R4,LR}\n"
 279         //"B       sub_FF81F868\n"
 280                 "B       taskcreate_Startup_my\n" //---------->
 281         );
 282 }; 
 283 
 284 
 285 
 286 void __attribute__((naked,noinline)) taskcreate_Startup_my() { 
 287         asm volatile (  
 288         "STMFD   SP!, {R3-R5,LR}\n"
 289         "BL      sub_FF833350\n"
 290         "BL      sub_FF83A614\n"
 291         "CMP     R0, #0\n"
 292         "BNE     loc_FF81F8B0\n"
 293         "LDR     R4, =0xC0220000\n"
 294         "LDR     R0, [R4,#0x12C]\n"
 295         "TST     R0, #1\n"
 296         "MOVEQ   R0, #0x12C\n"
 297         "BLEQ    sub_FF838A50\n"
 298         "BL      sub_FF83334C\n"
 299         "CMP     R0, #0\n"
 300         "BNE     loc_FF81F8B0\n"
 301         "BL      sub_FF8329F4\n"
 302         "MOV     R0, #0x44\n"
 303         "STR     R0, [R4,#0x1C]\n"
 304         "BL      sub_FF832BE8\n"
 305 "loc_FF81F8AC:\n"
 306         "B       loc_FF81F8AC\n"
 307 "loc_FF81F8B0:\n"
 308         //"BL      sub_FF833358\n" // removed, see boot() function
 309         "BL      sub_FF833354\n"
 310         "BL      sub_FF8388C8\n"
 311         "LDR     R1, =0x3CE000\n"
 312         "MOV     R0, #0\n"
 313         "BL      sub_FF838D10\n"
 314         "BL      sub_FF838ABC\n"
 315         "MOV     R3, #0\n"
 316         "STR     R3, [SP]\n"
 317                 "LDR     R3, =task_Startup_my\n" //+ ----------->
 318         //"ADR     R3, sub_FF81F804\n"
 319         "MOV     R2, #0\n"
 320         "MOV     R1, #0x19\n"
 321         //"ADR     R0, 0xFF81F8F8\n"
 322                 "LDR     R0, =0xFF81F8F8\n"
 323         "BL      sub_FF81E5B4\n"
 324         "MOV     R0, #0\n"
 325         "LDMFD   SP!, {R3-R5,PC}\n"
 326 
 327                 //"LDMFD   SP!, {R12,PC}\n" ??????????????????????????????????????????????????
 328  );
 329 }; 
 330 
 331 void __attribute__((naked,noinline)) task_Startup_my() { 
 332 
 333         asm volatile (
 334         "STMFD   SP!, {R4,LR}\n"
 335         "BL      sub_FF816490\n"
 336         "BL      sub_FF83444C\n"
 337         "BL      sub_FF832670\n"
 338         "BL      sub_FF83A654\n"
 339         "BL      sub_FF83A838\n"
 340         // "BL      sub_FF83A6E8\n" // Skip starting diskboot.bin again
 341         "BL      sub_FF83A9D8\n"
 342         "BL      sub_FF83136C\n"
 343         "BL      sub_FF83A868\n"
 344         "BL      sub_FF83806C\n"
 345         "BL      sub_FF83A9DC\n"
 346         //"BL      sub_FF83323C\n" ; taskcreate_PhySw
 347         );               
 348         CreateTask_PhySw(); // +
 349         CreateTask_spytask();  // +
 350     asm volatile (              
 351                 "BL      sub_FF836080\n"
 352                 "BL      sub_FF83A9F4\n"
 353                 "BL      sub_FF8306A4\n"
 354                 "BL      sub_FF831FC8\n"
 355                 "BL      sub_FF83A3F0\n"
 356                 "BL      sub_FF832624\n"
 357                 "BL      sub_FF831ED4\n"
 358                 "BL      sub_FF8313A0\n"
 359                 "BL      sub_FF83B564\n"
 360                 "BL      sub_FF831EAC\n"
 361                 "LDMFD   SP!, {R4,LR}\n"
 362                 "B       sub_FF8165B0\n"
 363         );
 364 }; 
 365 
 366 void spytask(long ua, long ub, long uc, long ud, long ue, long uf)
 367 {
 368     core_spytask();
 369 }
 370 void CreateTask_spytask() { 
 371         _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0);
 372 };
 373 
 374 void __attribute__((naked,noinline)) CreateTask_PhySw() {
 375         asm volatile ( 
 376 
 377         "STMFD   SP!, {R3-R5,LR}\n"
 378         "LDR     R4, =0x1C38\n"
 379         "LDR     R0, [R4,#0x10]\n"
 380         "CMP     R0, #0\n"
 381         "BNE     loc_FF833270\n"
 382         "MOV     R3, #0\n"
 383         "STR     R3, [SP]\n"
 384         //"ADR     R3, sub_FF833208\n"
 385         //"MOV     R2, #0x800\n"
 386                            "LDR     R3, =mykbd_task\n"  // task_phySw
 387                            "MOV     R2, #0x2000\n"              // greater Stacksize
 388         "MOV     R1, #0x17\n"
 389         //"ADR     R0, 0xFF833444\n"
 390                 "LDR     R0, =0xFF833444\n"
 391         "BL      sub_FF838B10\n"
 392         "STR     R0, [R4,#0x10]\n"
 393 "loc_FF833270:\n"
 394         "BL      sub_FF85E8B0\n"
 395         "BL      sub_FF88AF00\n"
 396         "BL      sub_FF861E20\n"
 397         "CMP     R0, #0\n"
 398         "LDREQ   R1, =0x330E4\n"
 399         "LDMEQFD SP!, {R3-R5,LR}\n"
 400         "BEQ     sub_FF88AE88\n"
 401         "LDMFD   SP!, {R3-R5,PC}\n"
 402             "NOP\n"
 403         );
 404 };
 405 
 406 void __attribute__((naked,noinline)) init_file_modules_task() { 
 407   asm volatile (
 408         "STMFD   SP!, {R4-R6,LR}\n"
 409         "BL      sub_FF88D304\n"
 410         "LDR     R5, =0x5006\n"
 411         "MOVS    R4, R0\n"
 412         "MOVNE   R1, #0\n"
 413         "MOVNE   R0, R5\n"
 414         "BLNE    sub_FF8924F4\n"
 415         //"BL      sub_FF88D330\n"
 416                 "BL      sub_FF88D330_my\n"
 417                 "BL      core_spytask_can_start\n"      // +
 418         "CMP     R4, #0\n"
 419         "MOVEQ   R0, R5\n"
 420         "LDMEQFD SP!, {R4-R6,LR}\n"
 421         "MOVEQ   R1, #0\n"
 422         "BEQ     sub_FF8924F4\n"
 423         "LDMFD   SP!, {R4-R6,PC}\n"
 424  );
 425 }; 
 426 
 427 void __attribute__((naked,noinline)) sub_FF88D330_my() { 
 428  asm volatile (
 429         "STMFD   SP!, {R4,LR}\n"
 430         "MOV     R0, #3\n"
 431         //"BL      sub_FF86DFAC\n"
 432                 "BL      sub_FF86DFAC_my\n" // ----------->
 433         "BL      sub_FF9475FC\n"
 434         "LDR     R4, =0x302C\n"
 435         "LDR     R0, [R4,#4]\n"
 436         "CMP     R0, #0\n"
 437         "BNE     loc_FF88D368\n"
 438         "BL      sub_FF86D2B8\n"
 439         "BL      sub_FF93B638\n"
 440         "BL      sub_FF86D2B8\n"
 441         "BL      sub_FF8695B4\n"
 442         "BL      sub_FF86D1B8\n"
 443         "BL      sub_FF93B700\n"
 444 "loc_FF88D368:\n"
 445         "MOV     R0, #1\n"
 446         "STR     R0, [R4]\n"
 447         "LDMFD   SP!, {R4,PC}\n"
 448  );
 449 }; 
 450 
 451 
 452 void __attribute__((naked,noinline)) sub_FF86DFAC_my() {
 453  asm volatile (
 454         "STMFD   SP!, {R4-R8,LR}\n"
 455         "MOV     R8, R0\n"
 456         "BL      sub_FF86DF2C\n"
 457         "LDR     R1, =0x37EA0\n"
 458         "MOV     R6, R0\n"
 459         "ADD     R4, R1, R0,LSL#7\n"
 460         "LDR     R0, [R4,#0x6C]\n"
 461         "CMP     R0, #4\n"
 462         "LDREQ   R1, =0x804\n"
 463         //"ADREQ   R0, 0xFF86DA78\n"
 464                 "LDREQ   R0, =0xFF86DA78\n"
 465         "BLEQ    sub_FF81E88C\n"
 466         "MOV     R1, R8\n"
 467         "MOV     R0, R6\n"
 468         "BL      sub_FF86D7CC\n"
 469         "LDR     R0, [R4,#0x38]\n"
 470         "BL      sub_FF86E5C8\n"
 471         "CMP     R0, #0\n"
 472         "STREQ   R0, [R4,#0x6C]\n"
 473         "MOV     R0, R6\n"
 474         "BL      sub_FF86D85C\n"
 475         "MOV     R0, R6\n"
 476         //"BL      sub_FF86DBE0\n"
 477                 "BL      sub_FF86DBE0_my\n" //------------->
 478         "MOV     R5, R0\n"
 479         "MOV     R0, R6\n"
 480         "BL      sub_FF86DE08\n"
 481         "LDR     R6, [R4,#0x3C]\n"
 482         "AND     R7, R5, R0\n"
 483         "CMP     R6, #0\n"
 484         "LDR     R1, [R4,#0x38]\n"
 485         "MOVEQ   R0, #0x80000001\n"
 486         "MOV     R5, #0\n"
 487         "BEQ     loc_FF86E05C\n"
 488         "MOV     R0, R1\n"
 489         "BL      sub_FF86D420\n"
 490         "CMP     R0, #0\n"
 491         "MOVNE   R5, #4\n"
 492         "CMP     R6, #5\n"
 493         "ORRNE   R0, R5, #1\n"
 494         "BICEQ   R0, R5, #1\n"
 495         "CMP     R7, #0\n"
 496         "BICEQ   R0, R0, #2\n"
 497         "ORREQ   R0, R0, #0x80000000\n"
 498         "BICNE   R0, R0, #0x80000000\n"
 499         "ORRNE   R0, R0, #2\n"
 500 "loc_FF86E05C:\n"
 501         "CMP     R8, #7\n"
 502         "STR     R0, [R4,#0x40]\n"
 503         "LDMNEFD SP!, {R4-R8,PC}\n"
 504         "MOV     R0, R8\n"
 505         "BL      sub_FF86DF7C\n"
 506         "CMP     R0, #0\n"
 507         "LDMEQFD SP!, {R4-R8,LR}\n"
 508         //"ADREQ   R0, 0xFF86E0A8\n"
 509                 "LDREQ   R0, =0xFF86E0A8\n"
 510         "BEQ     sub_FF81175C\n"
 511         "LDMFD   SP!, {R4-R8,PC}\n"
 512  );
 513 }; 
 514 
 515 void __attribute__((naked,noinline)) sub_FF86DBE0_my() {
 516 
 517  asm volatile (
 518         "STMFD   SP!, {R4-R6,LR}\n"
 519         "MOV     R5, R0\n"
 520         "LDR     R0, =0x37EA0\n"
 521         "ADD     R4, R0, R5,LSL#7\n"
 522         "LDR     R0, [R4,#0x6C]\n"
 523         "TST     R0, #2\n"
 524         "MOVNE   R0, #1\n"
 525         "LDMNEFD SP!, {R4-R6,PC}\n"
 526         "LDR     R0, [R4,#0x38]\n"
 527         "MOV     R1, R5\n"
 528         //"BL      sub_FF86D8DC\n"
 529                 "BL      sub_FF86D8DC_my\n" // ------------------>
 530         "CMP     R0, #0\n"
 531         "LDRNE   R0, [R4,#0x38]\n"
 532         "MOVNE   R1, R5\n"
 533         "BLNE    sub_FF86DA9C\n"
 534         "LDR     R2, =0x37F20\n"
 535         "ADD     R1, R5, R5,LSL#4\n"
 536         "LDR     R1, [R2,R1,LSL#2]\n"
 537         "CMP     R1, #4\n"
 538         "BEQ     loc_FF86DC40\n"
 539         "CMP     R0, #0\n"
 540         "LDMEQFD SP!, {R4-R6,PC}\n"
 541         "MOV     R0, R5\n"
 542         "BL      sub_FF86D4B0\n"
 543 "loc_FF86DC40:\n"
 544         "CMP     R0, #0\n"
 545         "LDRNE   R1, [R4,#0x6C]\n"
 546         "ORRNE   R1, R1, #2\n"
 547         "STRNE   R1, [R4,#0x6C]\n"
 548         "LDMFD   SP!, {R4-R6,PC}\n"
 549  );
 550 };
 551 
 552 
 553 void __attribute__((naked,noinline)) sub_FF86D8DC_my() {
 554  asm volatile ( 
 555 
 556 "sub_FF86D8DC:\n"
 557         "STMFD   SP!, {R4-R10,LR}\n"
 558         "MOV     R9, R0\n"
 559         "LDR     R0, =0x37EA0\n"
 560         "MOV     R8, #0\n"
 561         "ADD     R5, R0, R1,LSL#7\n"
 562         "LDR     R0, [R5,#0x3C]\n"
 563         "MOV     R7, #0\n"
 564         "CMP     R0, #7\n"
 565         "MOV     R6, #0\n"
 566         "ADDLS   PC, PC, R0,LSL#2\n"
 567         "B       loc_FF86DA34\n"
 568 "loc_FF86D908:\n"
 569         "B       loc_FF86D940\n"
 570 "loc_FF86D90C:\n"
 571         "B       loc_FF86D928\n"
 572 "loc_FF86D910:\n"
 573         "B       loc_FF86D928\n"
 574 "loc_FF86D914:\n"
 575         "B       loc_FF86D928\n"
 576 "loc_FF86D918:\n"
 577         "B       loc_FF86D928\n"
 578 "loc_FF86D91C:\n"
 579         "B       loc_FF86DA2C\n"
 580 "loc_FF86D920:\n"
 581         "B       loc_FF86D928\n"
 582 "loc_FF86D924:\n"
 583         "B       loc_FF86D928\n"
 584 "loc_FF86D928:\n"
 585         "MOV     R2, #0\n"
 586         "MOV     R1, #0x200\n"
 587         "MOV     R0, #2\n"
 588         "BL      sub_FF887384\n"
 589         "MOVS    R4, R0\n"
 590         "BNE     loc_FF86D948\n"
 591 "loc_FF86D940:\n"
 592         "MOV     R0, #0\n"
 593         "LDMFD   SP!, {R4-R10,PC}\n"
 594 "loc_FF86D948:\n"
 595         "LDR     R12, [R5,#0x50]\n"
 596         "MOV     R3, R4\n"
 597         "MOV     R2, #1\n"
 598         "MOV     R1, #0\n"
 599         "MOV     R0, R9\n"
 600         "BLX     R12\n"
 601         "CMP     R0, #1\n"
 602         "BNE     loc_FF86D974\n"
 603         "MOV     R0, #2\n"
 604         "BL      sub_FF8874D0\n"
 605         "B       loc_FF86D940\n"
 606 "loc_FF86D974:\n"
 607         "LDR     R1, [R5,#0x64]\n"
 608         "MOV     R0, R9\n"
 609         "BLX     R1\n"
 610 
 611 
 612                "MOV   R1, R4\n"           //  pointer to MBR in R1
 613                                 "BL    mbr_read_dryos\n"   //  total sectors count in R0 before and after call
 614 
 615                 // Start of DataGhost's FAT32 autodetection code
 616                 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 617                 // According to the code below, we can use R1, R2, R3 and R12.
 618                 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 619                 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 620                 "MOV     R12, R4\n"                    // Copy the MBR start address so we have something to work with
 621                 "MOV     LR, R4\n"                     // Save old offset for MBR signature
 622                 "MOV     R1, #1\n"                     // Note the current partition number
 623                 "B       dg_sd_fat32_enter\n"          // We actually need to check the first partition as well, no increments yet!
 624            "dg_sd_fat32:\n"
 625                 "CMP     R1, #4\n"                     // Did we already see the 4th partition?
 626                 "BEQ     dg_sd_fat32_end\n"            // Yes, break. We didn't find anything, so don't change anything.
 627                 "ADD     R12, R12, #0x10\n"            // Second partition
 628                 "ADD     R1, R1, #1\n"                 // Second partition for the loop
 629            "dg_sd_fat32_enter:\n"
 630                 "LDRB    R2, [R12, #0x1BE]\n"          // Partition status
 631                 "LDRB    R3, [R12, #0x1C2]\n"          // Partition type (FAT32 = 0xB)
 632                 "CMP     R3, #0xB\n"                   // Is this a FAT32 partition?
 633                 "CMPNE   R3, #0xC\n"                   // Not 0xB, is it 0xC (FAT32 LBA) then?
 634                 "BNE     dg_sd_fat32\n"                // No, it isn't.
 635                 "CMP     R2, #0x00\n"                  // It is, check the validity of the partition type
 636                 "CMPNE   R2, #0x80\n"
 637                 "BNE     dg_sd_fat32\n"                // Invalid, go to next partition
 638                                                        // This partition is valid, it's the first one, bingo!
 639                 "MOV     R4, R12\n"                    // Move the new MBR offset for the partition detection.
 640                 
 641            "dg_sd_fat32_end:\n"
 642                 // End of DataGhost's FAT32 autodetection code                           
 643 
 644         "LDRB    R1, [R4,#0x1C9]\n"
 645         "LDRB    R3, [R4,#0x1C8]\n"
 646         "LDRB    R12, [R4,#0x1CC]\n"
 647         "MOV     R1, R1,LSL#24\n"
 648         "ORR     R1, R1, R3,LSL#16\n"
 649         "LDRB    R3, [R4,#0x1C7]\n"
 650         "LDRB    R2, [R4,#0x1BE]\n"
 651         //"LDRB    LR, [R4,#0x1FF]\n" // replaced, see below
 652         "ORR     R1, R1, R3,LSL#8\n"
 653         "LDRB    R3, [R4,#0x1C6]\n"
 654         "CMP     R2, #0\n"
 655         "CMPNE   R2, #0x80\n"
 656         "ORR     R1, R1, R3\n"
 657         "LDRB    R3, [R4,#0x1CD]\n"
 658         "MOV     R3, R3,LSL#24\n"
 659         "ORR     R3, R3, R12,LSL#16\n"
 660         "LDRB    R12, [R4,#0x1CB]\n"
 661         "ORR     R3, R3, R12,LSL#8\n"
 662         "LDRB    R12, [R4,#0x1CA]\n"
 663         "ORR     R3, R3, R12\n"
 664         //"LDRB    R12, [R4,#0x1FE]\n" // replaced, see below
 665         "LDRB    R12, [LR,#0x1FE]\n"        // New! First MBR signature byte (0x55)
 666         "LDRB    LR, [LR,#0x1FF]\n"         //      Last MBR signature byte (0xAA)      
 667         "BNE     loc_FF86DA00\n"
 668         "CMP     R0, R1\n"
 669         "BCC     loc_FF86DA00\n"
 670         "ADD     R2, R1, R3\n"
 671         "CMP     R2, R0\n"
 672         "CMPLS   R12, #0x55\n"
 673         "CMPEQ   LR, #0xAA\n"
 674         "MOVEQ   R7, R1\n"
 675         "MOVEQ   R6, R3\n"
 676         "MOVEQ   R4, #1\n"
 677         "BEQ     loc_FF86DA04\n"
 678 "loc_FF86DA00:\n"
 679         "MOV     R4, R8\n"
 680 "loc_FF86DA04:\n"
 681         "MOV     R0, #2\n"
 682         "BL      sub_FF8874D0\n"
 683         "CMP     R4, #0\n"
 684         "BNE     loc_FF86DA40\n"
 685         "LDR     R1, [R5,#0x64]\n"
 686         "MOV     R7, #0\n"
 687         "MOV     R0, R9\n"
 688         "BLX     R1\n"
 689         "MOV     R6, R0\n"
 690         "B       loc_FF86DA40\n"
 691 "loc_FF86DA2C:\n"
 692         "MOV     R6, #0x40\n"
 693         "B       loc_FF86DA40\n"
 694 "loc_FF86DA34:\n"
 695         "LDR     R1, =0x568\n"
 696         //"ADR     R0, 0xFF86DA78\n"
 697                 "LDR     R0, =0xFF86DA78\n"
 698         "BL      sub_FF81E88C\n"
 699 "loc_FF86DA40:\n"
 700         "STR     R7, [R5,#0x44]!\n"
 701         "STMIB   R5, {R6,R8}\n"
 702         "MOV     R0, #1\n"
 703         "LDMFD   SP!, {R4-R10,PC}\n"
 704  );
 705 }; 
 706 
 707 void __attribute__((naked,noinline)) JogDial_task_my() {
 708  asm volatile ( 
 709         "STMFD   SP!, {R4-R11,LR}\n"
 710         "SUB     SP, SP, #0x34\n"
 711         "BL      sub_FF85E904\n"
 712         "LDR     R1, =0x2560\n"
 713         "LDR     R9, =0xFFB3AB0C\n"
 714         "MOV     R0, #0\n"
 715         "ADD     R2, SP, #0x1C\n"
 716         "ADD     R3, SP, #0x20\n"
 717         "ADD     R10, SP, #0xC\n"
 718         "ADD     R8, SP, #0x14\n"
 719         "MOV     R7, #0\n"
 720 "loc_FF85E534:\n"
 721         "ADD     R3, SP, #0x20\n"
 722         "ADD     R12, R3, R0,LSL#1\n"
 723         "ADD     R2, SP, #0x1C\n"
 724         "STRH    R7, [R12]\n"
 725         "ADD     R12, R2, R0,LSL#1\n"
 726         "STRH    R7, [R12]\n"
 727         "STR     R7, [R8,R0,LSL#2]\n"
 728         "STR     R7, [R10,R0,LSL#2]\n"
 729         "ADD     R0, R0, #1\n"
 730         "CMP     R0, #2\n"
 731         "BLT     loc_FF85E534\n"
 732 "loc_FF85E560:\n"
 733         "LDR     R0, =0x2560\n"
 734         "MOV     R2, #0\n"
 735         "LDR     R0, [R0,#8]\n"
 736         "ADD     R1, SP, #4\n"
 737         "BL      sub_FF8382FC\n"
 738         "TST     R0, #1\n"
 739         "LDRNE   R1, =0x229\n"
 740         //"ADRNE   R0, 0xFF85E830\n"
 741                 "LDRNE   R0, =0xFF85E830\n"
 742         "BLNE    sub_FF81E88C\n"
 743 
 744 //------------------  added code ---------------------
 745 "labelA:\n"
 746                 "LDR     R0, =jogdial_stopped\n"
 747                 "LDR     R0, [R0]\n"
 748                 "CMP     R0, #1\n"
 749                 "BNE     labelB\n"
 750                 "MOV     R0, #40\n"
 751                 "BL      _SleepTask\n"
 752                 "B       labelA\n"
 753 "labelB:\n"
 754 //------------------  original code ------------------
 755 
 756         "LDR     R0, [SP,#4]\n"
 757         "AND     R4, R0, #0xFF\n"
 758         "AND     R0, R0, #0xFF00\n"
 759         "CMP     R0, #0x100\n"
 760         "BEQ     loc_FF85E5E4\n"
 761         "CMP     R0, #0x200\n"
 762         "BEQ     loc_FF85E61C\n"
 763         "CMP     R0, #0x300\n"
 764         "BEQ     loc_FF85E884\n"
 765         "CMP     R0, #0x400\n"
 766         "BNE     loc_FF85E560\n"
 767         "CMP     R4, #0\n"
 768         "LDRNE   R1, =0x2DB\n"
 769         //"ADRNE   R0, 0xFF85E830\n"
 770                 "LDRNE   R0, =0xFF85E830\n"
 771         "BLNE    sub_FF81E88C\n"
 772         "LDR     R2, =0xFFB3AAE4\n"
 773         "ADD     R0, R4, R4,LSL#2\n"
 774         "LDR     R1, [R2,R0,LSL#2]\n"
 775         "STR     R7, [R1]\n"
 776         "MOV     R1, #1\n"
 777         "ADD     R0, R2, R0,LSL#2\n"
 778 "loc_FF85E5D8:\n"
 779         "LDR     R0, [R0,#8]\n"
 780         "STR     R1, [R0]\n"
 781         "B       loc_FF85E560\n"
 782 "loc_FF85E5E4:\n"
 783         "LDR     R5, =0x2570\n"
 784         "LDR     R0, [R5,R4,LSL#2]\n"
 785         "BL      sub_FF839294\n"
 786                 //"ADR     R2, 0xFF85E45C\n"
 787                 "LDR     R2, =0xFF85E45C\n"
 788         "ADD     R1, R2, #0\n"
 789         "ORR     R3, R4, #0x200\n"
 790         "MOV     R0, #0x28\n"
 791         "BL      sub_FF8391B0\n"
 792         "TST     R0, #1\n"
 793         "CMPNE   R0, #0x15\n"
 794         "STR     R0, [R10,R4,LSL#2]\n"
 795         "BEQ     loc_FF85E560\n"
 796         "LDR     R1, =0x23E\n"
 797         "B       loc_FF85E81C\n"
 798 "loc_FF85E61C:\n"
 799         "LDR     R1, =0xFFB3AAE4\n"
 800         "ADD     R0, R4, R4,LSL#2\n"
 801         "STR     R0, [SP,#0x30]\n"
 802         "ADD     R0, R1, R0,LSL#2\n"
 803         "STR     R0, [SP,#0x2C]\n"
 804         "LDR     R0, [R0,#4]\n"
 805         "LDR     R0, [R0]\n"
 806         "MOV     R2, R0,ASR#16\n"
 807         "ADD     R0, SP, #0x20\n"
 808         "ADD     R0, R0, R4,LSL#1\n"
 809         "STR     R0, [SP,#0x28]\n"
 810         "STRH    R2, [R0]\n"
 811         "ADD     R0, SP, #0x1C\n"
 812         "ADD     R0, R0, R4,LSL#1\n"
 813         "STR     R0, [SP,#0x24]\n"
 814         "LDRSH   R3, [R0]\n"
 815         "SUB     R0, R2, R3\n"
 816         "CMP     R0, #0\n"
 817         "BNE     loc_FF85E6AC\n"
 818         "LDR     R0, [R8,R4,LSL#2]\n"
 819         "CMP     R0, #0\n"
 820         "BEQ     loc_FF85E7D4\n"
 821         "LDR     R5, =0x2570\n"
 822         "LDR     R0, [R5,R4,LSL#2]\n"
 823         "BL      sub_FF839294\n"
 824         //"ADR     R2, sub_FF85E468\n"
 825                 "LDR     R2, =0xFF85E468\n"
 826         "ADD     R1, R2, #0\n"
 827         "ORR     R3, R4, #0x300\n"
 828         "MOV     R0, #0x1F4\n"
 829         "BL      sub_FF8391B0\n"
 830         "TST     R0, #1\n"
 831         "CMPNE   R0, #0x15\n"
 832         "STR     R0, [R5,R4,LSL#2]\n"
 833         "BEQ     loc_FF85E7D4\n"
 834         "LDR     R1, =0x25B\n"
 835         "B       loc_FF85E7CC\n"
 836 "loc_FF85E6AC:\n"
 837         "MOV     R1, R0\n"
 838         "RSBLT   R0, R0, #0\n"
 839         "MOVLE   R5, #0\n"
 840         "MOVGT   R5, #1\n"
 841         "CMP     R0, #0xFF\n"
 842         "BLS     loc_FF85E6EC\n"
 843         "CMP     R1, #0\n"
 844         "RSBLE   R0, R3, #0xFF\n"
 845         "ADDLE   R0, R0, #0x7F00\n"
 846         "ADDLE   R0, R0, R2\n"
 847         "RSBGT   R0, R2, #0xFF\n"
 848         "ADDGT   R0, R0, #0x7F00\n"
 849         "ADDGT   R0, R0, R3\n"
 850         "ADD     R0, R0, #0x8000\n"
 851         "ADD     R0, R0, #1\n"
 852         "EOR     R5, R5, #1\n"
 853 "loc_FF85E6EC:\n"
 854         "STR     R0, [SP,#8]\n"
 855         "LDR     R0, [R8,R4,LSL#2]\n"
 856         "CMP     R0, #0\n"
 857         "BEQ     loc_FF85E73C\n"
 858         "LDR     R1, =0xFFB3AB24\n"
 859         "ADD     R1, R1, R4,LSL#3\n"
 860         "LDR     R1, [R1,R5,LSL#2]\n"
 861         "CMP     R1, R0\n"
 862         "BEQ     loc_FF85E758\n"
 863         "ADD     R11, R4, R4,LSL#1\n"
 864         "ADD     R6, R9, R11,LSL#2\n"
 865         "LDRB    R0, [R6,#9]\n"
 866         "CMP     R0, #1\n"
 867         "LDREQ   R0, [R6,#4]\n"
 868         "BLEQ    sub_FF894354\n"
 869         "LDRB    R0, [R6,#8]\n"
 870         "CMP     R0, #1\n"
 871         "BNE     loc_FF85E758\n"
 872         "LDR     R0, [R9,R11,LSL#2]\n"
 873         "B       loc_FF85E754\n"
 874 "loc_FF85E73C:\n"
 875         "ADD     R0, R4, R4,LSL#1\n"
 876         "ADD     R1, R9, R0,LSL#2\n"
 877         "LDRB    R1, [R1,#8]\n"
 878         "CMP     R1, #1\n"
 879         "BNE     loc_FF85E758\n"
 880         "LDR     R0, [R9,R0,LSL#2]\n"
 881 "loc_FF85E754:\n"
 882         "BL      sub_FF894354\n"
 883 "loc_FF85E758:\n"
 884         "LDR     R0, =0xFFB3AB24\n"
 885         "LDR     R1, [SP,#8]\n"
 886         "ADD     R6, R0, R4,LSL#3\n"
 887         "LDR     R0, [R6,R5,LSL#2]\n"
 888         "BL      sub_FF894284\n"
 889         "LDR     R0, [R6,R5,LSL#2]\n"
 890         "STR     R0, [R8,R4,LSL#2]\n"
 891         "LDR     R0, [SP,#0x28]\n"
 892         "LDR     R1, [SP,#0x24]\n"
 893         "LDRH    R0, [R0]\n"
 894         "STRH    R0, [R1]\n"
 895         "ADD     R0, R4, R4,LSL#1\n"
 896         "ADD     R0, R9, R0,LSL#2\n"
 897         "LDRB    R0, [R0,#9]\n"
 898         "CMP     R0, #1\n"
 899         "BNE     loc_FF85E7D4\n"
 900         "LDR     R5, =0x2570\n"
 901         "LDR     R0, [R5,R4,LSL#2]\n"
 902         "BL      sub_FF839294\n"
 903         //"ADR     R2, sub_FF85E468\n"
 904                 "LDR     R2, =0xFF85E468\n"
 905         "ADD     R1, R2, #0\n"
 906         "ORR     R3, R4, #0x300\n"
 907         "MOV     R0, #0x1F4\n"
 908         "BL      sub_FF8391B0\n"
 909         "TST     R0, #1\n"
 910         "CMPNE   R0, #0x15\n"
 911         "STR     R0, [R5,R4,LSL#2]\n"
 912         "BEQ     loc_FF85E7D4\n"
 913         "LDR     R1, =0x2B5\n"
 914 "loc_FF85E7CC:\n"
 915         //"ADR     R0, 0xFF85E830\n"
 916                 "LDR     R0, =0xFF85E830\n"
 917         "BL      sub_FF81E88C\n"
 918 "loc_FF85E7D4:\n"
 919         "ADD     R0, R4, R4,LSL#1\n"
 920         "ADD     R0, R9, R0,LSL#2\n"
 921         "LDRB    R0, [R0,#0xA]\n"
 922         "CMP     R0, #1\n"
 923         "BNE     loc_FF85E868\n"
 924         "LDR     R0, =0x2560\n"
 925         "LDR     R0, [R0,#0xC]\n"
 926         "CMP     R0, #0\n"
 927         "BEQ     loc_FF85E868\n"
 928         //"ADR     R2, 0xFF85E45C\n"
 929                 "LDR     R2, =0xFF85E45C\n"
 930         "ADD     R1, R2, #0\n"
 931         "ORR     R3, R4, #0x400\n"
 932         "BL      sub_FF8391B0\n"
 933         "TST     R0, #1\n"
 934         "CMPNE   R0, #0x15\n"
 935         "STR     R0, [R10,R4,LSL#2]\n"
 936         "BEQ     loc_FF85E560\n"
 937         "MOV     R1, #0x2C0\n"
 938 "loc_FF85E81C:\n"
 939         //"ADR     R0, 0xFF85E830\n"
 940                 "LDR     R0, =0xFF85E830\n"
 941         "BL      sub_FF81E88C\n"
 942         "B       loc_FF85E560\n"
 943                                 "NOP\n"
 944 
 945 "loc_FF85E868:\n"
 946         "LDR     R1, =0xFFB3AAE4\n"
 947         "LDR     R0, [SP,#0x30]\n"
 948         "LDR     R0, [R1,R0,LSL#2]\n"
 949         "STR     R7, [R0]\n"
 950         "LDR     R0, [SP,#0x2C]\n"
 951         "MOV     R1, #1\n"
 952         "B       loc_FF85E5D8\n"
 953 "loc_FF85E884:\n"
 954         "LDR     R0, [R8,R4,LSL#2]\n"
 955         "CMP     R0, #0\n"
 956         "LDREQ   R1, =0x2CD\n"
 957         //"ADREQ   R0, 0xFF85E830\n"
 958                 "LDREQ   R0, =0xFF85E830\n"
 959         "BLEQ    sub_FF81E88C\n"
 960         "ADD     R0, R4, R4,LSL#1\n"
 961         "ADD     R0, R9, R0,LSL#2\n"
 962         "LDR     R0, [R0,#4]\n"
 963         "BL      sub_FF894354\n"
 964         "STR     R7, [R8,R4,LSL#2]\n"
 965         "B       loc_FF85E560\n"
 966                 
 967  );
 968 }; 

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