root/platform/g11/sub/100l/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskHook
  2. CreateTask_spytask
  3. boot
  4. sub_FF810354_my
  5. sub_FF811178_my
  6. sub_FF815E34_my
  7. taskcreate_Startup_my
  8. task_Startup_my
  9. taskcreatePhySw_my
  10. init_file_modules_task
  11. sub_FF88DFCC_my
  12. sub_FF86F8AC_my
  13. sub_FF86F4E0_my
  14. sub_FF86F1DC_my
  15. JogDial_task_my

   1 /*
   2  * boot.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 #include "dryos31.h"
   8 
   9 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
  10 
  11 const char * const new_sa = &_end;
  12 
  13 // Forward declarations
  14 void JogDial_task_my(void);
  15 
  16 extern void task_CaptSeq();
  17 extern void task_ExpDrv();
  18 extern void task_FileWrite();
  19 extern void task_InitFileModules();
  20 extern void task_MovieRecord();
  21 extern void task_RotaryEncoder();
  22 
  23 void taskHook(context_t **context)
  24 {
  25     task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  26 
  27     // Replace firmware task addresses with ours
  28     if(tcb->entry == (void*)task_CaptSeq)           tcb->entry = (void*)capt_seq_task;
  29     if(tcb->entry == (void*)task_InitFileModules)   tcb->entry = (void*)init_file_modules_task;
  30     if(tcb->entry == (void*)task_MovieRecord)       tcb->entry = (void*)movie_record_task;
  31     if(tcb->entry == (void*)task_ExpDrv)            tcb->entry = (void*)exp_drv_task;
  32     if(tcb->entry == (void*)task_FileWrite)         tcb->entry = (void*)filewritetask;
  33     if(tcb->entry == (void*)task_RotaryEncoder)     tcb->entry = (void*)JogDial_task_my;
  34 }
  35 
  36 /*----------------------------------------------------------------------
  37     CreateTask_spytask
  38 -----------------------------------------------------------------------*/
  39 void CreateTask_spytask() {
  40     _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  41 };
  42 
  43 /*----------------------------------------------------------------------
  44     boot()
  45 
  46     Main entry point for the CHDK code
  47 -----------------------------------------------------------------------*/
  48 
  49 /*************************************************************/
  50 //** boot @ 0xFF81000C - 0xFF810160, length=86
  51 void __attribute__((naked,noinline)) boot() {
  52 asm volatile (
  53 "    LDR     R1, =0xC0410000 \n"
  54 "    MOV     R0, #0 \n"
  55 "    STR     R0, [R1] \n"
  56 "    MOV     R1, #0x78 \n"
  57 "    MCR     p15, 0, R1, c1, c0 \n"
  58 "    MOV     R1, #0 \n"
  59 "    MCR     p15, 0, R1, c7, c10, 4 \n"
  60 "    MCR     p15, 0, R1, c7, c5 \n"
  61 "    MCR     p15, 0, R1, c7, c6 \n"
  62 "    MOV     R0, #0x3D \n"
  63 "    MCR     p15, 0, R0, c6, c0 \n"
  64 "    MOV     R0, #0xC000002F \n"
  65 "    MCR     p15, 0, R0, c6, c1 \n"
  66 "    MOV     R0, #0x33 \n"
  67 "    MCR     p15, 0, R0, c6, c2 \n"
  68 "    MOV     R0, #0x40000033 \n"
  69 "    MCR     p15, 0, R0, c6, c3 \n"
  70 "    MOV     R0, #0x80000017 \n"
  71 "    MCR     p15, 0, R0, c6, c4 \n"
  72 "    LDR     R0, =0xFF80002D \n"
  73 "    MCR     p15, 0, R0, c6, c5 \n"
  74 "    MOV     R0, #0x34 \n"
  75 "    MCR     p15, 0, R0, c2, c0 \n"
  76 "    MOV     R0, #0x34 \n"
  77 "    MCR     p15, 0, R0, c2, c0, 1 \n"
  78 "    MOV     R0, #0x34 \n"
  79 "    MCR     p15, 0, R0, c3, c0 \n"
  80 "    LDR     R0, =0x3333330 \n"
  81 "    MCR     p15, 0, R0, c5, c0, 2 \n"
  82 "    LDR     R0, =0x3333330 \n"
  83 "    MCR     p15, 0, R0, c5, c0, 3 \n"
  84 "    MRC     p15, 0, R0, c1, c0 \n"
  85 "    ORR     R0, R0, #0x1000 \n"
  86 "    ORR     R0, R0, #4 \n"
  87 "    ORR     R0, R0, #1 \n"
  88 "    MCR     p15, 0, R0, c1, c0 \n"
  89 "    MOV     R1, #0x80000006 \n"
  90 "    MCR     p15, 0, R1, c9, c1 \n"
  91 "    MOV     R1, #6 \n"
  92 "    MCR     p15, 0, R1, c9, c1, 1 \n"
  93 "    MRC     p15, 0, R1, c1, c0 \n"
  94 "    ORR     R1, R1, #0x50000 \n"
  95 "    MCR     p15, 0, R1, c1, c0 \n"
  96 "    LDR     R2, =0xC0200000 \n"
  97 "    MOV     R1, #1 \n"
  98 "    STR     R1, [R2, #0x10C] \n"
  99 "    MOV     R1, #0xFF \n"
 100 "    STR     R1, [R2, #0xC] \n"
 101 "    STR     R1, [R2, #0x1C] \n"
 102 "    STR     R1, [R2, #0x2C] \n"
 103 "    STR     R1, [R2, #0x3C] \n"
 104 "    STR     R1, [R2, #0x4C] \n"
 105 "    STR     R1, [R2, #0x5C] \n"
 106 "    STR     R1, [R2, #0x6C] \n"
 107 "    STR     R1, [R2, #0x7C] \n"
 108 "    STR     R1, [R2, #0x8C] \n"
 109 "    STR     R1, [R2, #0x9C] \n"
 110 "    STR     R1, [R2, #0xAC] \n"
 111 "    STR     R1, [R2, #0xBC] \n"
 112 "    STR     R1, [R2, #0xCC] \n"
 113 "    STR     R1, [R2, #0xDC] \n"
 114 "    STR     R1, [R2, #0xEC] \n"
 115 "    STR     R1, [R2, #0xFC] \n"
 116 "    LDR     R1, =0xC0400008 \n"
 117 "    LDR     R2, =0x430005 \n"
 118 "    STR     R2, [R1] \n"
 119 "    MOV     R1, #1 \n"
 120 "    LDR     R2, =0xC0243100 \n"
 121 "    STR     R2, [R1] \n"
 122 "    LDR     R2, =0xC0242010 \n"
 123 "    LDR     R1, [R2] \n"
 124 "    ORR     R1, R1, #1 \n"
 125 "    STR     R1, [R2] \n"
 126 "    LDR     R0, =0xFFC0C3F8 \n"
 127 "    LDR     R1, =0x1900 \n"
 128 "    LDR     R3, =0xE90C \n"
 129 
 130 "loc_FF81013C:\n"
 131 "    CMP     R1, R3 \n"
 132 "    LDRCC   R2, [R0], #4 \n"
 133 "    STRCC   R2, [R1], #4 \n"
 134 "    BCC     loc_FF81013C \n"
 135 "    LDR     R1, =0x1411E8 \n"
 136 "    MOV     R2, #0 \n"
 137 
 138 "loc_FF810154:\n"
 139 "    CMP     R3, R1 \n"
 140 "    STRCC   R2, [R3], #4 \n"
 141 "    BCC     loc_FF810154 \n"
 142 "    B       sub_FF810354_my \n"  // --> Patched. Old value = 0xFF810354.
 143 );
 144 }
 145 
 146 /*************************************************************/
 147 //** sub_FF810354_my @ 0xFF810354 - 0xFF8103BC, length=27
 148 void __attribute__((naked,noinline)) sub_FF810354_my() {
 149 
 150     //http://chdk.setepontos.com/index.php/topic,4194.0.html
 151     *(int*)0x1930=(int)taskHook;
 152     *(int*)0x1934=(int)taskHook;
 153     *(int*)0x1938=(int)taskHook;
 154 
 155     // replacement of sub_FF85FA6C for correct power-on.
 156     //(short press = playback mode, long press = record mode)
 157     *(int*)(0x25C8)= (*(int*)0xC0220108) & 1 ? 0x1000000 : 0x2000000;
 158 
 159 asm volatile (
 160 "    LDR     R0, =0xFF8103CC \n"
 161 "    MOV     R1, #0 \n"
 162 "    LDR     R3, =0xFF810404 \n"
 163 
 164 "loc_FF810360:\n"
 165 "    CMP     R0, R3 \n"
 166 "    LDRCC   R2, [R0], #4 \n"
 167 "    STRCC   R2, [R1], #4 \n"
 168 "    BCC     loc_FF810360 \n"
 169 "    LDR     R0, =0xFF810404 \n"
 170 "    MOV     R1, #0x4B0 \n"
 171 "    LDR     R3, =0xFF810618 \n"
 172 
 173 "loc_FF81037C:\n"
 174 "    CMP     R0, R3 \n"
 175 "    LDRCC   R2, [R0], #4 \n"
 176 "    STRCC   R2, [R1], #4 \n"
 177 "    BCC     loc_FF81037C \n"
 178 "    MOV     R0, #0xD2 \n"
 179 "    MSR     CPSR_cxsf, R0 \n"
 180 "    MOV     SP, #0x1000 \n"
 181 "    MOV     R0, #0xD3 \n"
 182 "    MSR     CPSR_cxsf, R0 \n"
 183 "    MOV     SP, #0x1000 \n"
 184 "    LDR     R0, =0x6C4 \n"
 185 "    LDR     R2, =0xEEEEEEEE \n"
 186 "    MOV     R3, #0x1000 \n"
 187 
 188 "loc_FF8103B0:\n"
 189 "    CMP     R0, R3 \n"
 190 "    STRCC   R2, [R0], #4 \n"
 191 "    BCC     loc_FF8103B0 \n"
 192 "    BL      sub_FF811178_my \n"  // --> Patched. Old value = 0xFF811178.
 193 );
 194 }
 195 
 196 /*************************************************************/
 197 //** sub_FF811178_my @ 0xFF811178 - 0xFF811224, length=44
 198 void __attribute__((naked,noinline)) sub_FF811178_my() {
 199 asm volatile (
 200 "    STR     LR, [SP, #-4]! \n"
 201 "    SUB     SP, SP, #0x74 \n"
 202 "    MOV     R0, SP \n"
 203 "    MOV     R1, #0x74 \n"
 204 "    BL      sub_FFB3CC3C \n"
 205 "    MOV     R0, #0x53000 \n"
 206 "    STR     R0, [SP, #4] \n"
 207 
 208 #if defined(CHDK_NOT_IN_CANON_HEAP) // use original heap offset if CHDK is loaded in high memory
 209 "    LDR     R0, =0x1411E8 \n"
 210 #else
 211 "    LDR     R0, =new_sa\n"   // otherwise use patched value
 212 "    LDR     R0, [R0]\n"      //
 213 #endif
 214 
 215 "    LDR     R2, =0x379C00 \n"
 216 "    LDR     R1, =0x3724A8 \n"
 217 "    STR     R0, [SP, #8] \n"
 218 "    SUB     R0, R1, R0 \n"
 219 "    ADD     R3, SP, #0xC \n"
 220 "    STR     R2, [SP] \n"
 221 "    STMIA   R3, {R0-R2} \n"
 222 "    MOV     R0, #0x22 \n"
 223 "    STR     R0, [SP, #0x18] \n"
 224 "    MOV     R0, #0x68 \n"
 225 "    STR     R0, [SP, #0x1C] \n"
 226 "    LDR     R0, =0x19B \n"
 227 "    LDR     R1, =sub_FF815E34_my \n"  // --> Patched. Old value = 0xFF815E34.
 228 "    STR     R0, [SP, #0x20] \n"
 229 "    MOV     R0, #0x96 \n"
 230 "    STR     R0, [SP, #0x24] \n"
 231 "    MOV     R0, #0x78 \n"
 232 "    STR     R0, [SP, #0x28] \n"
 233 "    MOV     R0, #0x64 \n"
 234 "    STR     R0, [SP, #0x2C] \n"
 235 "    MOV     R0, #0 \n"
 236 "    STR     R0, [SP, #0x30] \n"
 237 "    STR     R0, [SP, #0x34] \n"
 238 "    MOV     R0, #0x10 \n"
 239 "    STR     R0, [SP, #0x5C] \n"
 240 "    MOV     R0, #0x800 \n"
 241 "    STR     R0, [SP, #0x60] \n"
 242 "    MOV     R0, #0xA0 \n"
 243 "    STR     R0, [SP, #0x64] \n"
 244 "    MOV     R0, #0x280 \n"
 245 "    STR     R0, [SP, #0x68] \n"
 246 "    MOV     R0, SP \n"
 247 "    MOV     R2, #0 \n"
 248 "    BL      sub_FF8133E4 \n"
 249 "    ADD     SP, SP, #0x74 \n"
 250 "    LDR     PC, [SP], #4 \n"
 251 );
 252 }
 253 
 254 /*************************************************************/
 255 //** sub_FF815E34_my @ 0xFF815E34 - 0xFF815EA8, length=30
 256 void __attribute__((naked,noinline)) sub_FF815E34_my() {
 257 asm volatile (
 258 "    STMFD   SP!, {R4,LR} \n"
 259 "    BL      sub_FF810B08 \n"
 260 "    BL      sub_FF81A148 \n"
 261 "    CMP     R0, #0 \n"
 262 "    LDRLT   R0, =0xFF815F48 /*'dmSetup'*/ \n"
 263 "    BLLT    _err_init_task \n"
 264 "    BL      sub_FF815A70 \n"
 265 "    CMP     R0, #0 \n"
 266 "    LDRLT   R0, =0xFF815F50 /*'termDriverInit'*/ \n"
 267 "    BLLT    _err_init_task \n"
 268 "    LDR     R0, =0xFF815F60 /*'/_term'*/ \n"
 269 "    BL      sub_FF815B58 \n"
 270 "    CMP     R0, #0 \n"
 271 "    LDRLT   R0, =0xFF815F68 /*'termDeviceCreate'*/ \n"
 272 "    BLLT    _err_init_task \n"
 273 "    LDR     R0, =0xFF815F60 /*'/_term'*/ \n"
 274 "    BL      sub_FF813BE0 \n"
 275 "    CMP     R0, #0 \n"
 276 "    LDRLT   R0, =0xFF815F7C /*'stdioSetup'*/ \n"
 277 "    BLLT    _err_init_task \n"
 278 "    BL      sub_FF819B5C \n"
 279 "    CMP     R0, #0 \n"
 280 "    LDRLT   R0, =0xFF815F88 /*'stdlibSetup'*/ \n"
 281 "    BLLT    _err_init_task \n"
 282 "    BL      sub_FF81165C \n"
 283 "    CMP     R0, #0 \n"
 284 "    LDRLT   R0, =0xFF815F94 /*'armlib_setup'*/ \n"
 285 "    BLLT    _err_init_task \n"
 286 "    LDMFD   SP!, {R4,LR} \n"
 287 "    B       taskcreate_Startup_my \n"  // --> Patched. Old value = 0xFF81F868.
 288 );
 289 }
 290 
 291 /*************************************************************/
 292 //** taskcreate_Startup_my @ 0xFF81F868 - 0xFF81F8D8, length=29
 293 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 294 asm volatile (
 295 "    STMFD   SP!, {R3,LR} \n"
 296 //"  BL      _sub_FF85FA64 \n"  // --> Nullsub call removed.
 297 "    BL      sub_FF83AC68 \n"
 298 "    CMP     R0, #0 \n"
 299 "    BNE     loc_FF81F8AC \n"
 300 "    BL      sub_FF834A98 \n"
 301 "    CMP     R0, #0 \n"
 302 "    BNE     loc_FF81F8AC \n"
 303 "    BL      sub_FF85FA4C \n"
 304 "    CMP     R0, #0 \n"
 305 "    BNE     loc_FF81F8AC \n"
 306 "    BL      sub_FF832A04 \n"
 307 "    LDR     R1, =0xC0220000 \n"
 308 "    MOV     R0, #0x44 \n"
 309 "    STR     R0, [R1, #0x1C] \n"
 310 "    BL      sub_FF832BF4 \n"
 311 
 312 "loc_FF81F8A8:\n"
 313 "    B       loc_FF81F8A8 \n"
 314 
 315 "loc_FF81F8AC:\n"
 316 //"  BL      _sub_FF85FA6C \n"  // Removed for correct power-on
 317 //"  BL      _sub_FF85FA68 \n"  // --> Nullsub call removed.
 318 "    BL      sub_FF838F18 \n"
 319 "    MOV     R0, #0x46 \n"
 320 "    BL      _SleepTask \n"
 321 "    LDR     R1, =0x3CE000 \n"
 322 "    MOV     R0, #0 \n"
 323 "    BL      sub_FF839360 \n"
 324 "    BL      sub_FF83910C \n"
 325 "    MOV     R3, #0 \n"
 326 "    STR     R3, [SP] \n"
 327 "    LDR     R3, =task_Startup_my \n"  // --> Patched. Old value = 0xFF81F804.
 328 "    LDR     PC, =0xFF81F8DC \n"  // Continue in firmware
 329 );
 330 }
 331 
 332 /*************************************************************/
 333 //** task_Startup_my @ 0xFF81F804 - 0xFF81F830, length=12
 334 void __attribute__((naked,noinline)) task_Startup_my() {
 335 asm volatile (
 336 "    STMFD   SP!, {R4,LR} \n"
 337 "    BL      sub_FF816490 \n"
 338 "    BL      sub_FF83441C \n"
 339 "    BL      sub_FF832674 \n"
 340 //"  BL      _sub_FF860468 \n"  // --> Nullsub call removed.
 341 "    BL      sub_FF83AE8C \n"
 342 //"  BL      _sub_FF83AD3C \n"  // Skip starting diskboot.bin again
 343 "    BL      sub_FF8955C4 \n"
 344 "    BL      sub_FF831370 \n"
 345 "    BL      sub_FF83AEBC \n"
 346 "    BL      sub_FF8386BC \n"
 347 "    BL      sub_FF83B034 \n"
 348 
 349 "    BL      CreateTask_spytask\n"  // added
 350 
 351 "    BL      taskcreatePhySw_my \n"  // --> Patched. Old value = 0xFF833224.
 352 "    LDR     PC, =0xFF81F838 \n"  // Continue in firmware
 353 );
 354 }
 355 
 356 /*************************************************************/
 357 //** taskcreatePhySw_my @ 0xFF833224 - 0xFF833244, length=9
 358 void __attribute__((naked,noinline)) taskcreatePhySw_my() {
 359 asm volatile (
 360 "    STMFD   SP!, {R3-R5,LR} \n"
 361 "    LDR     R4, =0x1C38 \n"
 362 "    LDR     R0, [R4, #0x10] \n"
 363 "    CMP     R0, #0 \n"
 364 "    BNE     sub_FF833258 \n"
 365 "    MOV     R3, #0 \n"
 366 "    STR     R3, [SP] \n"
 367 "    LDR     R3, =mykbd_task \n"  // --> Patched. Old value = 0xFF8331F0.
 368 "    MOV     R2, #0x2000 \n"  // --> Patched. Old value = 0x800. stack size for new task_PhySw
 369 "    LDR     PC, =0xFF833248 \n"  // Continue in firmware
 370 );
 371 }
 372 
 373 /*************************************************************/
 374 //** init_file_modules_task @ 0xFF898FD8 - 0xFF898FF4, length=8
 375 void __attribute__((naked,noinline)) init_file_modules_task() {
 376 asm volatile (
 377 "    STMFD   SP!, {R4-R6,LR} \n"
 378 "    BL      sub_FF88DFA0 \n"
 379 "    LDR     R5, =0x5006 \n"
 380 "    MOVS    R4, R0 \n"
 381 "    MOVNE   R1, #0 \n"
 382 "    MOVNE   R0, R5 \n"
 383 "    BLNE    _PostLogicalEventToUI \n"
 384 "    BL      sub_FF88DFCC_my \n"  // --> Patched. Old value = 0xFF88DFCC.
 385 "    BL      core_spytask_can_start\n"  // CHDK: Set "it's-safe-to-start" flag for spytask
 386 "    LDR     PC, =0xFF898FF8 \n"  // Continue in firmware
 387 );
 388 }
 389 
 390 /*************************************************************/
 391 //** sub_FF88DFCC_my @ 0xFF88DFCC - 0xFF88DFD4, length=3
 392 void __attribute__((naked,noinline)) sub_FF88DFCC_my() {
 393 asm volatile (
 394 "    STMFD   SP!, {R4,LR} \n"
 395 "    MOV     R0, #3 \n"
 396 "    BL      sub_FF86F8AC_my \n"  // --> Patched. Old value = 0xFF86F8AC.
 397 "    LDR     PC, =0xFF88DFD8 \n"  // Continue in firmware
 398 );
 399 }
 400 
 401 /*************************************************************/
 402 //** sub_FF86F8AC_my @ 0xFF86F8AC - 0xFF86F900, length=22
 403 void __attribute__((naked,noinline)) sub_FF86F8AC_my() {
 404 asm volatile (
 405 "    STMFD   SP!, {R4-R8,LR} \n"
 406 "    MOV     R8, R0 \n"
 407 "    BL      sub_FF86F82C \n"
 408 "    LDR     R1, =0x375F0 \n"
 409 "    MOV     R6, R0 \n"
 410 "    ADD     R4, R1, R0, LSL#7 \n"
 411 "    LDR     R0, [R4, #0x6C] \n"
 412 "    CMP     R0, #4 \n"
 413 "    LDREQ   R1, =0x804 \n"
 414 "    LDREQ   R0, =0xFF86F378 /*'Mounter.c'*/ \n"
 415 "    BLEQ    _DebugAssert \n"
 416 "    MOV     R1, R8 \n"
 417 "    MOV     R0, R6 \n"
 418 "    BL      sub_FF86F0CC \n"
 419 "    LDR     R0, [R4, #0x38] \n"
 420 "    BL      sub_FF86FEC8 \n"
 421 "    CMP     R0, #0 \n"
 422 "    STREQ   R0, [R4, #0x6C] \n"
 423 "    MOV     R0, R6 \n"
 424 "    BL      sub_FF86F15C \n"
 425 "    MOV     R0, R6 \n"
 426 "    BL      sub_FF86F4E0_my \n"  // --> Patched. Old value = 0xFF86F4E0.
 427 "    LDR     PC, =0xFF86F904 \n"  // Continue in firmware
 428 );
 429 }
 430 
 431 /*************************************************************/
 432 //** sub_FF86F4E0_my @ 0xFF86F4E0 - 0xFF86F508, length=11
 433 void __attribute__((naked,noinline)) sub_FF86F4E0_my() {
 434 asm volatile (
 435 "    STMFD   SP!, {R4-R6,LR} \n"
 436 "    MOV     R5, R0 \n"
 437 "    LDR     R0, =0x375F0 \n"
 438 "    ADD     R4, R0, R5, LSL#7 \n"
 439 "    LDR     R0, [R4, #0x6C] \n"
 440 "    TST     R0, #2 \n"
 441 "    MOVNE   R0, #1 \n"
 442 "    LDMNEFD SP!, {R4-R6,PC} \n"
 443 "    LDR     R0, [R4, #0x38] \n"
 444 "    MOV     R1, R5 \n"
 445 "    BL      sub_FF86F1DC_my \n"  // --> Patched. Old value = 0xFF86F1DC.
 446 "    LDR     PC, =0xFF86F50C \n"  // Continue in firmware
 447 );
 448 }
 449 
 450 /*************************************************************/
 451 //** sub_FF86F1DC_my @ 0xFF86F1DC - 0xFF86F34C, length=93
 452 void __attribute__((naked,noinline)) sub_FF86F1DC_my() {
 453 asm volatile (
 454 "    STMFD   SP!, {R4-R10,LR} \n"
 455 "    MOV     R9, R0 \n"
 456 "    LDR     R0, =0x375F0 \n"
 457 "    MOV     R8, #0 \n"
 458 "    ADD     R5, R0, R1, LSL#7 \n"
 459 "    LDR     R0, [R5, #0x3C] \n"
 460 "    MOV     R7, #0 \n"
 461 "    CMP     R0, #7 \n"
 462 "    MOV     R6, #0 \n"
 463 "    ADDLS   PC, PC, R0, LSL#2 \n"
 464 "    B       loc_FF86F334 \n"
 465 "    B       loc_FF86F240 \n"
 466 "    B       loc_FF86F228 \n"
 467 "    B       loc_FF86F228 \n"
 468 "    B       loc_FF86F228 \n"
 469 "    B       loc_FF86F228 \n"
 470 "    B       loc_FF86F32C \n"
 471 "    B       loc_FF86F228 \n"
 472 "    B       loc_FF86F228 \n"
 473 
 474 "loc_FF86F228:\n"
 475 "    MOV     R2, #0 \n"
 476 "    MOV     R1, #0x200 \n"
 477 "    MOV     R0, #2 \n"
 478 "    BL      sub_FF887FDC /*_exmem_ualloc*/ \n"
 479 "    MOVS    R4, R0 \n"
 480 "    BNE     loc_FF86F248 \n"
 481 
 482 "loc_FF86F240:\n"
 483 "    MOV     R0, #0 \n"
 484 "    LDMFD   SP!, {R4-R10,PC} \n"
 485 
 486 "loc_FF86F248:\n"
 487 "    LDR     R12, [R5, #0x50] \n"
 488 "    MOV     R3, R4 \n"
 489 "    MOV     R2, #1 \n"
 490 "    MOV     R1, #0 \n"
 491 "    MOV     R0, R9 \n"
 492 "    BLX     R12 \n"
 493 "    CMP     R0, #1 \n"
 494 "    BNE     loc_FF86F274 \n"
 495 "    MOV     R0, #2 \n"
 496 "    BL      sub_FF888128 /*_exmem_ufree*/ \n"
 497 "    B       loc_FF86F240 \n"
 498 
 499 "loc_FF86F274:\n"
 500 "    LDR     R1, [R5, #0x64] \n"
 501 "    MOV     R0, R9 \n"
 502 "    BLX     R1 \n"
 503 
 504 "    MOV     R1, R4\n"              //  pointer to MBR in R1
 505 "    BL      mbr_read_dryos\n"      //  total sectors count in R0 before and after call
 506 
 507 // Start of DataGhost's FAT32 autodetection code
 508 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 509 // According to the code below, we can use R1, R2, R3 and R12.
 510 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 511 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 512 "    MOV     R12, R4\n"             // Copy the MBR start address so we have something to work with
 513 "    MOV     LR, R4\n"              // Save old offset for MBR signature
 514 "    MOV     R1, #1\n"              // Note the current partition number
 515 "    B       dg_sd_fat32_enter\n"   // We actually need to check the first partition as well, no increments yet!
 516 "dg_sd_fat32:\n"
 517 "    CMP     R1, #4\n"              // Did we already see the 4th partition?
 518 "    BEQ     dg_sd_fat32_end\n"     // Yes, break. We didn't find anything, so don't change anything.
 519 "    ADD     R12, R12, #0x10\n"     // Second partition
 520 "    ADD     R1, R1, #1\n"          // Second partition for the loop
 521 "dg_sd_fat32_enter:\n"
 522 "    LDRB    R2, [R12, #0x1BE]\n"   // Partition status
 523 "    LDRB    R3, [R12, #0x1C2]\n"   // Partition type (FAT32 = 0xB)
 524 "    CMP     R3, #0xB\n"            // Is this a FAT32 partition?
 525 "    CMPNE   R3, #0xC\n"            // Not 0xB, is it 0xC (FAT32 LBA) then?
 526 "    CMPNE   R3, #0x7\n"            // exFat?
 527 "    BNE     dg_sd_fat32\n"         // No, it isn't. Loop again.
 528 "    CMP     R2, #0x00\n"           // It is, check the validity of the partition type
 529 "    CMPNE   R2, #0x80\n"
 530 "    BNE     dg_sd_fat32\n"         // Invalid, go to next partition
 531                                     // This partition is valid, it's the first one, bingo!
 532 "    MOV     R4, R12\n"             // Move the new MBR offset for the partition detection.
 533 
 534 "dg_sd_fat32_end:\n"
 535 // End of DataGhost's FAT32 autodetection code
 536 
 537 "    LDRB    R1, [R4, #0x1C9] \n"
 538 "    LDRB    R3, [R4, #0x1C8] \n"
 539 "    LDRB    R12, [R4, #0x1CC] \n"
 540 "    MOV     R1, R1, LSL#24 \n"
 541 "    ORR     R1, R1, R3, LSL#16 \n"
 542 "    LDRB    R3, [R4, #0x1C7] \n"
 543 "    LDRB    R2, [R4, #0x1BE] \n"
 544 //"  LDRB    LR, [R4, #0x1FF] \n"  // replaced below
 545 "    ORR     R1, R1, R3, LSL#8 \n"
 546 "    LDRB    R3, [R4, #0x1C6] \n"
 547 "    CMP     R2, #0 \n"
 548 "    CMPNE   R2, #0x80 \n"
 549 "    ORR     R1, R1, R3 \n"
 550 "    LDRB    R3, [R4, #0x1CD] \n"
 551 "    MOV     R3, R3, LSL#24 \n"
 552 "    ORR     R3, R3, R12, LSL#16 \n"
 553 "    LDRB    R12, [R4, #0x1CB] \n"
 554 "    ORR     R3, R3, R12, LSL#8 \n"
 555 "    LDRB    R12, [R4, #0x1CA] \n"
 556 "    ORR     R3, R3, R12 \n"
 557 //"  LDRB    R12, [R4, #0x1FE] \n"  // replaced below
 558 "    LDRB    R12, [LR,#0x1FE]\n"    // replace instructions above - First MBR signature byte (0x55), LR is original offset.
 559 "    LDRB    LR, [LR,#0x1FF]\n"     // replace instructions above - Last MBR signature byte (0xAA), LR is original offset.
 560 "    BNE     loc_FF86F300 \n"
 561 "    CMP     R0, R1 \n"
 562 "    BCC     loc_FF86F300 \n"
 563 "    ADD     R2, R1, R3 \n"
 564 "    CMP     R2, R0 \n"
 565 "    CMPLS   R12, #0x55 \n"
 566 "    CMPEQ   LR, #0xAA \n"
 567 "    MOVEQ   R7, R1 \n"
 568 "    MOVEQ   R6, R3 \n"
 569 "    MOVEQ   R4, #1 \n"
 570 "    BEQ     loc_FF86F304 \n"
 571 
 572 "loc_FF86F300:\n"
 573 "    MOV     R4, R8 \n"
 574 
 575 "loc_FF86F304:\n"
 576 "    MOV     R0, #2 \n"
 577 "    BL      sub_FF888128 /*_exmem_ufree*/ \n"
 578 "    CMP     R4, #0 \n"
 579 "    BNE     loc_FF86F340 \n"
 580 "    LDR     R1, [R5, #0x64] \n"
 581 "    MOV     R7, #0 \n"
 582 "    MOV     R0, R9 \n"
 583 "    BLX     R1 \n"
 584 "    MOV     R6, R0 \n"
 585 "    B       loc_FF86F340 \n"
 586 
 587 "loc_FF86F32C:\n"
 588 "    MOV     R6, #0x40 \n"
 589 "    B       loc_FF86F340 \n"
 590 
 591 "loc_FF86F334:\n"
 592 "    LDR     R1, =0x568 \n"
 593 "    LDR     R0, =0xFF86F378 /*'Mounter.c'*/ \n"
 594 "    BL      _DebugAssert \n"
 595 
 596 "loc_FF86F340:\n"
 597 "    STR     R7, [R5, #0x44]! \n"
 598 "    STMIB   R5, {R6,R8} \n"
 599 "    MOV     R0, #1 \n"
 600 "    LDMFD   SP!, {R4-R10,PC} \n"
 601 );
 602 }
 603 
 604 /*************************************************************/
 605 //** JogDial_task_my @ 0xFF860554 - 0xFF8608A4, length=213
 606 void __attribute__((naked,noinline)) JogDial_task_my() {
 607 asm volatile (
 608 "    STMFD   SP!, {R4-R11,LR} \n"
 609 "    SUB     SP, SP, #0x2C \n"
 610 "    BL      sub_FF8608FC \n"
 611 "    LDR     R1, =0x25D0 \n"
 612 "    LDR     R8, =0xFFB47918 \n"
 613 "    MOV     R0, #0 \n"
 614 "    ADD     R2, SP, #0x14 \n"
 615 "    ADD     R3, SP, #0x18 \n"
 616 "    ADD     R10, SP, #0xC \n"
 617 "    ADD     R9, SP, #0x10 \n"
 618 "    MOV     R7, #0 \n"
 619 
 620 "loc_FF860580:\n"
 621 "    ADD     R3, SP, #0x18 \n"
 622 "    ADD     R12, R3, R0, LSL#1 \n"
 623 "    ADD     R2, SP, #0x14 \n"
 624 "    STRH    R7, [R12] \n"
 625 "    ADD     R12, R2, R0, LSL#1 \n"
 626 "    STRH    R7, [R12] \n"
 627 "    STR     R7, [R9, R0, LSL#2] \n"
 628 "    STR     R7, [R10, R0, LSL#2] \n"
 629 "    ADD     R0, R0, #1 \n"
 630 "    CMP     R0, #1 \n"
 631 "    BLT     loc_FF860580 \n"
 632 
 633 "loc_FF8605AC:\n"
 634 "    LDR     R0, =0x25D0 \n"
 635 "    MOV     R2, #0 \n"
 636 "    LDR     R0, [R0, #8] \n"
 637 "    ADD     R1, SP, #4 \n"
 638 "    BL      sub_FF83894C /*_ReceiveMessageQueue*/ \n"
 639 "    TST     R0, #1 \n"
 640 "    LDRNE   R1, =0x226 \n"
 641 "    LDRNE   R0, =0xFF860830 /*'JogDial.c'*/ \n"
 642 "    BLNE    _DebugAssert \n"
 643 //------------------  added code ---------------------
 644 "labelA:\n"
 645 "    LDR     R0, =jogdial_stopped\n"
 646 "    LDR     R0, [R0]\n"
 647 "    CMP     R0, #1\n"
 648 "    BNE     labelB\n"
 649 "    MOV     R0, #40\n"
 650 "    BL      _SleepTask\n"
 651 "    B       labelA\n"
 652 "labelB:\n"
 653 //------------------  original code ------------------
 654 "    LDR     R0, [SP, #4] \n"
 655 "    AND     R4, R0, #0xFF \n"
 656 "    AND     R0, R0, #0xFF00 \n"
 657 "    CMP     R0, #0x100 \n"
 658 "    BEQ     loc_FF860630 \n"
 659 "    CMP     R0, #0x200 \n"
 660 "    BEQ     loc_FF860668 \n"
 661 "    CMP     R0, #0x300 \n"
 662 "    BEQ     loc_FF86087C \n"
 663 "    CMP     R0, #0x400 \n"
 664 "    BNE     loc_FF8605AC \n"
 665 "    CMP     R4, #0 \n"
 666 "    LDRNE   R1, =0x2CA \n"
 667 "    LDRNE   R0, =0xFF860830 /*'JogDial.c'*/ \n"
 668 "    BLNE    _DebugAssert \n"
 669 "    LDR     R2, =0xFFB47904 \n"
 670 "    ADD     R0, R4, R4, LSL#2 \n"
 671 "    LDR     R1, [R2, R0, LSL#2] \n"
 672 "    STR     R7, [R1] \n"
 673 "    MOV     R1, #1 \n"
 674 "    ADD     R0, R2, R0, LSL#2 \n"
 675 
 676 "loc_FF860624:\n"
 677 "    LDR     R0, [R0, #8] \n"
 678 "    STR     R1, [R0] \n"
 679 "    B       loc_FF8605AC \n"
 680 
 681 "loc_FF860630:\n"
 682 "    LDR     R5, =0x25E0 \n"
 683 "    LDR     R0, [R5, R4, LSL#2] \n"
 684 "    BL      sub_FF8398E4 /*_CancelTimer*/ \n"
 685 "    LDR     R2, =0xFF8604E0 \n"
 686 "    MOV     R1, R2 \n"
 687 "    ORR     R3, R4, #0x200 \n"
 688 "    MOV     R0, #0x28 \n"
 689 "    BL      sub_FF839800 /*_SetTimerAfter*/ \n"
 690 "    TST     R0, #1 \n"
 691 "    CMPNE   R0, #0x15 \n"
 692 "    STR     R0, [R10, R4, LSL#2] \n"
 693 "    BEQ     loc_FF8605AC \n"
 694 "    LDR     R1, =0x23B \n"
 695 "    B       loc_FF860820 \n"
 696 
 697 "loc_FF860668:\n"
 698 "    LDR     R1, =0xFFB47904 \n"
 699 "    ADD     R0, R4, R4, LSL#2 \n"
 700 "    STR     R0, [SP, #0x28] \n"
 701 "    ADD     R0, R1, R0, LSL#2 \n"
 702 "    STR     R0, [SP, #0x24] \n"
 703 "    LDR     R0, [R0, #4] \n"
 704 "    LDR     R0, [R0] \n"
 705 "    MOV     R2, R0, ASR#16 \n"
 706 "    ADD     R0, SP, #0x18 \n"
 707 "    ADD     R0, R0, R4, LSL#1 \n"
 708 "    STR     R0, [SP, #0x20] \n"
 709 "    STRH    R2, [R0] \n"
 710 "    ADD     R0, SP, #0x14 \n"
 711 "    ADD     R0, R0, R4, LSL#1 \n"
 712 "    STR     R0, [SP, #0x1C] \n"
 713 "    LDRSH   R3, [R0] \n"
 714 "    SUB     R0, R2, R3 \n"
 715 "    CMP     R0, #0 \n"
 716 "    BEQ     loc_FF8607D8 \n"
 717 "    MOV     R1, R0 \n"
 718 "    RSBLT   R0, R0, #0 \n"
 719 "    MOVLE   R5, #0 \n"
 720 "    MOVGT   R5, #1 \n"
 721 "    CMP     R0, #0xFF \n"
 722 "    BLS     loc_FF8606F4 \n"
 723 "    CMP     R1, #0 \n"
 724 "    RSBLE   R0, R3, #0xFF \n"
 725 "    ADDLE   R0, R0, #0x7F00 \n"
 726 "    ADDLE   R0, R0, R2 \n"
 727 "    RSBGT   R0, R2, #0xFF \n"
 728 "    ADDGT   R0, R0, #0x7F00 \n"
 729 "    ADDGT   R0, R0, R3 \n"
 730 "    ADD     R0, R0, #0x8000 \n"
 731 "    ADD     R0, R0, #1 \n"
 732 "    EOR     R5, R5, #1 \n"
 733 
 734 "loc_FF8606F4:\n"
 735 "    STR     R0, [SP, #8] \n"
 736 "    LDR     R0, [R9, R4, LSL#2] \n"
 737 "    CMP     R0, #0 \n"
 738 "    BEQ     loc_FF860744 \n"
 739 "    LDR     R1, =0xFFB478FC \n"
 740 "    ADD     R1, R1, R4, LSL#3 \n"
 741 "    LDR     R1, [R1, R5, LSL#2] \n"
 742 "    CMP     R1, R0 \n"
 743 "    BEQ     loc_FF860760 \n"
 744 "    ADD     R11, R4, R4, LSL#1 \n"
 745 "    ADD     R6, R8, R11, LSL#2 \n"
 746 "    LDRB    R0, [R6, #9] \n"
 747 "    CMP     R0, #1 \n"
 748 "    LDREQ   R0, [R6, #4] \n"
 749 "    BLEQ    sub_FF89506C \n"
 750 "    LDRB    R0, [R6, #8] \n"
 751 "    CMP     R0, #1 \n"
 752 "    BNE     loc_FF860760 \n"
 753 "    LDR     R0, [R8, R11, LSL#2] \n"
 754 "    B       loc_FF86075C \n"
 755 
 756 "loc_FF860744:\n"
 757 "    ADD     R0, R4, R4, LSL#1 \n"
 758 "    ADD     R1, R8, R0, LSL#2 \n"
 759 "    LDRB    R1, [R1, #8] \n"
 760 "    CMP     R1, #1 \n"
 761 "    BNE     loc_FF860760 \n"
 762 "    LDR     R0, [R8, R0, LSL#2] \n"
 763 
 764 "loc_FF86075C:\n"
 765 "    BL      sub_FF89506C \n"
 766 
 767 "loc_FF860760:\n"
 768 "    LDR     R0, =0xFFB478FC \n"
 769 "    LDR     R1, [SP, #8] \n"
 770 "    ADD     R6, R0, R4, LSL#3 \n"
 771 "    LDR     R0, [R6, R5, LSL#2] \n"
 772 "    BL      sub_FF894F9C \n"
 773 "    LDR     R0, [R6, R5, LSL#2] \n"
 774 "    STR     R0, [R9, R4, LSL#2] \n"
 775 "    LDR     R0, [SP, #0x20] \n"
 776 "    LDR     R1, [SP, #0x1C] \n"
 777 "    LDRH    R0, [R0] \n"
 778 "    STRH    R0, [R1] \n"
 779 "    ADD     R0, R4, R4, LSL#1 \n"
 780 "    ADD     R0, R8, R0, LSL#2 \n"
 781 "    LDRB    R0, [R0, #9] \n"
 782 "    CMP     R0, #1 \n"
 783 "    BNE     loc_FF8607D8 \n"
 784 "    LDR     R5, =0x25E0 \n"
 785 "    LDR     R0, [R5, R4, LSL#2] \n"
 786 "    BL      sub_FF8398E4 /*_CancelTimer*/ \n"
 787 "    LDR     R2, =0xFF8604EC \n"
 788 "    MOV     R1, R2 \n"
 789 "    ORR     R3, R4, #0x300 \n"
 790 "    MOV     R0, #0x1F4 \n"
 791 "    BL      sub_FF839800 /*_SetTimerAfter*/ \n"
 792 "    TST     R0, #1 \n"
 793 "    CMPNE   R0, #0x15 \n"
 794 "    STR     R0, [R5, R4, LSL#2] \n"
 795 "    LDRNE   R0, =0xFF860830 /*'JogDial.c'*/ \n"
 796 "    MOVNE   R1, #0x2A4 \n"
 797 "    BLNE    _DebugAssert \n"
 798 
 799 "loc_FF8607D8:\n"
 800 "    ADD     R0, R4, R4, LSL#1 \n"
 801 "    ADD     R0, R8, R0, LSL#2 \n"
 802 "    LDRB    R0, [R0, #0xA] \n"
 803 "    CMP     R0, #1 \n"
 804 "    BNE     loc_FF860860 \n"
 805 "    LDR     R0, =0x25D0 \n"
 806 "    LDR     R0, [R0, #0xC] \n"
 807 "    CMP     R0, #0 \n"
 808 "    BEQ     loc_FF860860 \n"
 809 "    LDR     R2, =0xFF8604E0 \n"
 810 "    MOV     R1, R2 \n"
 811 "    ORR     R3, R4, #0x400 \n"
 812 "    BL      sub_FF839800 /*_SetTimerAfter*/ \n"
 813 "    TST     R0, #1 \n"
 814 "    CMPNE   R0, #0x15 \n"
 815 "    STR     R0, [R10, R4, LSL#2] \n"
 816 "    BEQ     loc_FF8605AC \n"
 817 "    LDR     R1, =0x2AF \n"
 818 
 819 "loc_FF860820:\n"
 820 "    LDR     R0, =0xFF860830 /*'JogDial.c'*/ \n"
 821 "    BL      _DebugAssert \n"
 822 "    B       loc_FF8605AC \n"
 823 
 824 "loc_FF860860:\n"
 825 "    LDR     R1, =0xFFB47904 \n"
 826 "    LDR     R0, [SP, #0x28] \n"
 827 "    LDR     R0, [R1, R0, LSL#2] \n"
 828 "    STR     R7, [R0] \n"
 829 "    LDR     R0, [SP, #0x24] \n"
 830 "    MOV     R1, #1 \n"
 831 "    B       loc_FF860624 \n"
 832 
 833 "loc_FF86087C:\n"
 834 "    LDR     R0, [R9, R4, LSL#2] \n"
 835 "    CMP     R0, #0 \n"
 836 "    MOVEQ   R1, #0x2BC \n"
 837 "    LDREQ   R0, =0xFF860830 /*'JogDial.c'*/ \n"
 838 "    BLEQ    _DebugAssert \n"
 839 "    ADD     R0, R4, R4, LSL#1 \n"
 840 "    ADD     R0, R8, R0, LSL#2 \n"
 841 "    LDR     R0, [R0, #4] \n"
 842 "    BL      sub_FF89506C \n"
 843 "    STR     R7, [R9, R4, LSL#2] \n"
 844 "    B       loc_FF8605AC \n"
 845 );
 846 }

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