root/platform/sx10/sub/102b/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskHook
  2. CreateTask_spytask
  3. boot
  4. sub_FF8101A0_my
  5. sub_FF810F94_my
  6. sub_FF814D8C_my
  7. taskcreate_Startup_my
  8. task_Startup_my
  9. taskcreatePhySw_my
  10. init_file_modules_task
  11. sub_FF87A044_my
  12. sub_FF85AB08_my
  13. sub_FF85A944_my
  14. sub_FF85A6D4_my
  15. JogDial_task_my

   1 /*
   2  * boot.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 #include "dryos31.h"
   8 
   9 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
  10 
  11 const char * const new_sa = &_end;
  12 
  13 extern void task_CaptSeq();
  14 extern void task_InitFileModules();
  15 extern void task_MovieRecord();
  16 extern void task_ExpDrv();
  17 extern void task_FileWrite();
  18 extern void task_RotaryEncoder();
  19 void JogDial_task_my(void);
  20 
  21 void taskHook(context_t **context)
  22 {
  23     task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  24 
  25     // Replace firmware task addresses with ours
  26     if(tcb->entry == (void*)task_CaptSeq)           tcb->entry = (void*)capt_seq_task;
  27     if(tcb->entry == (void*)task_InitFileModules)   tcb->entry = (void*)init_file_modules_task;
  28     if(tcb->entry == (void*)task_MovieRecord)       tcb->entry = (void*)movie_record_task;
  29     if(tcb->entry == (void*)task_ExpDrv)            tcb->entry = (void*)exp_drv_task;
  30     if(tcb->entry == (void*)task_RotaryEncoder)     tcb->entry = (void*)JogDial_task_my;
  31     if(tcb->entry == (void*)task_FileWrite)         tcb->entry = (void*)filewritetask;
  32 }
  33 
  34 /*----------------------------------------------------------------------
  35     CreateTask_spytask
  36 -----------------------------------------------------------------------*/
  37 void CreateTask_spytask() {
  38     _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  39 };
  40 
  41 /*----------------------------------------------------------------------
  42     boot()
  43 
  44     Main entry point for the CHDK code
  45 -----------------------------------------------------------------------*/
  46 
  47 /*************************************************************/
  48 //** boot @ 0xFF81000C - 0xFF810160, length=86
  49 void __attribute__((naked,noinline)) boot() {
  50 asm volatile (
  51 "    LDR     R1, =0xC0410000 \n"
  52 "    MOV     R0, #0 \n"
  53 "    STR     R0, [R1] \n"
  54 "    MOV     R1, #0x78 \n"
  55 "    MCR     p15, 0, R1, c1, c0 \n"
  56 "    MOV     R1, #0 \n"
  57 "    MCR     p15, 0, R1, c7, c10, 4 \n"
  58 "    MCR     p15, 0, R1, c7, c5 \n"
  59 "    MCR     p15, 0, R1, c7, c6 \n"
  60 "    MOV     R0, #0x3D \n"
  61 "    MCR     p15, 0, R0, c6, c0 \n"
  62 "    MOV     R0, #0xC000002F \n"
  63 "    MCR     p15, 0, R0, c6, c1 \n"
  64 "    MOV     R0, #0x33 \n"
  65 "    MCR     p15, 0, R0, c6, c2 \n"
  66 "    MOV     R0, #0x40000033 \n"
  67 "    MCR     p15, 0, R0, c6, c3 \n"
  68 "    MOV     R0, #0x80000017 \n"
  69 "    MCR     p15, 0, R0, c6, c4 \n"
  70 "    LDR     R0, =0xFF80002D \n"
  71 "    MCR     p15, 0, R0, c6, c5 \n"
  72 "    MOV     R0, #0x34 \n"
  73 "    MCR     p15, 0, R0, c2, c0 \n"
  74 "    MOV     R0, #0x34 \n"
  75 "    MCR     p15, 0, R0, c2, c0, 1 \n"
  76 "    MOV     R0, #0x34 \n"
  77 "    MCR     p15, 0, R0, c3, c0 \n"
  78 "    LDR     R0, =0x3333330 \n"
  79 "    MCR     p15, 0, R0, c5, c0, 2 \n"
  80 "    LDR     R0, =0x3333330 \n"
  81 "    MCR     p15, 0, R0, c5, c0, 3 \n"
  82 "    MRC     p15, 0, R0, c1, c0 \n"
  83 "    ORR     R0, R0, #0x1000 \n"
  84 "    ORR     R0, R0, #4 \n"
  85 "    ORR     R0, R0, #1 \n"
  86 "    MCR     p15, 0, R0, c1, c0 \n"
  87 "    MOV     R1, #0x80000006 \n"
  88 "    MCR     p15, 0, R1, c9, c1 \n"
  89 "    MOV     R1, #6 \n"
  90 "    MCR     p15, 0, R1, c9, c1, 1 \n"
  91 "    MRC     p15, 0, R1, c1, c0 \n"
  92 "    ORR     R1, R1, #0x50000 \n"
  93 "    MCR     p15, 0, R1, c1, c0 \n"
  94 "    LDR     R2, =0xC0200000 \n"
  95 "    MOV     R1, #1 \n"
  96 "    STR     R1, [R2, #0x10C] \n"
  97 "    MOV     R1, #0xFF \n"
  98 "    STR     R1, [R2, #0xC] \n"
  99 "    STR     R1, [R2, #0x1C] \n"
 100 "    STR     R1, [R2, #0x2C] \n"
 101 "    STR     R1, [R2, #0x3C] \n"
 102 "    STR     R1, [R2, #0x4C] \n"
 103 "    STR     R1, [R2, #0x5C] \n"
 104 "    STR     R1, [R2, #0x6C] \n"
 105 "    STR     R1, [R2, #0x7C] \n"
 106 "    STR     R1, [R2, #0x8C] \n"
 107 "    STR     R1, [R2, #0x9C] \n"
 108 "    STR     R1, [R2, #0xAC] \n"
 109 "    STR     R1, [R2, #0xBC] \n"
 110 "    STR     R1, [R2, #0xCC] \n"
 111 "    STR     R1, [R2, #0xDC] \n"
 112 "    STR     R1, [R2, #0xEC] \n"
 113 "    STR     R1, [R2, #0xFC] \n"
 114 "    LDR     R1, =0xC0400008 \n"
 115 "    LDR     R2, =0x430005 \n"
 116 "    STR     R2, [R1] \n"
 117 "    MOV     R1, #1 \n"
 118 "    LDR     R2, =0xC0243100 \n"
 119 "    STR     R2, [R1] \n"
 120 "    LDR     R2, =0xC0242010 \n"
 121 "    LDR     R1, [R2] \n"
 122 "    ORR     R1, R1, #1 \n"
 123 "    STR     R1, [R2] \n"
 124 "    LDR     R0, =0xFFB9B3D4 \n"
 125 "    LDR     R1, =0x1900 \n"
 126 "    LDR     R3, =0x10A58 \n"
 127 
 128 "loc_FF81013C:\n"
 129 "    CMP     R1, R3 \n"
 130 "    LDRCC   R2, [R0], #4 \n"
 131 "    STRCC   R2, [R1], #4 \n"
 132 "    BCC     loc_FF81013C \n"
 133 "    LDR     R1, =0xACB74 \n"
 134 "    MOV     R2, #0 \n"
 135 
 136 "loc_FF810154:\n"
 137 "    CMP     R3, R1 \n"
 138 "    STRCC   R2, [R3], #4 \n"
 139 "    BCC     loc_FF810154 \n"
 140 "    B       sub_FF8101A0_my \n"  // --> Patched. Old value = 0xFF8101A0.
 141 );
 142 }
 143 
 144 /*************************************************************/
 145 //** sub_FF8101A0_my @ 0xFF8101A0 - 0xFF810208, length=27
 146 void __attribute__((naked,noinline)) sub_FF8101A0_my() {
 147 
 148     *(int*)0x1930=(int)taskHook;
 149     *(int*)0x1934=(int)taskHook;
 150 
 151     // replacement of sub_FF8218C8 for correct power-on.
 152     //(short press = playback mode, long press = record mode)
 153     *(int*)(0x25BC+0x4)= (*(int*)0xC0220134)&1 ? 0x2000000 : 0x1000000;
 154 
 155 asm volatile (
 156 "    LDR     R0, =0xFF810218 \n"
 157 "    MOV     R1, #0 \n"
 158 "    LDR     R3, =0xFF810250 \n"
 159 
 160 "loc_FF8101AC:\n"
 161 "    CMP     R0, R3 \n"
 162 "    LDRCC   R2, [R0], #4 \n"
 163 "    STRCC   R2, [R1], #4 \n"
 164 "    BCC     loc_FF8101AC \n"
 165 "    LDR     R0, =0xFF810250 \n"
 166 "    MOV     R1, #0x4B0 \n"
 167 "    LDR     R3, =0xFF810464 \n"
 168 
 169 "loc_FF8101C8:\n"
 170 "    CMP     R0, R3 \n"
 171 "    LDRCC   R2, [R0], #4 \n"
 172 "    STRCC   R2, [R1], #4 \n"
 173 "    BCC     loc_FF8101C8 \n"
 174 "    MOV     R0, #0xD2 \n"
 175 "    MSR     CPSR_cxsf, R0 \n"
 176 "    MOV     SP, #0x1000 \n"
 177 "    MOV     R0, #0xD3 \n"
 178 "    MSR     CPSR_cxsf, R0 \n"
 179 "    MOV     SP, #0x1000 \n"
 180 "    LDR     R0, =0x6C4 \n"
 181 "    LDR     R2, =0xEEEEEEEE \n"
 182 "    MOV     R3, #0x1000 \n"
 183 
 184 "loc_FF8101FC:\n"
 185 "    CMP     R0, R3 \n"
 186 "    STRCC   R2, [R0], #4 \n"
 187 "    BCC     loc_FF8101FC \n"
 188 "    BL      sub_FF810F94_my \n"  // --> Patched. Old value = 0xFF810F94.
 189 );
 190 }
 191 
 192 /*************************************************************/
 193 //** sub_FF810F94_my @ 0xFF810F94 - 0xFF811040, length=44
 194 void __attribute__((naked,noinline)) sub_FF810F94_my() {
 195 asm volatile (
 196 "    STR     LR, [SP, #-4]! \n"
 197 "    SUB     SP, SP, #0x74 \n"
 198 "    MOV     R0, SP \n"
 199 "    MOV     R1, #0x74 \n"
 200 "    BL      sub_FFB003BC \n"
 201 "    MOV     R0, #0x53000 \n"
 202 "    STR     R0, [SP, #4] \n"
 203 
 204 #if defined(CHDK_NOT_IN_CANON_HEAP) // use original heap offset if CHDK is loaded in high memory
 205 "    LDR     R0, =0xACB74 \n"
 206 #else
 207 "    LDR     R0, =new_sa\n"   // otherwise use patched value
 208 "    LDR     R0, [R0]\n"      //
 209 #endif
 210 
 211 "    LDR     R2, =0x2B9C00 \n"
 212 "    LDR     R1, =0x2B24A8 \n"
 213 "    STR     R0, [SP, #8] \n"
 214 "    SUB     R0, R1, R0 \n"
 215 "    ADD     R3, SP, #0xC \n"
 216 "    STR     R2, [SP] \n"
 217 "    STMIA   R3, {R0-R2} \n"
 218 "    MOV     R0, #0x22 \n"
 219 "    STR     R0, [SP, #0x18] \n"
 220 "    MOV     R0, #0x68 \n"
 221 "    STR     R0, [SP, #0x1C] \n"
 222 "    LDR     R0, =0x19B \n"
 223 "    LDR     R1, =sub_FF814D8C_my \n"  // --> Patched. Old value = 0xFF814D8C.
 224 "    STR     R0, [SP, #0x20] \n"
 225 "    MOV     R0, #0x96 \n"
 226 "    STR     R0, [SP, #0x24] \n"
 227 "    MOV     R0, #0x78 \n"
 228 "    STR     R0, [SP, #0x28] \n"
 229 "    MOV     R0, #0x64 \n"
 230 "    STR     R0, [SP, #0x2C] \n"
 231 "    MOV     R0, #0 \n"
 232 "    STR     R0, [SP, #0x30] \n"
 233 "    STR     R0, [SP, #0x34] \n"
 234 "    MOV     R0, #0x10 \n"
 235 "    STR     R0, [SP, #0x5C] \n"
 236 "    MOV     R0, #0x800 \n"
 237 "    STR     R0, [SP, #0x60] \n"
 238 "    MOV     R0, #0xA0 \n"
 239 "    STR     R0, [SP, #0x64] \n"
 240 "    MOV     R0, #0x280 \n"
 241 "    STR     R0, [SP, #0x68] \n"
 242 "    MOV     R0, SP \n"
 243 "    MOV     R2, #0 \n"
 244 "    BL      sub_FF812D38 \n"
 245 "    ADD     SP, SP, #0x74 \n"
 246 "    LDR     PC, [SP], #4 \n"
 247 );
 248 }
 249 
 250 /*************************************************************/
 251 //** sub_FF814D8C_my @ 0xFF814D8C - 0xFF814E00, length=30
 252 void __attribute__((naked,noinline)) sub_FF814D8C_my() {
 253 asm volatile (
 254 "    STMFD   SP!, {R4,LR} \n"
 255 "    BL      sub_FF810940 \n"
 256 "    BL      sub_FF81901C \n"
 257 "    CMP     R0, #0 \n"
 258 "    LDRLT   R0, =0xFF814EA0 /*'dmSetup'*/ \n"
 259 "    BLLT    _err_init_task \n"
 260 "    BL      sub_FF8149B4 \n"
 261 "    CMP     R0, #0 \n"
 262 "    LDRLT   R0, =0xFF814EA8 /*'termDriverInit'*/ \n"
 263 "    BLLT    _err_init_task \n"
 264 "    LDR     R0, =0xFF814EB8 /*'/_term'*/ \n"
 265 "    BL      sub_FF814A9C \n"
 266 "    CMP     R0, #0 \n"
 267 "    LDRLT   R0, =0xFF814EC0 /*'termDeviceCreate'*/ \n"
 268 "    BLLT    _err_init_task \n"
 269 "    LDR     R0, =0xFF814EB8 /*'/_term'*/ \n"
 270 "    BL      sub_FF813548 \n"
 271 "    CMP     R0, #0 \n"
 272 "    LDRLT   R0, =0xFF814ED4 /*'stdioSetup'*/ \n"
 273 "    BLLT    _err_init_task \n"
 274 "    BL      sub_FF818BA4 \n"
 275 "    CMP     R0, #0 \n"
 276 "    LDRLT   R0, =0xFF814EE0 /*'stdlibSetup'*/ \n"
 277 "    BLLT    _err_init_task \n"
 278 "    BL      sub_FF811478 \n"
 279 "    CMP     R0, #0 \n"
 280 "    LDRLT   R0, =0xFF814EEC /*'armlib_setup'*/ \n"
 281 "    BLLT    _err_init_task \n"
 282 "    LDMFD   SP!, {R4,LR} \n"
 283 "    B       taskcreate_Startup_my \n"  // --> Patched. Old value = 0xFF81C1A8.
 284 );
 285 }
 286 
 287 /*************************************************************/
 288 //** taskcreate_Startup_my @ 0xFF81C1A8 - 0xFF81C21C, length=30
 289 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 290 asm volatile (
 291 "    STMFD   SP!, {R3,LR} \n"
 292 //"  BL      _sub_FF84AED0 \n"  // --> Nullsub call removed.
 293 "    BL      sub_FF829940 \n"
 294 "    CMP     R0, #0 \n"
 295 "    BNE     loc_FF81C1E0 \n"
 296 "    BL      sub_FF84AEB4 \n"
 297 "    CMP     R0, #0 \n"
 298 "    BNE     loc_FF81C1E0 \n"
 299 "    BL      sub_FF821050 \n"
 300 "    LDR     R1, =0xC0220000 \n"
 301 "    MOV     R0, #0x44 \n"
 302 "    STR     R0, [R1, #0x1C] \n"
 303 "    BL      sub_FF82123C \n"
 304 
 305 "loc_FF81C1DC:\n"
 306 "    B       loc_FF81C1DC \n"
 307 
 308 "loc_FF81C1E0:\n"
 309 //"  BL      _sub_FF84AED8 \n"  // Removed for correct power-on
 310 //"  BL      _sub_FF84AED4 \n"  // --> Nullsub call removed.
 311 "    BL      sub_FF827AC8 \n"
 312 "    LDR     R1, =0x30E000 \n"
 313 "    MOV     R0, #0 \n"
 314 "    BL      sub_FF827F10 \n"
 315 "    BL      sub_FF827CBC \n"
 316 "    MOV     R3, #0 \n"
 317 "    STR     R3, [SP] \n"
 318 "    LDR     R3, =task_Startup_my \n"  // --> Patched. Old value = 0xFF81C144.
 319 "    MOV     R2, #0 \n"
 320 "    MOV     R1, #0x19 \n"
 321 "    LDR     R0, =0xFF81C228 /*'Startup'*/ \n"
 322 "    BL      _CreateTask \n"
 323 "    MOV     R0, #0 \n"
 324 "    LDMFD   SP!, {R12,PC} \n"
 325 );
 326 }
 327 
 328 /*************************************************************/
 329 //** task_Startup_my @ 0xFF81C144 - 0xFF81C1A4, length=25
 330 void __attribute__((naked,noinline)) task_Startup_my() {
 331 asm volatile (
 332 "    STMFD   SP!, {R4,LR} \n"
 333 "    BL      sub_FF8153CC \n"
 334 "    BL      sub_FF822A24 \n"
 335 "    BL      sub_FF820CE8 \n"
 336 //"  BL      _sub_FF84B83C \n"  // --> Nullsub call removed.
 337 "    BL      sub_FF829B48 \n"
 338 //"  BL      _sub_FF829A08 \n"  // start diskboot.bin
 339 "    BL      sub_FF881240 \n"
 340 "    BL      sub_FF81FAA0 \n"
 341 "    BL      sub_FF829B98 \n"
 342 "    BL      sub_FF8270C8 \n"
 343 "    BL      sub_FF829D04 \n"
 344 "    BL      CreateTask_spytask\n"  // added
 345 "    BL      taskcreatePhySw_my \n"  // --> Patched. Old value = 0xFF8217B8.
 346 "    BL      sub_FF8249EC \n"
 347 "    BL      sub_FF829D1C \n"
 348 //"  BL      _sub_FF81EEF8 \n"  // --> Nullsub call removed.
 349 "    BL      sub_FF82062C \n"
 350 "    BL      sub_FF829718 \n"
 351 "    BL      sub_FF820C98 \n"
 352 "    BL      sub_FF820548 \n"
 353 "    BL      sub_FF81FAD4 \n"
 354 "    BL      sub_FF82A854 \n"
 355 "    BL      sub_FF820520 \n"
 356 "    LDMFD   SP!, {R4,LR} \n"
 357 "    B       sub_FF815490 \n"
 358 );
 359 }
 360 
 361 /*************************************************************/
 362 //** taskcreatePhySw_my @ 0xFF8217B8 - 0xFF8217D8, length=9
 363 void __attribute__((naked,noinline)) taskcreatePhySw_my() {
 364 asm volatile (
 365 "    STMFD   SP!, {R3-R5,LR} \n"
 366 "    LDR     R4, =0x1C24 \n"
 367 "    LDR     R0, [R4, #0x10] \n"
 368 "    CMP     R0, #0 \n"
 369 "    BNE     sub_FF8217EC \n"
 370 "    MOV     R3, #0 \n"
 371 "    STR     R3, [SP] \n"
 372 "    LDR     R3, =mykbd_task \n"  // --> Patched. Old value = 0xFF821784.
 373 "    MOV     R2, #0x2000 \n"  // --> Patched. Old value = 0x800. stack size for new task_PhySw
 374 "    LDR     PC, =0xFF8217DC \n"  // Continue in firmware
 375 );
 376 }
 377 
 378 /*************************************************************/
 379 //** init_file_modules_task @ 0xFF884AF4 - 0xFF884B28, length=14
 380 void __attribute__((naked,noinline)) init_file_modules_task() {
 381 asm volatile (
 382 "    STMFD   SP!, {R4-R6,LR} \n"
 383 "    BL      sub_FF87A018 \n"
 384 "    LDR     R5, =0x5006 \n"
 385 "    MOVS    R4, R0 \n"
 386 "    MOVNE   R1, #0 \n"
 387 "    MOVNE   R0, R5 \n"
 388 "    BLNE    _PostLogicalEventToUI \n"
 389 "    BL      sub_FF87A044_my \n"  // --> Patched. Old value = 0xFF87A044.
 390 "    BL      core_spytask_can_start\n"  // CHDK: Set "it's-safe-to-start" flag for spytask
 391 "    CMP     R4, #0 \n"
 392 "    MOVEQ   R0, R5 \n"
 393 "    LDMEQFD SP!, {R4-R6,LR} \n"
 394 "    MOVEQ   R1, #0 \n"
 395 "    BEQ     _PostLogicalEventToUI \n"
 396 "    LDMFD   SP!, {R4-R6,PC} \n"
 397 );
 398 }
 399 
 400 /*************************************************************/
 401 //** sub_FF87A044_my @ 0xFF87A044 - 0xFF87A048, length=2
 402 void __attribute__((naked,noinline)) sub_FF87A044_my() {
 403 asm volatile (
 404 "    STMFD   SP!, {R4,LR} \n"
 405 "    BL      sub_FF85AB08_my \n"  // --> Patched. Old value = 0xFF85AB08.
 406 "    LDR     PC, =0xFF87A04C \n"  // Continue in firmware
 407 );
 408 }
 409 
 410 /*************************************************************/
 411 //** sub_FF85AB08_my @ 0xFF85AB08 - 0xFF85AB48, length=17
 412 void __attribute__((naked,noinline)) sub_FF85AB08_my() {
 413 asm volatile (
 414 "    STMFD   SP!, {R4-R6,LR} \n"
 415 "    MOV     R6, #0 \n"
 416 "    MOV     R0, R6 \n"
 417 "    BL      sub_FF85A5C8 \n"
 418 "    LDR     R4, =0x1A784 \n"
 419 "    MOV     R5, #0 \n"
 420 "    LDR     R0, [R4, #0x38] \n"
 421 "    BL      sub_FF85B028 \n"
 422 "    CMP     R0, #0 \n"
 423 "    LDREQ   R0, =0x2A70 \n"
 424 "    STREQ   R5, [R0, #0x10] \n"
 425 "    STREQ   R5, [R0, #0x14] \n"
 426 "    STREQ   R5, [R0, #0x18] \n"
 427 "    MOV     R0, R6 \n"
 428 "    BL      sub_FF85A608 \n"
 429 "    MOV     R0, R6 \n"
 430 "    BL      sub_FF85A944_my \n"  // --> Patched. Old value = 0xFF85A944.
 431 "    LDR     PC, =0xFF85AB4C \n"  // Continue in firmware
 432 );
 433 }
 434 
 435 /*************************************************************/
 436 //** sub_FF85A944_my @ 0xFF85A944 - 0xFF85A978, length=14
 437 void __attribute__((naked,noinline)) sub_FF85A944_my() {
 438 asm volatile (
 439 "    STMFD   SP!, {R4-R6,LR} \n"
 440 "    LDR     R5, =0x2A70 \n"
 441 "    MOV     R6, R0 \n"
 442 "    LDR     R0, [R5, #0x14] \n"
 443 "    CMP     R0, #0 \n"
 444 "    MOVNE   R0, #1 \n"
 445 "    LDMNEFD SP!, {R4-R6,PC} \n"
 446 "    MOV     R0, #0x17 \n"
 447 "    MUL     R1, R0, R6 \n"
 448 "    LDR     R0, =0x1A784 \n"
 449 "    ADD     R4, R0, R1, LSL#2 \n"
 450 "    LDR     R0, [R4, #0x38] \n"
 451 "    MOV     R1, R6 \n"
 452 "    BL      sub_FF85A6D4_my \n"  // --> Patched. Old value = 0xFF85A6D4.
 453 "    LDR     PC, =0xFF85A97C \n"  // Continue in firmware
 454 );
 455 }
 456 
 457 /*************************************************************/
 458 //** sub_FF85A6D4_my @ 0xFF85A6D4 - 0xFF85A838, length=90
 459 void __attribute__((naked,noinline)) sub_FF85A6D4_my() {
 460 asm volatile (
 461 "    STMFD   SP!, {R4-R8,LR} \n"
 462 "    MOV     R8, R0 \n"
 463 "    MOV     R0, #0x17 \n"
 464 "    MUL     R1, R0, R1 \n"
 465 "    LDR     R0, =0x1A784 \n"
 466 "    MOV     R6, #0 \n"
 467 "    ADD     R7, R0, R1, LSL#2 \n"
 468 "    LDR     R0, [R7, #0x3C] \n"
 469 "    MOV     R5, #0 \n"
 470 "    CMP     R0, #6 \n"
 471 "    ADDLS   PC, PC, R0, LSL#2 \n"
 472 "    B       loc_FF85A820 \n"
 473 "    B       loc_FF85A738 \n"
 474 "    B       loc_FF85A720 \n"
 475 "    B       loc_FF85A720 \n"
 476 "    B       loc_FF85A720 \n"
 477 "    B       loc_FF85A720 \n"
 478 "    B       loc_FF85A818 \n"
 479 "    B       loc_FF85A720 \n"
 480 
 481 "loc_FF85A720:\n"
 482 "    MOV     R2, #0 \n"
 483 "    MOV     R1, #0x200 \n"
 484 "    MOV     R0, #2 \n"
 485 "    BL      sub_FF873FC0 \n"
 486 "    MOVS    R4, R0 \n"
 487 "    BNE     loc_FF85A740 \n"
 488 
 489 "loc_FF85A738:\n"
 490 "    MOV     R0, #0 \n"
 491 "    LDMFD   SP!, {R4-R8,PC} \n"
 492 
 493 "loc_FF85A740:\n"
 494 "    LDR     R12, [R7, #0x4C] \n"
 495 "    MOV     R3, R4 \n"
 496 "    MOV     R2, #1 \n"
 497 "    MOV     R1, #0 \n"
 498 "    MOV     R0, R8 \n"
 499 "    BLX     R12 \n"
 500 "    CMP     R0, #1 \n"
 501 "    BNE     loc_FF85A76C \n"
 502 "    MOV     R0, #2 \n"
 503 "    BL      sub_FF87410C \n"
 504 "    B       loc_FF85A738 \n"
 505 
 506 "loc_FF85A76C:\n"
 507 "    MOV     R0, R8 \n"
 508 "    BL      sub_FF92AE88 \n"
 509 
 510 "    MOV     R1, R4\n"              //  pointer to MBR in R1
 511 "    BL      mbr_read_dryos\n"      //  total sectors count in R0 before and after call
 512 
 513 // Start of DataGhost's FAT32 autodetection code
 514 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 515 // According to the code below, we can use R1, R2, R3 and R12.
 516 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 517 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 518 "    MOV     R12, R4\n"             // Copy the MBR start address so we have something to work with
 519 "    MOV     LR, R4\n"              // Save old offset for MBR signature
 520 "    MOV     R1, #1\n"              // Note the current partition number
 521 "    B       dg_sd_fat32_enter\n"   // We actually need to check the first partition as well, no increments yet!
 522 "dg_sd_fat32:\n"
 523 "    CMP     R1, #4\n"              // Did we already see the 4th partition?
 524 "    BEQ     dg_sd_fat32_end\n"     // Yes, break. We didn't find anything, so don't change anything.
 525 "    ADD     R12, R12, #0x10\n"     // Second partition
 526 "    ADD     R1, R1, #1\n"          // Second partition for the loop
 527 "dg_sd_fat32_enter:\n"
 528 "    LDRB    R2, [R12, #0x1BE]\n"   // Partition status
 529 "    LDRB    R3, [R12, #0x1C2]\n"   // Partition type (FAT32 = 0xB)
 530 "    CMP     R3, #0xB\n"            // Is this a FAT32 partition?
 531 "    CMPNE   R3, #0xC\n"            // Not 0xB, is it 0xC (FAT32 LBA) then?
 532 "    CMPNE   R3, #0x7\n"            // exFat?
 533 "    BNE     dg_sd_fat32\n"         // No, it isn't. Loop again.
 534 "    CMP     R2, #0x00\n"           // It is, check the validity of the partition type
 535 "    CMPNE   R2, #0x80\n"
 536 "    BNE     dg_sd_fat32\n"         // Invalid, go to next partition
 537                                     // This partition is valid, it's the first one, bingo!
 538 "    MOV     R4, R12\n"             // Move the new MBR offset for the partition detection.
 539 
 540 "dg_sd_fat32_end:\n"
 541 // End of DataGhost's FAT32 autodetection code
 542 
 543 "    LDRB    R1, [R4, #0x1C9] \n"
 544 "    LDRB    R3, [R4, #0x1C8] \n"
 545 "    LDRB    R12, [R4, #0x1CC] \n"
 546 "    MOV     R1, R1, LSL#24 \n"
 547 "    ORR     R1, R1, R3, LSL#16 \n"
 548 "    LDRB    R3, [R4, #0x1C7] \n"
 549 "    LDRB    R2, [R4, #0x1BE] \n"
 550 //"  LDRB    LR, [R4, #0x1FF] \n"  // replaced below
 551 "    ORR     R1, R1, R3, LSL#8 \n"
 552 "    LDRB    R3, [R4, #0x1C6] \n"
 553 "    CMP     R2, #0 \n"
 554 "    CMPNE   R2, #0x80 \n"
 555 "    ORR     R1, R1, R3 \n"
 556 "    LDRB    R3, [R4, #0x1CD] \n"
 557 "    MOV     R3, R3, LSL#24 \n"
 558 "    ORR     R3, R3, R12, LSL#16 \n"
 559 "    LDRB    R12, [R4, #0x1CB] \n"
 560 "    ORR     R3, R3, R12, LSL#8 \n"
 561 "    LDRB    R12, [R4, #0x1CA] \n"
 562 "    ORR     R3, R3, R12 \n"
 563 //"  LDRB    R12, [R4, #0x1FE] \n"  // replaced below
 564 "    LDRB    R12, [LR,#0x1FE]\n"    // replace instructions above - First MBR signature byte (0x55), LR is original offset.
 565 "    LDRB    LR, [LR,#0x1FF]\n"     // replace instructions above - Last MBR signature byte (0xAA), LR is original offset.
 566 "    MOV     R4, #0 \n"
 567 "    BNE     loc_FF85A7F4 \n"
 568 "    CMP     R0, R1 \n"
 569 "    BCC     loc_FF85A7F4 \n"
 570 "    ADD     R2, R1, R3 \n"
 571 "    CMP     R2, R0 \n"
 572 "    CMPLS   R12, #0x55 \n"
 573 "    CMPEQ   LR, #0xAA \n"
 574 "    MOVEQ   R6, R1 \n"
 575 "    MOVEQ   R5, R3 \n"
 576 "    MOVEQ   R4, #1 \n"
 577 
 578 "loc_FF85A7F4:\n"
 579 "    MOV     R0, #2 \n"
 580 "    BL      sub_FF87410C \n"
 581 "    CMP     R4, #0 \n"
 582 "    BNE     loc_FF85A82C \n"
 583 "    MOV     R6, #0 \n"
 584 "    MOV     R0, R8 \n"
 585 "    BL      sub_FF92AE88 \n"
 586 "    MOV     R5, R0 \n"
 587 "    B       loc_FF85A82C \n"
 588 
 589 "loc_FF85A818:\n"
 590 "    MOV     R5, #0x40 \n"
 591 "    B       loc_FF85A82C \n"
 592 
 593 "loc_FF85A820:\n"
 594 "    LDR     R1, =0x37A \n"
 595 "    LDR     R0, =0xFF85A6C8 /*'Mounter.c'*/ \n"
 596 "    BL      _DebugAssert \n"
 597 
 598 "loc_FF85A82C:\n"
 599 "    STR     R6, [R7, #0x44]! \n"
 600 "    MOV     R0, #1 \n"
 601 "    STR     R5, [R7, #4] \n"
 602 "    LDMFD   SP!, {R4-R8,PC} \n"
 603 );
 604 }
 605 
 606 /*************************************************************/
 607 //** JogDial_task_my @ 0xFF84B8D8 - 0xFF84B9D0, length=63
 608 void __attribute__((naked,noinline)) JogDial_task_my() {
 609 asm volatile (
 610 "    STMFD   SP!, {R3-R11,LR} \n"
 611 "    BL      sub_FF84BA88 \n"
 612 "    LDR     R11, =0x80000B01 \n"
 613 "    LDR     R8, =0xFFB0AF94 \n"
 614 "    LDR     R7, =0xC0240000 \n"
 615 "    LDR     R6, =0x25D8 \n"
 616 "    MOV     R9, #1 \n"
 617 "    MOV     R10, #0 \n"
 618 
 619 "loc_FF84B8F8:\n"
 620 "    LDR     R3, =0x1AE \n"
 621 "    LDR     R0, [R6, #0xC] \n"
 622 "    LDR     R2, =0xFF84BB30 /*'JogDial.c'*/ \n"
 623 "    MOV     R1, #0 \n"
 624 "    BL      sub_FF827DF8 /*_TakeSemaphoreStrictly*/ \n"
 625 "    MOV     R0, #0x28 \n"
 626 "    BL      _SleepTask \n"
 627 //------------------  added code ---------------------
 628 "labelA:\n"
 629 "    LDR     R0, =jogdial_stopped\n"
 630 "    LDR     R0, [R0]\n"
 631 "    CMP     R0, #1\n"
 632 "    BNE     labelB\n"
 633 "    MOV     R0, #40\n"
 634 "    BL      _SleepTask\n"
 635 "    B       labelA\n"
 636 "labelB:\n"
 637 //------------------  original code ------------------
 638 "    LDR     R0, [R7, #0x104] \n"
 639 "    MOV     R0, R0, ASR#16 \n"
 640 "    STRH    R0, [R6] \n"
 641 "    LDRSH   R2, [R6, #2] \n"
 642 "    SUB     R1, R0, R2 \n"
 643 "    CMP     R1, #0 \n"
 644 "    BEQ     loc_FF84B9BC \n"
 645 "    MOV     R5, R1 \n"
 646 "    RSBLT   R5, R5, #0 \n"
 647 "    MOVLE   R4, #0 \n"
 648 "    MOVGT   R4, #1 \n"
 649 "    CMP     R5, #0xFF \n"
 650 "    BLS     loc_FF84B970 \n"
 651 "    CMP     R1, #0 \n"
 652 "    RSBLE   R1, R2, #0xFF \n"
 653 "    ADDLE   R1, R1, #0x7F00 \n"
 654 "    ADDLE   R0, R1, R0 \n"
 655 "    RSBGT   R0, R0, #0xFF \n"
 656 "    ADDGT   R0, R0, #0x7F00 \n"
 657 "    ADDGT   R0, R0, R2 \n"
 658 "    ADD     R5, R0, #0x8000 \n"
 659 "    ADD     R5, R5, #1 \n"
 660 "    EOR     R4, R4, #1 \n"
 661 
 662 "loc_FF84B970:\n"
 663 "    LDR     R0, [R6, #0x14] \n"
 664 "    CMP     R0, #0 \n"
 665 "    BEQ     loc_FF84B9B4 \n"
 666 "    LDR     R0, [R6, #0x1C] \n"
 667 "    CMP     R0, #0 \n"
 668 "    BEQ     loc_FF84B99C \n"
 669 "    LDR     R1, [R8, R4, LSL#2] \n"
 670 "    CMP     R1, R0 \n"
 671 "    BEQ     loc_FF84B9A4 \n"
 672 "    LDR     R0, =0xB01 \n"
 673 "    BL      sub_FF880C58 \n"
 674 
 675 "loc_FF84B99C:\n"
 676 "    MOV     R0, R11 \n"
 677 "    BL      sub_FF880C58 \n"
 678 
 679 "loc_FF84B9A4:\n"
 680 "    LDR     R0, [R8, R4, LSL#2] \n"
 681 "    MOV     R1, R5 \n"
 682 "    STR     R0, [R6, #0x1C] \n"
 683 "    BL      sub_FF880B80 \n"
 684 
 685 "loc_FF84B9B4:\n"
 686 "    LDRH    R0, [R6] \n"
 687 "    STRH    R0, [R6, #2] \n"
 688 
 689 "loc_FF84B9BC:\n"
 690 "    STR     R10, [R7, #0x100] \n"
 691 "    STR     R9, [R7, #0x108] \n"
 692 "    LDR     R0, [R6, #0x10] \n"
 693 "    CMP     R0, #0 \n"
 694 "    BLNE    _SleepTask \n"
 695 "    B       loc_FF84B8F8 \n"
 696 );
 697 }

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