root/platform/g12/sub/100c/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskHook
  2. CreateTask_spytask
  3. boot
  4. sub_FF810354_my
  5. sub_FF811198_my
  6. sub_FF815EE0_my
  7. taskcreate_Startup_my
  8. task_Startup_my
  9. taskcreatePhySw_my
  10. init_file_modules_task
  11. sub_FF895DE8_my
  12. sub_FF876518_my
  13. sub_FF876140_my
  14. sub_FF875E60_my
  15. JogDial_task_my

   1 /*
   2  * boot.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 #include "dryos31.h"
   8 
   9 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
  10 
  11 const char * const new_sa = &_end;
  12 
  13 // Forward declarations
  14 extern volatile int jogdial_stopped;
  15 void JogDial_task_my(void);
  16 
  17 extern void task_CaptSeq();
  18 extern void task_InitFileModules();
  19 extern void task_RotaryEncoder();
  20 extern void task_MovieRecord();
  21 extern void task_ExpDrv();
  22 extern void task_FileWrite();
  23 
  24 void taskHook(context_t **context)
  25 { 
  26         task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  27 
  28         // Replace firmware task addresses with ours
  29         if(tcb->entry == (void*)task_CaptSeq)                   tcb->entry = (void*)capt_seq_task; 
  30         if(tcb->entry == (void*)task_InitFileModules)   tcb->entry = (void*)init_file_modules_task;
  31         if(tcb->entry == (void*)task_RotaryEncoder)             tcb->entry = (void*)JogDial_task_my;
  32         if(tcb->entry == (void*)task_MovieRecord)               tcb->entry = (void*)movie_record_task;
  33         if(tcb->entry == (void*)task_ExpDrv)                    tcb->entry = (void*)exp_drv_task;
  34     if(tcb->entry == (void*)task_FileWrite)         tcb->entry = (void*)filewritetask;
  35 }
  36 
  37 /*----------------------------------------------------------------------
  38         CreateTask --> core_spytask
  39 -----------------------------------------------------------------------*/
  40 void CreateTask_spytask()
  41 {
  42         _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  43 }
  44 
  45 ///*----------------------------------------------------------------------
  46 // Pointer to stack location where jogdial task records previous and current
  47 // jogdial positions
  48 short *jog_position;
  49 
  50 /*----------------------------------------------------------------------
  51         boot()
  52 
  53         Main entry point for the CHDK code
  54 -----------------------------------------------------------------------*/
  55 
  56 /*************************************************************/
  57 //** boot @ 0xFF81000C - 0xFF810160, length=86
  58 void __attribute__((naked,noinline)) boot() {
  59 asm volatile (
  60 "    LDR     R1, =0xC0410000 \n"
  61 "    MOV     R0, #0 \n"
  62 "    STR     R0, [R1] \n"
  63 "    MOV     R1, #0x78 \n"
  64 "    MCR     p15, 0, R1, c1, c0 \n"
  65 "    MOV     R1, #0 \n"
  66 "    MCR     p15, 0, R1, c7, c10, 4 \n"
  67 "    MCR     p15, 0, R1, c7, c5 \n"
  68 "    MCR     p15, 0, R1, c7, c6 \n"
  69 "    MOV     R0, #0x3D \n"
  70 "    MCR     p15, 0, R0, c6, c0 \n"
  71 "    MOV     R0, #0xC000002F \n"
  72 "    MCR     p15, 0, R0, c6, c1 \n"
  73 "    MOV     R0, #0x35 \n"
  74 "    MCR     p15, 0, R0, c6, c2 \n"
  75 "    MOV     R0, #0x40000035 \n"
  76 "    MCR     p15, 0, R0, c6, c3 \n"
  77 "    MOV     R0, #0x80000017 \n"
  78 "    MCR     p15, 0, R0, c6, c4 \n"
  79 "    LDR     R0, =0xFF80002D \n"
  80 "    MCR     p15, 0, R0, c6, c5 \n"
  81 "    MOV     R0, #0x34 \n"
  82 "    MCR     p15, 0, R0, c2, c0 \n"
  83 "    MOV     R0, #0x34 \n"
  84 "    MCR     p15, 0, R0, c2, c0, 1 \n"
  85 "    MOV     R0, #0x34 \n"
  86 "    MCR     p15, 0, R0, c3, c0 \n"
  87 "    LDR     R0, =0x3333330 \n"
  88 "    MCR     p15, 0, R0, c5, c0, 2 \n"
  89 "    LDR     R0, =0x3333330 \n"
  90 "    MCR     p15, 0, R0, c5, c0, 3 \n"
  91 "    MRC     p15, 0, R0, c1, c0 \n"
  92 "    ORR     R0, R0, #0x1000 \n"
  93 "    ORR     R0, R0, #4 \n"
  94 "    ORR     R0, R0, #1 \n"
  95 "    MCR     p15, 0, R0, c1, c0 \n"
  96 "    MOV     R1, #0x80000006 \n"
  97 "    MCR     p15, 0, R1, c9, c1 \n"
  98 "    MOV     R1, #6 \n"
  99 "    MCR     p15, 0, R1, c9, c1, 1 \n"
 100 "    MRC     p15, 0, R1, c1, c0 \n"
 101 "    ORR     R1, R1, #0x50000 \n"
 102 "    MCR     p15, 0, R1, c1, c0 \n"
 103 "    LDR     R2, =0xC0200000 \n"
 104 "    MOV     R1, #1 \n"
 105 "    STR     R1, [R2, #0x10C] \n"
 106 "    MOV     R1, #0xFF \n"
 107 "    STR     R1, [R2, #0xC] \n"
 108 "    STR     R1, [R2, #0x1C] \n"
 109 "    STR     R1, [R2, #0x2C] \n"
 110 "    STR     R1, [R2, #0x3C] \n"
 111 "    STR     R1, [R2, #0x4C] \n"
 112 "    STR     R1, [R2, #0x5C] \n"
 113 "    STR     R1, [R2, #0x6C] \n"
 114 "    STR     R1, [R2, #0x7C] \n"
 115 "    STR     R1, [R2, #0x8C] \n"
 116 "    STR     R1, [R2, #0x9C] \n"
 117 "    STR     R1, [R2, #0xAC] \n"
 118 "    STR     R1, [R2, #0xBC] \n"
 119 "    STR     R1, [R2, #0xCC] \n"
 120 "    STR     R1, [R2, #0xDC] \n"
 121 "    STR     R1, [R2, #0xEC] \n"
 122 "    STR     R1, [R2, #0xFC] \n"
 123 "    LDR     R1, =0xC0400008 \n"
 124 "    LDR     R2, =0x430005 \n"
 125 "    STR     R2, [R1] \n"
 126 "    MOV     R1, #1 \n"
 127 "    LDR     R2, =0xC0243100 \n"
 128 "    STR     R2, [R1] \n"
 129 "    LDR     R2, =0xC0242010 \n"
 130 "    LDR     R1, [R2] \n"
 131 "    ORR     R1, R1, #1 \n"
 132 "    STR     R1, [R2] \n"
 133 "    LDR     R0, =0xFFCB1C20 \n"
 134 "    LDR     R1, =0x1900 \n"
 135 "    LDR     R3, =0x10798 \n"
 136 
 137 "loc_FF81013C:\n"
 138 "    CMP     R1, R3 \n"
 139 "    LDRCC   R2, [R0], #4 \n"
 140 "    STRCC   R2, [R1], #4 \n"
 141 "    BCC     loc_FF81013C \n"
 142 "    LDR     R1, =0x16E820 \n"
 143 "    MOV     R2, #0 \n"
 144 
 145 "loc_FF810154:\n"
 146 "    CMP     R3, R1 \n"
 147 "    STRCC   R2, [R3], #4 \n"
 148 "    BCC     loc_FF810154 \n"
 149 "    B       sub_FF810354_my \n"  // --> Patched. Old value = 0xFF810354.
 150 );
 151 }
 152 
 153 /*************************************************************/
 154 //** sub_FF810354_my @ 0xFF810354 - 0xFF8103BC, length=27
 155 void __attribute__((naked,noinline)) sub_FF810354_my() {
 156 
 157         //http://chdk.setepontos.com/index.php/topic,4194.0.html
 158         *(int*)0x1938=(int)taskHook;
 159         *(int*)0x193C=(int)taskHook;
 160     
 161         // replacement of sub_FF864BE0 for correct power-on.
 162         *(int*)(0x25E0) = (*(int*)0xC0220108)&1 ? 0x100000 : 0x200000; 
 163 
 164 asm volatile (
 165 "    LDR     R0, =0xFF8103CC \n"
 166 "    MOV     R1, #0 \n"
 167 "    LDR     R3, =0xFF810404 \n"
 168 
 169 "loc_FF810360:\n"
 170 "    CMP     R0, R3 \n"
 171 "    LDRCC   R2, [R0], #4 \n"
 172 "    STRCC   R2, [R1], #4 \n"
 173 "    BCC     loc_FF810360 \n"
 174 "    LDR     R0, =0xFF810404 \n"
 175 "    MOV     R1, #0x4B0 \n"
 176 "    LDR     R3, =0xFF810618 \n"
 177 
 178 "loc_FF81037C:\n"
 179 "    CMP     R0, R3 \n"
 180 "    LDRCC   R2, [R0], #4 \n"
 181 "    STRCC   R2, [R1], #4 \n"
 182 "    BCC     loc_FF81037C \n"
 183 "    MOV     R0, #0xD2 \n"
 184 "    MSR     CPSR_cxsf, R0 \n"
 185 "    MOV     SP, #0x1000 \n"
 186 "    MOV     R0, #0xD3 \n"
 187 "    MSR     CPSR_cxsf, R0 \n"
 188 "    MOV     SP, #0x1000 \n"
 189 "    LDR     R0, =0x6C4 \n"
 190 "    LDR     R2, =0xEEEEEEEE \n"
 191 "    MOV     R3, #0x1000 \n"
 192 
 193 "loc_FF8103B0:\n"
 194 "    CMP     R0, R3 \n"
 195 "    STRCC   R2, [R0], #4 \n"
 196 "    BCC     loc_FF8103B0 \n"
 197 "    BL      sub_FF811198_my \n"  // --> Patched. Old value = 0xFF811198.
 198 );
 199 }
 200 
 201 /*************************************************************/
 202 //** sub_FF811198_my @ 0xFF811198 - 0xFF8111EC, length=22
 203 void __attribute__((naked,noinline)) sub_FF811198_my() {
 204 asm volatile (
 205 "    STR     LR, [SP, #-4]! \n"
 206 "    SUB     SP, SP, #0x74 \n"
 207 "    MOV     R0, SP \n"
 208 "    MOV     R1, #0x74 \n"
 209 "    BL      sub_FFBB3324 \n"
 210 "    MOV     R0, #0x53000 \n"
 211 "    STR     R0, [SP, #4] \n"
 212 
 213 #if defined(CHDK_NOT_IN_CANON_HEAP) // use original heap offset if CHDK is loaded in high memory
 214 "    LDR     R0, =0x16E820 \n"
 215 #else
 216 "    LDR     R0, =new_sa\n"   // otherwise use patched value
 217 "    LDR     R0, [R0]\n"      // 
 218 #endif
 219 
 220 "    LDR     R1, =0x379C00 \n"
 221 "    STR     R0, [SP, #8] \n"
 222 "    RSB     R0, R0, #0x1F80 \n"
 223 "    ADD     R0, R0, #0x370000 \n"
 224 "    STR     R0, [SP, #0xC] \n"
 225 "    LDR     R0, =0x371F80 \n"
 226 "    STR     R1, [SP] \n"
 227 "    STRD    R0, [SP, #0x10] \n"
 228 "    MOV     R0, #0x22 \n"
 229 "    STR     R0, [SP, #0x18] \n"
 230 "    MOV     R0, #0x68 \n"
 231 "    STR     R0, [SP, #0x1C] \n"
 232 "    LDR     R0, =0x19B \n"
 233 "    LDR     R1, =sub_FF815EE0_my \n"  // --> Patched. Old value = 0xFF815EE0.
 234 "    LDR     PC, =0xFF8111F0 \n"  // Continue in firmware
 235 );
 236 }
 237 
 238 /*************************************************************/
 239 //** sub_FF815EE0_my @ 0xFF815EE0 - 0xFF815F54, length=30
 240 void __attribute__((naked,noinline)) sub_FF815EE0_my() {
 241 asm volatile (
 242 "    STMFD   SP!, {R4,LR} \n"
 243 "    BL      sub_FF810B20 \n"
 244 "    BL      sub_FF81A33C \n"
 245 "    CMP     R0, #0 \n"
 246 "    LDRLT   R0, =0xFF815FF4 /*'dmSetup'*/ \n"
 247 "    BLLT    _err_init_task \n"
 248 "    BL      sub_FF815B1C \n"
 249 "    CMP     R0, #0 \n"
 250 "    LDRLT   R0, =0xFF815FFC /*'termDriverInit'*/ \n"
 251 "    BLLT    _err_init_task \n"
 252 "    LDR     R0, =0xFF81600C /*'/_term'*/ \n"
 253 "    BL      sub_FF815C04 \n"
 254 "    CMP     R0, #0 \n"
 255 "    LDRLT   R0, =0xFF816014 /*'termDeviceCreate'*/ \n"
 256 "    BLLT    _err_init_task \n"
 257 "    LDR     R0, =0xFF81600C /*'/_term'*/ \n"
 258 "    BL      sub_FF813CA4 \n"
 259 "    CMP     R0, #0 \n"
 260 "    LDRLT   R0, =0xFF816028 /*'stdioSetup'*/ \n"
 261 "    BLLT    _err_init_task \n"
 262 "    BL      sub_FF819CC4 \n"
 263 "    CMP     R0, #0 \n"
 264 "    LDRLT   R0, =0xFF816034 /*'stdlibSetup'*/ \n"
 265 "    BLLT    _err_init_task \n"
 266 "    BL      sub_FF81167C \n"
 267 "    CMP     R0, #0 \n"
 268 "    LDRLT   R0, =0xFF816040 /*'armlib_setup'*/ \n"
 269 "    BLLT    _err_init_task \n"
 270 "    LDMFD   SP!, {R4,LR} \n"
 271 "    B       taskcreate_Startup_my \n"  // --> Patched. Old value = 0xFF81FB54.
 272 );
 273 }
 274 
 275 /*************************************************************/
 276 //** taskcreate_Startup_my @ 0xFF81FB54 - 0xFF81FBC4, length=29
 277 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 278 asm volatile (
 279 "    STMFD   SP!, {R3,LR} \n"
 280 //"  BL      _sub_FF864BD8 \n"  // --> Nullsub call removed.
 281 "    BL      sub_FF83C81C \n"
 282 "    CMP     R0, #0 \n"
 283 "    BNE     loc_FF81FB98 \n"
 284 "    BL      sub_FF836164 /*_IsNormalCameraMode_FW*/ \n"
 285 "    CMP     R0, #0 \n"
 286 "    BEQ     loc_FF81FB98 \n"
 287 "    BL      sub_FF864B94 \n"
 288 "    CMP     R0, #0 \n"
 289 "    BNE     loc_FF81FB98 \n"
 290 "    BL      sub_FF833DB8 \n"
 291 "    LDR     R1, =0xC0220000 \n"
 292 "    MOV     R0, #0x44 \n"
 293 "    STR     R0, [R1, #0x1C] \n"
 294 "    BL      sub_FF833FA8 \n"
 295 
 296 "loc_FF81FB94:\n"
 297 "    B       loc_FF81FB94 \n"
 298 
 299 "loc_FF81FB98:\n"
 300 //"  BL      _sub_FF864BE0 \n"  // See begin of sub_FF810354_my()
 301 //"  BL      _sub_FF864BDC \n"  // --> Nullsub call removed.
 302 "    BL      sub_FF83AA2C \n"
 303 "    MOV     R0, #0x46 \n"
 304 "    BL      _SleepTask \n"
 305 "    LDR     R1, =0x3CE000 \n"
 306 "    MOV     R0, #0 \n"
 307 "    BL      sub_FF83AE74 \n"
 308 "    BL      sub_FF83AC20 \n"
 309 "    MOV     R3, #0 \n"
 310 "    STR     R3, [SP] \n"
 311 "    LDR     R3, =task_Startup_my \n"  // --> Patched. Old value = 0xFF81FAF0.
 312 "    LDR     PC, =0xFF81FBC8 \n"  // Continue in firmware
 313 );
 314 }
 315 
 316 /*************************************************************/
 317 //** task_Startup_my @ 0xFF81FAF0 - 0xFF81FB20, length=13
 318 void __attribute__((naked,noinline)) task_Startup_my() {
 319 asm volatile (
 320 "    STMFD   SP!, {R4,LR} \n"
 321 "    BL      sub_FF816594 \n"
 322 "    BL      sub_FF835898 \n"
 323 "    BL      sub_FF8339AC \n"
 324 //"  BL      _sub_FF8656BC \n"  // --> Nullsub call removed.
 325 "    BL      sub_FF83CA4C \n"
 326 //"  BL      _sub_FF83C8F4 \n"  // start diskboot.bin
 327 "    BL      sub_FF89C43C \n"
 328 "    BL      sub_FF83247C \n"
 329 "    BL      sub_FF83CA7C \n"
 330 "    BL      sub_FF83A1D0 \n"
 331 "    BL      sub_FF83CBFC \n"
 332 
 333 "    BL      CreateTask_spytask\n"  // added
 334 
 335 "    BL      taskcreatePhySw_my \n"  // --> Patched. Old value = 0xFF834620.
 336 
 337 #if defined(OPT_RUN_WITH_BATT_COVER_OPEN)
 338 "    LDR     R0, =0xE0000\n"    // Pause for startup with battery door open
 339 "batt_delay:\n"
 340 "    NOP\n"
 341 "    SUBS    R0,R0,#1\n"
 342 "    BNE     batt_delay\n"
 343 #endif
 344 
 345 "    LDR     PC, =0xFF81FB24 \n"  // Continue in firmware
 346 );
 347 }
 348 
 349 /*************************************************************/
 350 //** taskcreatePhySw_my @ 0xFF834620 - 0xFF834640, length=9
 351 void __attribute__((naked,noinline)) taskcreatePhySw_my() {
 352 asm volatile (
 353 "    STMFD   SP!, {R3-R5,LR} \n"
 354 "    LDR     R4, =0x1C30 \n"
 355 "    LDR     R0, [R4, #0x10] \n"
 356 "    CMP     R0, #0 \n"
 357 "    BNE     sub_FF834654 \n"
 358 "    MOV     R3, #0 \n"
 359 "    STR     R3, [SP] \n"
 360 "    LDR     R3, =mykbd_task \n"  // --> Patched. Old value = 0xFF8345EC.
 361 "    MOV     R2, #0x2000 \n"  // --> Patched. Old value = 0x800. stack size for new task_PhySw
 362 "    LDR     PC, =0xFF834644 \n"  // Continue in firmware
 363 );
 364 }
 365 
 366 /*************************************************************/
 367 //** init_file_modules_task @ 0xFF89FC7C - 0xFF89FC98, length=8
 368 void __attribute__((naked,noinline)) init_file_modules_task() {
 369 asm volatile (
 370 "    STMFD   SP!, {R4-R6,LR} \n"
 371 "    BL      sub_FF895DBC \n"
 372 "    LDR     R5, =0x5006 \n"
 373 "    MOVS    R4, R0 \n"
 374 "    MOVNE   R1, #0 \n"
 375 "    MOVNE   R0, R5 \n"
 376 "    BLNE    _PostLogicalEventToUI \n"
 377 "    BL      sub_FF895DE8_my \n"  // --> Patched. Old value = 0xFF895DE8.
 378 "    BL      core_spytask_can_start\n"  // CHDK: Set "it's-safe-to-start" flag for spytask
 379 "    LDR     PC, =0xFF89FC9C \n"  // Continue in firmware
 380 );
 381 }
 382 
 383 /*************************************************************/
 384 //** sub_FF895DE8_my @ 0xFF895DE8 - 0xFF895DF0, length=3
 385 void __attribute__((naked,noinline)) sub_FF895DE8_my() {
 386 asm volatile (
 387 "    STMFD   SP!, {R4,LR} \n"
 388 "    MOV     R0, #3 \n"
 389 "    BL      sub_FF876518_my \n"  // --> Patched. Old value = 0xFF876518.
 390 "    LDR     PC, =0xFF895DF4 \n"  // Continue in firmware
 391 );
 392 }
 393 
 394 /*************************************************************/
 395 //** sub_FF876518_my @ 0xFF876518 - 0xFF87656C, length=22
 396 void __attribute__((naked,noinline)) sub_FF876518_my() {
 397 asm volatile (
 398 "    STMFD   SP!, {R4-R8,LR} \n"
 399 "    MOV     R8, R0 \n"
 400 "    BL      sub_FF876498 \n"
 401 "    LDR     R1, =0x3A848 \n"
 402 "    MOV     R6, R0 \n"
 403 "    ADD     R4, R1, R0, LSL#7 \n"
 404 "    LDR     R0, [R4, #0x6C] \n"
 405 "    CMP     R0, #4 \n"
 406 "    LDREQ   R1, =0x83F \n"
 407 "    LDREQ   R0, =0xFF875FD8 /*'Mounter.c'*/ \n"
 408 "    BLEQ    _DebugAssert \n"
 409 "    MOV     R1, R8 \n"
 410 "    MOV     R0, R6 \n"
 411 "    BL      sub_FF875D4C \n"
 412 "    LDR     R0, [R4, #0x38] \n"
 413 "    BL      sub_FF876BBC \n"
 414 "    CMP     R0, #0 \n"
 415 "    STREQ   R0, [R4, #0x6C] \n"
 416 "    MOV     R0, R6 \n"
 417 "    BL      sub_FF875DDC \n"
 418 "    MOV     R0, R6 \n"
 419 "    BL      sub_FF876140_my \n"  // --> Patched. Old value = 0xFF876140.
 420 "    LDR     PC, =0xFF876570 \n"  // Continue in firmware
 421 );
 422 }
 423 
 424 /*************************************************************/
 425 //** sub_FF876140_my @ 0xFF876140 - 0xFF876168, length=11
 426 void __attribute__((naked,noinline)) sub_FF876140_my() {
 427 asm volatile (
 428 "    STMFD   SP!, {R4-R6,LR} \n"
 429 "    MOV     R5, R0 \n"
 430 "    LDR     R0, =0x3A848 \n"
 431 "    ADD     R4, R0, R5, LSL#7 \n"
 432 "    LDR     R0, [R4, #0x6C] \n"
 433 "    TST     R0, #2 \n"
 434 "    MOVNE   R0, #1 \n"
 435 "    LDMNEFD SP!, {R4-R6,PC} \n"
 436 "    LDR     R0, [R4, #0x38] \n"
 437 "    MOV     R1, R5 \n"
 438 "    BL      sub_FF875E60_my \n"  // --> Patched. Old value = 0xFF875E60.
 439 "    LDR     PC, =0xFF87616C \n"  // Continue in firmware
 440 );
 441 }
 442 
 443 /*************************************************************/
 444 //** sub_FF875E60_my @ 0xFF875E60 - 0xFF875FD0, length=93
 445 void __attribute__((naked,noinline)) sub_FF875E60_my() {
 446 asm volatile (
 447 "    STMFD   SP!, {R4-R10,LR} \n"
 448 "    MOV     R9, R0 \n"
 449 "    LDR     R0, =0x3A848 \n"
 450 "    MOV     R8, #0 \n"
 451 "    ADD     R5, R0, R1, LSL#7 \n"
 452 "    LDR     R0, [R5, #0x3C] \n"
 453 "    MOV     R7, #0 \n"
 454 "    CMP     R0, #7 \n"
 455 "    MOV     R6, #0 \n"
 456 "    ADDLS   PC, PC, R0, LSL#2 \n"
 457 "    B       loc_FF875FB8 \n"
 458 "    B       loc_FF875EC4 \n"
 459 "    B       loc_FF875EAC \n"
 460 "    B       loc_FF875EAC \n"
 461 "    B       loc_FF875EAC \n"
 462 "    B       loc_FF875EAC \n"
 463 "    B       loc_FF875FB0 \n"
 464 "    B       loc_FF875EAC \n"
 465 "    B       loc_FF875EAC \n"
 466 
 467 "loc_FF875EAC:\n"
 468 "    MOV     R2, #0 \n"
 469 "    MOV     R1, #0x200 \n"
 470 "    MOV     R0, #2 \n"
 471 "    BL      sub_FF88FE28 \n"
 472 "    MOVS    R4, R0 \n"
 473 "    BNE     loc_FF875ECC \n"
 474 
 475 "loc_FF875EC4:\n"
 476 "    MOV     R0, #0 \n"
 477 "    LDMFD   SP!, {R4-R10,PC} \n"
 478 
 479 "loc_FF875ECC:\n"
 480 "    LDR     R12, [R5, #0x50] \n"
 481 "    MOV     R3, R4 \n"
 482 "    MOV     R2, #1 \n"
 483 "    MOV     R1, #0 \n"
 484 "    MOV     R0, R9 \n"
 485 "    BLX     R12 \n"
 486 "    CMP     R0, #1 \n"
 487 "    BNE     loc_FF875EF8 \n"
 488 "    MOV     R0, #2 \n"
 489 "    BL      sub_FF88FF78 \n"
 490 "    B       loc_FF875EC4 \n"
 491 
 492 "loc_FF875EF8:\n"
 493 "    LDR     R1, [R5, #0x64] \n"
 494 "    MOV     R0, R9 \n"
 495 "    BLX     R1 \n"
 496 
 497 "    MOV     R1, R4\n"              //  pointer to MBR in R1
 498 "    BL      mbr_read_dryos\n"      //  total sectors count in R0 before and after call
 499 
 500 // Start of DataGhost's FAT32 autodetection code
 501 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 502 // According to the code below, we can use R1, R2, R3 and R12.
 503 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 504 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 505 "    MOV     R12, R4\n"             // Copy the MBR start address so we have something to work with
 506 "    MOV     LR, R4\n"              // Save old offset for MBR signature
 507 "    MOV     R1, #1\n"              // Note the current partition number
 508 "    B       dg_sd_fat32_enter\n"   // We actually need to check the first partition as well, no increments yet!
 509 "dg_sd_fat32:\n"
 510 "    CMP     R1, #4\n"              // Did we already see the 4th partition?
 511 "    BEQ     dg_sd_fat32_end\n"     // Yes, break. We didn't find anything, so don't change anything.
 512 "    ADD     R12, R12, #0x10\n"     // Second partition
 513 "    ADD     R1, R1, #1\n"          // Second partition for the loop
 514 "dg_sd_fat32_enter:\n"
 515 "    LDRB    R2, [R12, #0x1BE]\n"   // Partition status
 516 "    LDRB    R3, [R12, #0x1C2]\n"   // Partition type (FAT32 = 0xB)
 517 "    CMP     R3, #0xB\n"            // Is this a FAT32 partition?
 518 "    CMPNE   R3, #0xC\n"            // Not 0xB, is it 0xC (FAT32 LBA) then?
 519 "    CMPNE   R3, #0x7\n"            // exFat?
 520 "    BNE     dg_sd_fat32\n"         // No, it isn't. Loop again.
 521 "    CMP     R2, #0x00\n"           // It is, check the validity of the partition type
 522 "    CMPNE   R2, #0x80\n"
 523 "    BNE     dg_sd_fat32\n"         // Invalid, go to next partition
 524                                     // This partition is valid, it's the first one, bingo!
 525 "    MOV     R4, R12\n"             // Move the new MBR offset for the partition detection.
 526 
 527 "dg_sd_fat32_end:\n"
 528 // End of DataGhost's FAT32 autodetection code
 529 
 530 "    LDRB    R1, [R4, #0x1C9] \n"
 531 "    LDRB    R3, [R4, #0x1C8] \n"
 532 "    LDRB    R12, [R4, #0x1CC] \n"
 533 "    MOV     R1, R1, LSL#24 \n"
 534 "    ORR     R1, R1, R3, LSL#16 \n"
 535 "    LDRB    R3, [R4, #0x1C7] \n"
 536 "    LDRB    R2, [R4, #0x1BE] \n"
 537 //"  LDRB    LR, [R4, #0x1FF] \n"  // replaced below
 538 "    ORR     R1, R1, R3, LSL#8 \n"
 539 "    LDRB    R3, [R4, #0x1C6] \n"
 540 "    CMP     R2, #0 \n"
 541 "    CMPNE   R2, #0x80 \n"
 542 "    ORR     R1, R1, R3 \n"
 543 "    LDRB    R3, [R4, #0x1CD] \n"
 544 "    MOV     R3, R3, LSL#24 \n"
 545 "    ORR     R3, R3, R12, LSL#16 \n"
 546 "    LDRB    R12, [R4, #0x1CB] \n"
 547 "    ORR     R3, R3, R12, LSL#8 \n"
 548 "    LDRB    R12, [R4, #0x1CA] \n"
 549 "    ORR     R3, R3, R12 \n"
 550 //"  LDRB    R12, [R4, #0x1FE] \n"  // replaced below
 551 "    LDRB    R12, [LR,#0x1FE]\n"    // replace instructions above
 552 "    LDRB    LR, [LR,#0x1FF]\n"     // replace instructions above
 553 "    BNE     loc_FF875F84 \n"
 554 "    CMP     R0, R1 \n"
 555 "    BCC     loc_FF875F84 \n"
 556 "    ADD     R2, R1, R3 \n"
 557 "    CMP     R2, R0 \n"
 558 "    CMPLS   R12, #0x55 \n"
 559 "    CMPEQ   LR, #0xAA \n"
 560 "    MOVEQ   R7, R1 \n"
 561 "    MOVEQ   R6, R3 \n"
 562 "    MOVEQ   R4, #1 \n"
 563 "    BEQ     loc_FF875F88 \n"
 564 
 565 "loc_FF875F84:\n"
 566 "    MOV     R4, R8 \n"
 567 
 568 "loc_FF875F88:\n"
 569 "    MOV     R0, #2 \n"
 570 "    BL      sub_FF88FF78 \n"
 571 "    CMP     R4, #0 \n"
 572 "    BNE     loc_FF875FC4 \n"
 573 "    LDR     R1, [R5, #0x64] \n"
 574 "    MOV     R7, #0 \n"
 575 "    MOV     R0, R9 \n"
 576 "    BLX     R1 \n"
 577 "    MOV     R6, R0 \n"
 578 "    B       loc_FF875FC4 \n"
 579 
 580 "loc_FF875FB0:\n"
 581 "    MOV     R6, #0x40 \n"
 582 "    B       loc_FF875FC4 \n"
 583 
 584 "loc_FF875FB8:\n"
 585 "    LDR     R1, =0x597 \n"
 586 "    LDR     R0, =0xFF875FD8 /*'Mounter.c'*/ \n"
 587 "    BL      _DebugAssert \n"
 588 
 589 "loc_FF875FC4:\n"
 590 "    STR     R7, [R5, #0x44]! \n"
 591 "    STMIB   R5, {R6,R8} \n"
 592 "    MOV     R0, #1 \n"
 593 "    LDMFD   SP!, {R4-R10,PC} \n"
 594 );
 595 }
 596 
 597 /*************************************************************/
 598 //** JogDial_task_my @ 0xFF8657EC - 0xFF865B14, length=203
 599 void __attribute__((naked,noinline)) JogDial_task_my() {
 600 asm volatile (
 601 "    STMFD   SP!, {R4-R11,LR} \n"
 602 "    SUB     SP, SP, #0x24 \n"
 603 "    BL      sub_FF865B84 \n"
 604 "    LDR     R1, =0x25E8 \n"
 605 "    LDR     R6, =0xFFBB95D8 \n"
 606 "    MOV     R0, #0 \n"
 607 "    ADD     R3, SP, #0x18 \n"
 608 
 609 // Save pointer for kbd.c routine
 610 "    LDR     R12, =jog_position \n"
 611 "    STR     R3, [R12] \n"
 612 
 613 "    ADD     R12, SP, #0x1C \n"
 614 "    ADD     R10, SP, #8 \n"
 615 "    MOV     R2, #0 \n"
 616 "    ADD     R9, SP, #0x10 \n"
 617 
 618 "loc_FF865818:\n"
 619 "    ADD     R12, SP, #0x1C \n"
 620 "    ADD     LR, R12, R0, LSL#1 \n"
 621 "    MOV     R2, #0 \n"
 622 "    ADD     R3, SP, #0x18 \n"
 623 "    STRH    R2, [LR] \n"
 624 "    ADD     LR, R3, R0, LSL#1 \n"
 625 "    STRH    R2, [LR] \n"
 626 "    STR     R2, [R9, R0, LSL#2] \n"
 627 "    STR     R2, [R10, R0, LSL#2] \n"
 628 "    ADD     R0, R0, #1 \n"
 629 "    CMP     R0, #2 \n"
 630 "    BLT     loc_FF865818 \n"
 631 
 632 "loc_FF865848:\n"
 633 "    LDR     R0, =0x25E8 \n"
 634 "    MOV     R2, #0 \n"
 635 "    LDR     R0, [R0, #8] \n"
 636 "    MOV     R1, SP \n"
 637 "    BL      sub_FF83A460 /*_ReceiveMessageQueue*/ \n"
 638 "    CMP     R0, #0 \n"
 639 "    LDRNE   R1, =0x262 \n"
 640 "    LDRNE   R0, =0xFF865AA8 /*'RotaryEncoder.c'*/ \n"
 641 "    BLNE    _DebugAssert \n"
 642 "    LDR     R0, [SP] \n"
 643 "    AND     R4, R0, #0xFF \n"
 644 "    AND     R0, R0, #0xFF00 \n"
 645 "    CMP     R0, #0x100 \n"
 646 "    BEQ     loc_FF8658B8 \n"
 647 "    CMP     R0, #0x200 \n"
 648 "    BEQ     loc_FF8658F0 \n"
 649 "    CMP     R0, #0x300 \n"
 650 "    BEQ     loc_FF865AE8 \n"
 651 "    CMP     R0, #0x400 \n"
 652 "    BNE     loc_FF865848 \n"
 653 "    CMP     R4, #0 \n"
 654 "    LDRNE   R1, =0x2ED \n"
 655 "    LDRNE   R0, =0xFF865AA8 /*'RotaryEncoder.c'*/ \n"
 656 "    BLNE    _DebugAssert \n"
 657 "    RSB     R0, R4, R4, LSL#3 \n"
 658 "    LDR     R0, [R6, R0, LSL#2] \n"
 659 
 660 "loc_FF8658B0:\n"
 661 "    BL      sub_FF865B68 \n"
 662 "    B       loc_FF865848 \n"
 663 
 664 "loc_FF8658B8:\n"
 665 //------------------  added code ---------------------
 666 "labelA:\n"
 667 "    LDR     R0, =jogdial_stopped\n"
 668 "    LDR     R0, [R0]\n"
 669 "    CMP     R0, #1\n"
 670 "    BNE     labelB\n"
 671 "    MOV     R0, #40\n"
 672 "    BL      _SleepTask\n"
 673 "    B       labelA\n"
 674 "labelB:\n"
 675 //------------------  original code ------------------
 676 "    LDR     R7, =0x25F8 \n"
 677 "    LDR     R0, [R7, R4, LSL#2] \n"
 678 "    BL      sub_FF83B3F8 /*_CancelTimer*/ \n"
 679 "    LDR     R2, =0xFF865738 \n"
 680 "    MOV     R1, R2 \n"
 681 "    ORR     R3, R4, #0x200 \n"
 682 "    MOV     R0, #0x28 \n"
 683 "    BL      sub_FF83B314 /*_SetTimerAfter*/ \n"
 684 "    TST     R0, #1 \n"
 685 "    CMPNE   R0, #0x15 \n"
 686 "    STR     R0, [R10, R4, LSL#2] \n"
 687 "    BEQ     loc_FF865848 \n"
 688 "    MOV     R1, #0x274 \n"
 689 "    B       loc_FF865A94 \n"
 690 
 691 "loc_FF8658F0:\n"
 692 "    RSB     R5, R4, R4, LSL#3 \n"
 693 "    LDR     R0, [R6, R5, LSL#2] \n"
 694 "    LDR     R1, =0xC0240104 \n"
 695 "    LDR     R0, [R1, R0, LSL#8] \n"
 696 "    MOV     R2, R0, ASR#16 \n"
 697 "    ADD     R0, SP, #0x1C \n"
 698 "    ADD     R0, R0, R4, LSL#1 \n"
 699 "    STR     R0, [SP, #0x20] \n"
 700 "    STRH    R2, [R0] \n"
 701 "    ADD     R0, SP, #0x18 \n"
 702 "    ADD     R11, R0, R4, LSL#1 \n"
 703 "    LDRSH   R3, [R11] \n"
 704 "    SUB     R0, R2, R3 \n"
 705 "    CMP     R0, #0 \n"
 706 "    BNE     loc_FF865970 \n"
 707 "    LDR     R0, [R9, R4, LSL#2] \n"
 708 "    CMP     R0, #0 \n"
 709 "    BEQ     loc_FF865A50 \n"
 710 "    LDR     R7, =0x25F8 \n"
 711 "    LDR     R0, [R7, R4, LSL#2] \n"
 712 "    BL      sub_FF83B3F8 /*_CancelTimer*/ \n"
 713 "    LDR     R2, =0xFF865744 \n"
 714 "    MOV     R1, R2 \n"
 715 "    ORR     R3, R4, #0x300 \n"
 716 "    MOV     R0, #0x1F4 \n"
 717 "    BL      sub_FF83B314 /*_SetTimerAfter*/ \n"
 718 "    TST     R0, #1 \n"
 719 "    CMPNE   R0, #0x15 \n"
 720 "    STR     R0, [R7, R4, LSL#2] \n"
 721 "    BEQ     loc_FF865A50 \n"
 722 "    LDR     R1, =0x28D \n"
 723 "    B       loc_FF865A48 \n"
 724 
 725 "loc_FF865970:\n"
 726 "    MOV     R1, R0 \n"
 727 "    RSBLT   R0, R0, #0 \n"
 728 "    MOVLE   R7, #0 \n"
 729 "    MOVGT   R7, #1 \n"
 730 "    CMP     R0, #0xFF \n"
 731 "    BLS     loc_FF8659B0 \n"
 732 "    CMP     R1, #0 \n"
 733 "    RSBLE   R0, R3, #0xFF \n"
 734 "    ADDLE   R0, R0, #0x7F00 \n"
 735 "    ADDLE   R0, R0, R2 \n"
 736 "    RSBGT   R0, R2, #0xFF \n"
 737 "    ADDGT   R0, R0, #0x7F00 \n"
 738 "    ADDGT   R0, R0, R3 \n"
 739 "    ADD     R0, R0, #0x8000 \n"
 740 "    ADD     R0, R0, #1 \n"
 741 "    EOR     R7, R7, #1 \n"
 742 
 743 "loc_FF8659B0:\n"
 744 "    STR     R0, [SP, #4] \n"
 745 "    LDR     R0, [R9, R4, LSL#2] \n"
 746 "    CMP     R0, #0 \n"
 747 "    ADDEQ   R0, R6, R5, LSL#2 \n"
 748 "    LDREQ   R0, [R0, #8] \n"
 749 "    BEQ     loc_FF8659E8 \n"
 750 "    ADD     R8, R6, R5, LSL#2 \n"
 751 "    ADD     R1, R8, R7, LSL#2 \n"
 752 "    LDR     R1, [R1, #0x10] \n"
 753 "    CMP     R1, R0 \n"
 754 "    BEQ     loc_FF8659EC \n"
 755 "    LDR     R0, [R8, #0xC] \n"
 756 "    BL      sub_FF89BE30 \n"
 757 "    LDR     R0, [R8, #8] \n"
 758 
 759 "loc_FF8659E8:\n"
 760 "    BL      sub_FF89BE30 \n"
 761 
 762 "loc_FF8659EC:\n"
 763 "    ADD     R0, R6, R5, LSL#2 \n"
 764 "    ADD     R7, R0, R7, LSL#2 \n"
 765 "    LDR     R0, [R7, #0x10] \n"
 766 "    LDR     R1, [SP, #4] \n"
 767 "    BL      sub_FF89BD58 \n"
 768 "    LDR     R0, [R7, #0x10] \n"
 769 "    LDR     R7, =0x25F8 \n"
 770 "    STR     R0, [R9, R4, LSL#2] \n"
 771 "    LDR     R0, [SP, #0x20] \n"
 772 "    LDRH    R0, [R0] \n"
 773 "    STRH    R0, [R11] \n"
 774 "    LDR     R0, [R7, R4, LSL#2] \n"
 775 "    BL      sub_FF83B3F8 /*_CancelTimer*/ \n"
 776 "    LDR     R2, =0xFF865744 \n"
 777 "    MOV     R1, R2 \n"
 778 "    ORR     R3, R4, #0x300 \n"
 779 "    MOV     R0, #0x1F4 \n"
 780 "    BL      sub_FF83B314 /*_SetTimerAfter*/ \n"
 781 "    TST     R0, #1 \n"
 782 "    CMPNE   R0, #0x15 \n"
 783 "    STR     R0, [R7, R4, LSL#2] \n"
 784 "    BEQ     loc_FF865A50 \n"
 785 "    LDR     R1, =0x2CF \n"
 786 
 787 "loc_FF865A48:\n"
 788 "    LDR     R0, =0xFF865AA8 /*'RotaryEncoder.c'*/ \n"
 789 "    BL      _DebugAssert \n"
 790 
 791 "loc_FF865A50:\n"
 792 "    ADD     R0, R6, R5, LSL#2 \n"
 793 "    LDR     R0, [R0, #0x18] \n"
 794 "    CMP     R0, #1 \n"
 795 "    BNE     loc_FF865AE0 \n"
 796 "    LDR     R0, =0x25E8 \n"
 797 "    LDR     R0, [R0, #0xC] \n"
 798 "    CMP     R0, #0 \n"
 799 "    BEQ     loc_FF865AE0 \n"
 800 "    LDR     R2, =0xFF865738 \n"
 801 "    MOV     R1, R2 \n"
 802 "    ORR     R3, R4, #0x400 \n"
 803 "    BL      sub_FF83B314 /*_SetTimerAfter*/ \n"
 804 "    TST     R0, #1 \n"
 805 "    CMPNE   R0, #0x15 \n"
 806 "    STR     R0, [R10, R4, LSL#2] \n"
 807 "    BEQ     loc_FF865848 \n"
 808 "    LDR     R1, =0x2D6 \n"
 809 
 810 "loc_FF865A94:\n"
 811 "    LDR     R0, =0xFF865AA8 /*'RotaryEncoder.c'*/ \n"
 812 "    BL      _DebugAssert \n"
 813 "    B       loc_FF865848 \n"
 814 
 815 "loc_FF865AE0:\n"
 816 "    LDR     R0, [R6, R5, LSL#2] \n"
 817 "    B       loc_FF8658B0 \n"
 818 
 819 "loc_FF865AE8:\n"
 820 "    LDR     R0, [R9, R4, LSL#2] \n"
 821 "    CMP     R0, #0 \n"
 822 "    MOVEQ   R1, #0x2E0 \n"
 823 "    LDREQ   R0, =0xFF865AA8 /*'RotaryEncoder.c'*/ \n"
 824 "    BLEQ    _DebugAssert \n"
 825 "    RSB     R0, R4, R4, LSL#3 \n"
 826 "    ADD     R0, R6, R0, LSL#2 \n"
 827 "    LDR     R0, [R0, #0xC] \n"
 828 "    BL      sub_FF89BE30 \n"
 829 "    MOV     R2, #0 \n"
 830 "    STR     R2, [R9, R4, LSL#2] \n"
 831 "    B       loc_FF865848 \n"
 832 );
 833 }

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