This source file includes following definitions.
- filewritetask
- sub_FFA27FC4_my
- sub_FFA280F8_my
- sub_FFA27B60_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6
7 typedef struct {
8 unsigned int address;
9 unsigned int length;
10 } cam_ptp_data_chunk;
11
12 #define MAX_CHUNKS_FOR_FWT 4
13
14
15
16
17
18
19
20
21 typedef struct
22 {
23 int unkn1[2];
24 int oflags;
25 int unkn2[2];
26 cam_ptp_data_chunk pdc[MAX_CHUNKS_FOR_FWT];
27 int unkn6;
28 char name[32];
29 } fwt_data_struct;
30
31 #include "../../../generic/filewrite.c"
32
33
34
35 void __attribute__((naked,noinline)) filewritetask() {
36 asm volatile (
37 " STMFD SP!, {R1-R5,LR} \n"
38 " LDR R4, =0x90E0 \n"
39
40 "loc_FFA27CDC:\n"
41 " LDR R0, [R4, #0x10] \n"
42 " MOV R2, #0 \n"
43 " ADD R1, SP, #8 \n"
44 " BL sub_FF838F6C /*_ReceiveMessageQueue*/ \n"
45 " CMP R0, #0 \n"
46 " BNE loc_FFA27D0C \n"
47 " LDR R0, [SP, #8] \n"
48 " LDR R1, [R0] \n"
49 " CMP R1, #1 \n"
50 " BNE loc_FFA27D14 \n"
51 " LDR R0, [R4, #8] \n"
52 " BL _GiveSemaphore \n"
53
54 "loc_FFA27D0C:\n"
55 " BL _ExitTask \n"
56 " LDMFD SP!, {R1-R5,PC} \n"
57
58 "loc_FFA27D14:\n"
59 " SUB R1, R1, #2 \n"
60 " CMP R1, #6 \n"
61 " ADDLS PC, PC, R1, LSL#2 \n"
62 " B loc_FFA27CDC \n"
63 " B loc_FFA27D40 \n"
64 " B loc_FFA27DA4 \n"
65 " B loc_FFA27DAC \n"
66 " B loc_FFA27DAC \n"
67 " B loc_FFA27DAC \n"
68 " B loc_FFA27DAC \n"
69 " B loc_FFA27DB4 \n"
70
71 "loc_FFA27D40:\n"
72 " MOV R0, #0 \n"
73 " STR R0, [SP] \n"
74
75 "loc_FFA27D48:\n"
76 " LDR R0, [R4, #0x10] \n"
77 " MOV R1, SP \n"
78 " BL sub_FF8391B0 /*_GetNumberOfPostedMessages*/ \n"
79 " LDR R0, [SP] \n"
80 " CMP R0, #0 \n"
81 " BEQ loc_FFA27D74 \n"
82 " LDR R0, [R4, #0x10] \n"
83 " MOV R2, #0 \n"
84 " ADD R1, SP, #4 \n"
85 " BL sub_FF838F6C /*_ReceiveMessageQueue*/ \n"
86 " B loc_FFA27D48 \n"
87
88 "loc_FFA27D74:\n"
89 " LDR R0, [R4] \n"
90 " CMN R0, #1 \n"
91 " BEQ loc_FFA27D98 \n"
92 " BL fwt_close \n"
93 " MVN R0, #0 \n"
94 " STR R0, [R4] \n"
95 " LDR R0, =0xDC30C \n"
96 " BL sub_FF86331C \n"
97 " BL sub_FF8615B8 \n"
98
99 "loc_FFA27D98:\n"
100 " LDR R0, [R4, #0xC] \n"
101 " BL _GiveSemaphore \n"
102 " B loc_FFA27CDC \n"
103
104 "loc_FFA27DA4:\n"
105 " BL sub_FFA27FC4_my \n"
106 " B loc_FFA27CDC \n"
107
108 "loc_FFA27DAC:\n"
109 " BL sub_FFA280F8_my \n"
110 " B loc_FFA27CDC \n"
111
112 "loc_FFA27DB4:\n"
113 " BL sub_FFA27B60_my \n"
114 " B loc_FFA27CDC \n"
115 );
116 }
117
118
119
120 void __attribute__((naked,noinline)) sub_FFA27FC4_my() {
121 asm volatile (
122 " STMFD SP!, {R4-R8,LR} \n"
123 " MOV R4, R0 \n"
124 " ADD R0, R0, #0x38 \n"
125 " SUB SP, SP, #0x38 \n"
126 " BL sub_FF86331C \n"
127 " MOV R1, #0 \n"
128 " BL sub_FF861568 \n"
129 " LDR R0, [R4, #0xC] \n"
130 " BL sub_FF81033C \n"
131 " LDR R7, [R4, #8] \n"
132 " LDR R8, =0x1B6 \n"
133 " ADD R6, R4, #0x38 \n"
134 " LDR R5, [R4, #0xC] \n"
135
136
137 " MOV R0, R4\n"
138 " BL filewrite_main_hook\n"
139
140
141 " MOV R0, R6 \n"
142 " MOV R1, R7 \n"
143 " MOV R2, R8 \n"
144 " BL fwt_open \n"
145 " LDR PC, =0xFFA28008 \n"
146 );
147 }
148
149
150
151 void __attribute__((naked,noinline)) sub_FFA280F8_my() {
152 asm volatile (
153 " STMFD SP!, {R4-R10,LR} \n"
154 " MOV R4, R0 \n"
155 " LDR R0, [R0] \n"
156 " CMP R0, #4 \n"
157 " LDREQ R6, [R4, #0x18] \n"
158 " LDREQ R7, [R4, #0x14] \n"
159 " BEQ loc_FFA28144 \n"
160 " CMP R0, #5 \n"
161 " LDREQ R6, [R4, #0x20] \n"
162 " LDREQ R7, [R4, #0x1C] \n"
163 " BEQ loc_FFA28144 \n"
164 " CMP R0, #6 \n"
165 " LDREQ R6, [R4, #0x28] \n"
166 " LDREQ R7, [R4, #0x24] \n"
167 " BEQ loc_FFA28144 \n"
168 " CMP R0, #7 \n"
169 " BNE loc_FFA28158 \n"
170 " LDR R6, [R4, #0x30] \n"
171 " LDR R7, [R4, #0x2C] \n"
172
173 "loc_FFA28144:\n"
174 " CMP R6, #0 \n"
175 " BNE loc_FFA28168 \n"
176
177 "loc_FFA2814C:\n"
178 " MOV R1, R4 \n"
179 " MOV R0, #8 \n"
180 " B loc_FFA281FC \n"
181
182 "loc_FFA28158:\n"
183 " LDR R1, =0x29F \n"
184 " LDR R0, =0xFFA27DCC /*'dwFWrite.c'*/ \n"
185 " BL _DebugAssert \n"
186 " B loc_FFA2814C \n"
187
188 "loc_FFA28168:\n"
189 " LDR R9, =0x90E0 \n"
190 " MOV R5, R6 \n"
191
192 "loc_FFA28170:\n"
193 " LDR R0, [R4, #4] \n"
194 " CMP R5, #0x1000000 \n"
195 " MOVLS R8, R5 \n"
196 " MOVHI R8, #0x1000000 \n"
197 " BIC R1, R0, #0xFF000000 \n"
198 " CMP R1, #0 \n"
199 " BICNE R0, R0, #0xFF000000 \n"
200 " RSBNE R0, R0, #0x1000000 \n"
201 " CMPNE R8, R0 \n"
202 " MOVHI R8, R0 \n"
203 " LDR R0, [R9] \n"
204 " MOV R2, R8 \n"
205 " MOV R1, R7 \n"
206 " BL fwt_write \n"
207 " LDR R1, [R4, #4] \n"
208 " CMP R8, R0 \n"
209 " ADD R1, R1, R0 \n"
210 " STR R1, [R4, #4] \n"
211 " BEQ loc_FFA281D0 \n"
212 " CMN R0, #1 \n"
213 " LDRNE R0, =0x9200015 \n"
214 " LDREQ R0, =0x9200005 \n"
215 " STR R0, [R4, #0x10] \n"
216 " B loc_FFA2814C \n"
217
218 "loc_FFA281D0:\n"
219 " SUB R5, R5, R0 \n"
220 " CMP R5, R6 \n"
221 " ADD R7, R7, R0 \n"
222 " LDRCS R0, =0xFFA27DCC /*'dwFWrite.c'*/ \n"
223 " LDRCS R1, =0x2CA \n"
224 " BLCS _DebugAssert \n"
225 " CMP R5, #0 \n"
226 " BNE loc_FFA28170 \n"
227 " LDR R0, [R4] \n"
228 " MOV R1, R4 \n"
229 " ADD R0, R0, #1 \n"
230
231 "loc_FFA281FC:\n"
232 " LDMFD SP!, {R4-R10,LR} \n"
233 " B sub_FFA27AA0 \n"
234 );
235 }
236
237
238
239 void __attribute__((naked,noinline)) sub_FFA27B60_my() {
240 asm volatile (
241 " STMFD SP!, {R4-R6,LR} \n"
242 " LDR R5, =0x90E0 \n"
243 " MOV R4, R0 \n"
244 " LDR R0, [R5] \n"
245 " SUB SP, SP, #0x38 \n"
246 " CMN R0, #1 \n"
247 " BEQ sub_FFA27BA8 \n"
248 " LDR R1, [R4, #8] \n"
249 " LDR R6, =0x9200003 \n"
250 " TST R1, #0x8000 \n"
251 " BEQ loc_FFA27B94 \n"
252
253 " LDR R3, =current_write_ignored\n"
254 " LDR R3, [R3]\n"
255 " CMP R3, #0\n"
256 " BNE loc_D\n"
257
258
259 " BL sub_FF860614 \n"
260 " B sub_FFA27B98 \n"
261
262 "loc_FFA27B94:\n"
263 "loc_D:\n"
264 " BL fwt_close \n"
265 " LDR PC, =0xFFA27B98 \n"
266 );
267 }