root/platform/a580/sub/100c/capt_seq.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. sub_FFD0F3B8_my
  2. task_CaptSeqTask_my
  3. exp_drv_task
  4. sub_FFC8EC78_my
  5. sub_FFC70CCC_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 
   5 static long *nrflag = (long*)0x8450; // 0xFFD0F430
   6 
   7 #include "../../../generic/capt_seq.c"
   8 
   9 //** sub_FFD0F3B8_my  @ 0xFFD0F3B8 
  10 
  11 void __attribute__((naked,noinline)) sub_FFD0F3B8_my(  ) { 
  12 asm volatile (
  13       "STMFD   SP!, {R0-R10,LR}\n"
  14       "MOV     R6, #0\n"
  15       "MOV     R4, R0\n"
  16       "BL      sub_FFD0FEB8\n"
  17       "MVN     R1, #0\n"
  18       "BL      sub_FFC173FC\n"
  19       "MOV     R2, #4\n"
  20       "ADD     R1, SP, #8\n"
  21       "MOV     R0, #0x8A\n"
  22       "BL      _GetPropertyCase \n"
  23       "TST     R0, #1\n"
  24       "MOVNE   R1, #0x218\n"
  25       "LDRNE   R0, =0xFFD0F5CC\n"
  26       "BLNE    _DebugAssert \n"
  27       "LDR     R8, =0x18440\n"
  28       "LDR     R5, =0x18394\n"
  29       "LDRSH   R1, [R8, #0xE]\n"
  30       "LDR     R0, [R5, #0x74]\n"
  31       "BL      sub_FFCCD36C\n"
  32       "BL      _GetCCDTemperature \n"
  33       "LDR     R2, =0x8454\n"
  34       "ADD     R3, R4, #0x8C\n"
  35       "STRH    R0, [R4, #0x88]\n"
  36       "STRD    R2, [SP]\n"
  37 //      "STR     R2, [SP]\n"            // Corrected! from STRD    R2, [SP]
  38 //      "STR     R3, [SP,#4]\n"         // Added! (as in a720)
  39       "MOV     R1, R0\n"
  40       "LDRH    R0, [R5, #0x4C]\n"
  41       "LDRSH   R2, [R8, #0xC]\n"
  42       "LDR     R3, =0x8450\n"
  43       "BL      sub_FFD103A4\n"
  44       "BL      wait_until_remote_button_is_released\n"
  45       "BL      capt_seq_hook_set_nr\n"
  46       "B       sub_FFD0F42C\n"
  47         );
  48 }
  49 
  50 
  51 //** task_CaptSeqTask_my  @ 0xFFC49B38 
  52 
  53 void __attribute__((naked,noinline)) task_CaptSeqTask_my() {
  54 asm volatile (
  55       "STMFD   SP!, {R3-R7,LR}\n"
  56       "LDR     R6, =0x52A8\n"
  57 
  58 "loc_FFC49B40:\n"
  59       "LDR     R0, [R6, #8]\n"
  60       "MOV     R2, #0\n"
  61       "MOV     R1, SP\n"
  62       "BL      sub_FFC1764C\n"
  63       "TST     R0, #1\n"
  64       "BEQ     loc_FFC49B6C\n"
  65       "LDR     R1, =0x48E\n"
  66       "LDR     R0, =0xFFC49860\n" // aSsshoottask_c
  67       "BL      _DebugAssert \n"
  68       "BL      _ExitTask \n"
  69       "LDMFD   SP!, {R3-R7,PC}\n"
  70 
  71 "loc_FFC49B6C:\n"
  72       "LDR     R0, [SP]\n"
  73       "LDR     R1, [R0]\n"
  74       "CMP     R1, #0x19\n"
  75       "ADDLS   PC, PC, R1, LSL #2\n"
  76       "B       loc_FFC49D80\n"
  77       "B       loc_FFC49BE8\n"
  78       "B       loc_FFC49BF0\n"
  79       "B       loc_FFC49C70\n"
  80       "B       loc_FFC49C84\n"
  81       "B       loc_FFC49C7C\n"
  82       "B       loc_FFC49C8C\n"
  83       "B       loc_FFC49C94\n"
  84       "B       loc_FFC49CA0\n"
  85       "B       loc_FFC49CF8\n"
  86       "B       loc_FFC49C84\n"
  87       "B       loc_FFC49D00\n"
  88       "B       loc_FFC49D08\n"
  89       "B       loc_FFC49D10\n"
  90       "B       loc_FFC49D18\n"
  91       "B       loc_FFC49D20\n"
  92       "B       loc_FFC49D2C\n"
  93       "B       loc_FFC49D34\n"
  94       "B       loc_FFC49D3C\n"
  95       "B       loc_FFC49D44\n"
  96       "B       loc_FFC49D50\n"
  97       "B       loc_FFC49D58\n"
  98       "B       loc_FFC49D60\n"
  99       "B       loc_FFC49D68\n"
 100       "B       loc_FFC49D70\n"
 101       "B       loc_FFC49D78\n"
 102       "B       loc_FFC49D8C\n"
 103 "loc_FFC49BE8:\n"
 104       "BL      sub_FFD0DF20\n"
 105       "BL      shooting_expo_param_override\n"  //patch
 106       "B       loc_FFC49C98\n"
 107 "loc_FFC49BF0:\n"
 108       "LDR     R4, [R0, #0xC]\n"
 109       "LDR     R0, [R4, #8]\n"
 110       "ORR     R0, R0, #1\n"
 111       "STR     R0, [R4, #8]\n"
 112       "BL      sub_FFD0DF10\n"
 113       "MOV     R0, R4\n"
 114       "BL      sub_FFD0E2F8\n"
 115       "TST     R0, #1\n"
 116       "MOVNE   R2, R4\n"
 117       "MOVNE   R1, #1\n"
 118       "BNE     loc_FFC49CF0\n"
 119       "BL      sub_FFD2D318\n"
 120       "BL      sub_FFC5832C\n"
 121       "STR     R0, [R4, #0x14]\n"
 122       "MOV     R0, R4\n"
 123       "BL      sub_FFD0F2F0\n"
 124       "BL      sub_FFD0FD54\n"
 125       "MOV     R0, R4\n"
 126 //      "BL      sub_FFD0F3B8\n"  //original
 127       "BL      sub_FFD0F3B8_my\n"  //patch
 128       "BL      capt_seq_hook_raw_here\n" //patch
 129       "MOV     R5, R0\n"
 130       "BL      sub_FFD10D34\n"
 131       "BL      sub_FFD10D70\n"
 132       "MOV     R2, R4\n"
 133       "MOV     R1, #1\n"
 134       "MOV     R0, R5\n"
 135       "BL      sub_FFC4831C\n"
 136       "BL      sub_FFD0F768\n"
 137       "CMP     R0, #0\n"
 138       "LDRNE   R0, [R4, #8]\n"
 139       "ORRNE   R0, R0, #0x2000\n"
 140       "STRNE   R0, [R4, #8]\n"
 141       "B       loc_FFC49D8C\n"
 142 "loc_FFC49C70:\n"
 143       "MOV     R0, #1\n"
 144       "BL      sub_FFD0E0B4\n"
 145       "B       loc_FFC49D8C\n"
 146 "loc_FFC49C7C:\n"
 147       "BL      sub_FFD0DB80\n"
 148       "B       loc_FFC49D8C\n"
 149 "loc_FFC49C84:\n"
 150       "BL      sub_FFD0DF00\n"
 151       "B       loc_FFC49D8C\n"
 152 "loc_FFC49C8C:\n"
 153       "BL      sub_FFD0DF08\n"
 154       "B       loc_FFC49D8C\n"
 155 "loc_FFC49C94:\n"
 156       "BL      sub_FFD0DFD4\n"
 157 "loc_FFC49C98:\n"
 158       "BL      sub_FFC47F9C\n"
 159       "B       loc_FFC49D8C\n"
 160 "loc_FFC49CA0:\n"
 161       "LDR     R4, [R0, #0xC]\n"
 162       "BL      sub_FFD0DF10\n"
 163       "MOV     R0, R4\n"
 164       "BL      sub_FFD0E678\n"
 165       "TST     R0, #1\n"
 166       "MOV     R5, R0\n"
 167       "BNE     loc_FFC49CE0\n"
 168       "BL      sub_FFC5832C\n"
 169       "STR     R0, [R4, #0x14]\n"
 170       "MOV     R0, R4\n"
 171       "BL      sub_FFD0F2F0\n"
 172       "MOV     R0, R4\n"
 173       "BL      sub_FFD0F7C8\n"
 174       "MOV     R5, R0\n"
 175       "LDR     R0, [R4, #0x14]\n"
 176       "BL      sub_FFC58538\n"
 177 "loc_FFC49CE0:\n"
 178       "BL      sub_FFD0DF00\n"
 179       "MOV     R2, R4\n"
 180       "MOV     R1, #9\n"
 181       "MOV     R0, R5\n"
 182 "loc_FFC49CF0:\n"
 183       "BL      sub_FFC4831C\n"
 184       "B       loc_FFC49D8C\n"
 185 "loc_FFC49CF8:\n"
 186       "BL      sub_FFD0E034\n"
 187       "B       loc_FFC49C98\n"
 188 "loc_FFC49D00:\n"
 189       "BL      sub_FFD0E8F4\n"
 190       "B       loc_FFC49D8C\n"
 191 "loc_FFC49D08:\n"
 192       "BL      sub_FFD0EADC\n"
 193       "B       loc_FFC49D8C\n"
 194 "loc_FFC49D10:\n"
 195       "BL      sub_FFD0EB6C\n"
 196       "B       loc_FFC49D8C\n"
 197 "loc_FFC49D18:\n"
 198       "BL      sub_FFD0EC20\n"
 199       "B       loc_FFC49D8C\n"
 200 "loc_FFC49D20:\n"
 201       "MOV     R0, #0\n"
 202       "BL      sub_FFD0EDC4\n"
 203       "B       loc_FFC49D8C\n"
 204 "loc_FFC49D2C:\n"
 205       "BL      sub_FFD0EF14\n"
 206       "B       loc_FFC49D8C\n"
 207 "loc_FFC49D34:\n"
 208       "BL      sub_FFD0EFA8\n"
 209       "B       loc_FFC49D8C\n"
 210 "loc_FFC49D3C:\n"
 211       "BL      sub_FFD0F070\n"
 212       "B       loc_FFC49D8C\n"
 213 "loc_FFC49D44:\n"
 214       "BL      sub_FFD0E1D0\n"
 215       "BL      sub_FFC149BC\n"
 216       "B       loc_FFC49D8C\n"
 217 "loc_FFC49D50:\n"
 218       "BL      sub_FFD0ECDC\n"
 219       "B       loc_FFC49D8C\n"
 220 "loc_FFC49D58:\n"
 221       "BL      sub_FFD0ED20\n"
 222       "B       loc_FFC49D8C\n"
 223 "loc_FFC49D60:\n"
 224       "BL      sub_FFD10D18\n"
 225       "B       loc_FFC49D8C\n"
 226 "loc_FFC49D68:\n"
 227       "BL      sub_FFD10D34\n"
 228       "B       loc_FFC49D8C\n"
 229 "loc_FFC49D70:\n"
 230       "BL      sub_FFD10D44\n"
 231       "B       loc_FFC49D8C\n"
 232 "loc_FFC49D78:\n"
 233       "BL      sub_FFD10D70\n"
 234       "B       loc_FFC49D8C\n"
 235 "loc_FFC49D80:\n"
 236       "LDR     R1, =0x58E\n"
 237       "LDR     R0, =0xFFC49860\n"
 238       "BL      _DebugAssert \n"
 239 "loc_FFC49D8C:\n"
 240       "LDR     R0, [SP]\n"
 241       "LDR     R1, [R0, #4]\n"
 242       "LDR     R0, [R6, #4]\n"
 243       "BL      sub_FFC173C8\n"
 244       "LDR     R4, [SP]\n"
 245       "LDR     R0, [R4, #8]\n"
 246       "CMP     R0, #0\n"
 247       "LDREQ   R1, =0x10D\n"
 248       "LDREQ   R0, =0xFFC49860\n"
 249       "BLEQ    _DebugAssert \n"
 250       "MOV     R0, #0\n"
 251       "STR     R0, [R4, #8]\n"
 252       "B       loc_FFC49B40\n"
 253         );
 254 }
 255 
 256 
 257 //** exp_drv_task  @ 0xFFC91194 
 258 
 259 void __attribute__((naked,noinline)) exp_drv_task(  ) { 
 260 asm volatile (
 261       "STMFD   SP!, {R4-R8,LR}\n"
 262       "SUB     SP, SP, #0x20\n"
 263       "LDR     R8, =0xBB8\n"
 264       "LDR     R7, =0x649C\n"
 265       "LDR     R5, =0x3C0F0\n"
 266       "MOV     R0, #0\n"
 267       "ADD     R6, SP, #0x10\n"
 268       "STR     R0, [SP, #0xC]\n"
 269 "loc_FFC911B4:\n"
 270       "LDR     R0, [R7, #0x20]\n"
 271       "MOV     R2, #0\n"
 272       "ADD     R1, SP, #0x1C\n"
 273       "BL      sub_FFC1764C\n"
 274       "LDR     R0, [SP, #0xC]\n"
 275       "CMP     R0, #1\n"
 276       "BNE     loc_FFC911FC\n"
 277       "LDR     R0, [SP, #0x1C]\n"
 278       "LDR     R0, [R0]\n"
 279       "CMP     R0, #0x13\n"
 280       "CMPNE   R0, #0x14\n"
 281       "CMPNE   R0, #0x15\n"
 282       "BEQ     loc_FFC91318\n"
 283       "CMP     R0, #0x27\n"
 284       "BEQ     loc_FFC912F0\n"
 285       "ADD     R1, SP, #0xC\n"
 286       "MOV     R0, #0\n"
 287       "BL      sub_FFC91144\n"
 288 "loc_FFC911FC:\n"
 289       "LDR     R0, [SP, #0x1C]\n"
 290       "LDR     R1, [R0]\n"
 291       "CMP     R1, #0x2C\n"
 292       "BNE     loc_FFC9122C\n"
 293       "LDR     R0, [SP, #0x1C]\n"
 294       "BL      sub_FFC923F8\n"
 295       "LDR     R0, [R7, #0x1C]\n"
 296       "MOV     R1, #1\n"
 297       "BL      sub_FFC173C8\n"
 298       "BL      _ExitTask \n"
 299       "ADD     SP, SP, #0x20\n"
 300       "LDMFD   SP!, {R4-R8,PC}\n"
 301 "loc_FFC9122C:\n"
 302       "CMP     R1, #0x2B\n"
 303       "BNE     loc_FFC91248\n"
 304       "LDR     R2, [R0, #0x88]!\n"
 305       "LDR     R1, [R0, #4]\n"
 306       "MOV     R0, R1\n"
 307       "BLX     R2\n"
 308       "B       loc_FFC9177C\n"
 309 "loc_FFC91248:\n"
 310       "CMP     R1, #0x25\n"
 311       "BNE     loc_FFC91298\n"
 312       "LDR     R0, [R7, #0x1C]\n"
 313       "MOV     R1, #0x80\n"
 314       "BL      sub_FFC173FC\n"
 315       "LDR     R0, =0xFFC8DC38\n"
 316       "MOV     R1, #0x80\n"
 317       "BL      sub_FFD05880\n"
 318       "LDR     R0, [R7, #0x1C]\n"
 319       "MOV     R2, R8\n"
 320       "MOV     R1, #0x80\n"
 321       "BL      sub_FFC17300\n"
 322       "TST     R0, #1\n"
 323       "LDRNE   R1, =0xD1B\n"
 324       "BNE     loc_FFC912DC\n"
 325 "loc_FFC91284:\n"
 326       "LDR     R1, [SP, #0x1C]\n"
 327       "LDR     R0, [R1, #0x8C]\n"
 328       "LDR     R1, [R1, #0x88]\n"
 329       "BLX     R1\n"
 330       "B       loc_FFC9177C\n"
 331 "loc_FFC91298:\n"
 332       "CMP     R1, #0x26\n"
 333       "BNE     loc_FFC912E8\n"
 334       "ADD     R1, SP, #0xC\n"
 335       "BL      sub_FFC91144\n"
 336       "LDR     R0, [R7, #0x1C]\n"
 337       "MOV     R1, #0x100\n"
 338       "BL      sub_FFC173FC\n"
 339       "LDR     R0, =0xFFC8DC48\n"
 340       "MOV     R1, #0x100\n"
 341       "BL      sub_FFD05B08\n"
 342       "LDR     R0, [R7, #0x1C]\n"
 343       "MOV     R2, R8\n"
 344       "MOV     R1, #0x100\n"
 345       "BL      sub_FFC17300\n"
 346       "TST     R0, #1\n"
 347       "BEQ     loc_FFC91284\n"
 348       "LDR     R1, =0xD25\n"
 349 "loc_FFC912DC:\n"
 350       "LDR     R0, =0xFFC8E338\n" // aExpdrv_c
 351       "BL      _DebugAssert \n"
 352       "B       loc_FFC91284\n"
 353 "loc_FFC912E8:\n"
 354       "CMP     R1, #0x27\n"
 355       "BNE     loc_FFC91300\n"
 356 "loc_FFC912F0:\n"
 357       "LDR     R0, [SP, #0x1C]\n"
 358       "ADD     R1, SP, #0xC\n"
 359       "BL      sub_FFC91144\n"
 360       "B       loc_FFC91284\n"
 361 "loc_FFC91300:\n"
 362       "CMP     R1, #0x2A\n"
 363       "BNE     loc_FFC91318\n"
 364       "BL      sub_FFC70F80\n"
 365       "BL      sub_FFC71D4C\n"
 366       "BL      sub_FFC717D0\n"
 367       "B       loc_FFC91284\n"
 368 "loc_FFC91318:\n"
 369       "LDR     R0, [SP, #0x1C]\n"
 370       "MOV     R4, #1\n"
 371       "LDR     R1, [R0]\n"
 372       "CMP     R1, #0x11\n"
 373       "CMPNE   R1, #0x12\n"
 374       "BNE     loc_FFC91388\n"
 375       "LDR     R1, [R0, #0x7C]\n"
 376       "ADD     R1, R1, R1, LSL #1\n"
 377       "ADD     R1, R0, R1, LSL #2\n"
 378       "SUB     R1, R1, #8\n"
 379       "LDMIA   R1, {R2-R4}\n"
 380       "STMIA   R6, {R2-R4}\n"
 381       "BL      sub_FFC8FCC4\n"
 382       "LDR     R0, [SP, #0x1C]\n"
 383       "LDR     R1, [R0, #0x7C]\n"
 384       "LDR     R3, [R0, #0x88]\n"
 385       "LDR     R2, [R0, #0x8C]\n"
 386       "ADD     R0, R0, #4\n"
 387       "BLX     R3\n"
 388       "LDR     R0, [SP, #0x1C]\n"
 389       "BL      sub_FFC927D0\n"
 390       "LDR     R0, [SP, #0x1C]\n"
 391       "LDR     R1, [R0, #0x7C]\n"
 392       "LDR     R3, [R0, #0x90]\n"
 393       "LDR     R2, [R0, #0x94]\n"
 394       "ADD     R0, R0, #4\n"
 395       "BLX     R3\n"
 396       "B       loc_FFC916BC\n"
 397 "loc_FFC91388:\n"
 398       "CMP     R1, #0x13\n"
 399       "CMPNE   R1, #0x14\n"
 400       "CMPNE   R1, #0x15\n"
 401       "BNE     loc_FFC9143C\n"
 402       "ADD     R3, SP, #0xC\n"
 403       "MOV     R2, SP\n"
 404       "ADD     R1, SP, #0x10\n"
 405       "BL      sub_FFC8FF0C\n"
 406       "CMP     R0, #1\n"
 407       "MOV     R4, R0\n"
 408       "CMPNE   R4, #5\n"
 409       "BNE     loc_FFC913D8\n"
 410       "LDR     R0, [SP, #0x1C]\n"
 411       "MOV     R2, R4\n"
 412       "LDR     R1, [R0, #0x7C]!\n"
 413       "LDR     R12, [R0, #0xC]!\n"
 414       "LDR     R3, [R0, #4]\n"
 415       "MOV     R0, SP\n"
 416       "BLX     R12\n"
 417       "B       loc_FFC91410\n"
 418 "loc_FFC913D8:\n"
 419       "LDR     R0, [SP, #0x1C]\n"
 420       "CMP     R4, #2\n"
 421       "LDR     R3, [R0, #0x8C]\n"
 422       "CMPNE   R4, #6\n"
 423       "BNE     loc_FFC91424\n"
 424       "LDR     R12, [R0, #0x88]\n"
 425       "MOV     R0, SP\n"
 426       "MOV     R2, R4\n"
 427       "MOV     R1, #1\n"
 428       "BLX     R12\n"
 429       "LDR     R0, [SP, #0x1C]\n"
 430       "MOV     R2, SP\n"
 431       "ADD     R1, SP, #0x10\n"
 432       "BL      sub_FFC90E90\n"
 433 "loc_FFC91410:\n"
 434       "LDR     R0, [SP, #0x1C]\n"
 435       "LDR     R2, [SP, #0xC]\n"
 436       "MOV     R1, R4\n"
 437       "BL      sub_FFC910E4\n"
 438       "B       loc_FFC916BC\n"
 439 "loc_FFC91424:\n"
 440       "LDR     R1, [R0, #0x7C]\n"
 441       "LDR     R12, [R0, #0x88]\n"
 442       "ADD     R0, R0, #4\n"
 443       "MOV     R2, R4\n"
 444       "BLX     R12\n"
 445       "B       loc_FFC916BC\n"
 446 "loc_FFC9143C:\n"
 447       "CMP     R1, #0x21\n"
 448       "CMPNE   R1, #0x22\n"
 449       "BNE     loc_FFC91488\n"
 450       "LDR     R1, [R0, #0x7C]\n"
 451       "ADD     R1, R1, R1, LSL #1\n"
 452       "ADD     R1, R0, R1, LSL #2\n"
 453       "SUB     R1, R1, #8\n"
 454       "LDMIA   R1, {R2-R4}\n"
 455       "STMIA   R6, {R2-R4}\n"
 456       "BL      sub_FFC8F250\n"
 457       "LDR     R0, [SP, #0x1C]\n"
 458       "LDR     R1, [R0, #0x7C]\n"
 459       "LDR     R3, [R0, #0x88]\n"
 460       "LDR     R2, [R0, #0x8C]\n"
 461       "ADD     R0, R0, #4\n"
 462       "BLX     R3\n"
 463       "LDR     R0, [SP, #0x1C]\n"
 464       "BL      sub_FFC8F540\n"
 465       "B       loc_FFC916BC\n"
 466 "loc_FFC91488:\n"
 467       "ADD     R1, R0, #4\n"
 468       "LDMIA   R1, {R2,R3,R12}\n"
 469       "STMIA   R6, {R2,R3,R12}\n"
 470       "LDR     R1, [R0]\n"
 471       "CMP     R1, #0x24\n"
 472       "ADDLS   PC, PC, R1, LSL #2\n"
 473       "B       loc_FFC9169C\n"
 474       "B       loc_FFC91538\n"
 475       "B       loc_FFC91538\n"
 476       "B       loc_FFC91540\n"
 477       "B       loc_FFC91548\n"
 478       "B       loc_FFC91548\n"
 479       "B       loc_FFC91548\n"
 480       "B       loc_FFC91538\n"
 481       "B       loc_FFC91540\n"
 482       "B       loc_FFC91548\n"
 483       "B       loc_FFC91548\n"
 484       "B       loc_FFC915A4\n"
 485       "B       loc_FFC915A4\n"
 486       "B       loc_FFC91690\n"
 487       "B       loc_FFC91698\n"
 488       "B       loc_FFC91698\n"
 489       "B       loc_FFC91698\n"
 490       "B       loc_FFC91698\n"
 491       "B       loc_FFC9169C\n"
 492       "B       loc_FFC9169C\n"
 493       "B       loc_FFC9169C\n"
 494       "B       loc_FFC9169C\n"
 495       "B       loc_FFC9169C\n"
 496       "B       loc_FFC91550\n"
 497       "B       loc_FFC91558\n"
 498       "B       loc_FFC91558\n"
 499       "B       loc_FFC915B0\n"
 500       "B       loc_FFC915B0\n"
 501       "B       loc_FFC915B8\n"
 502       "B       loc_FFC915E8\n"
 503       "B       loc_FFC91618\n"
 504       "B       loc_FFC91648\n"
 505       "B       loc_FFC91678\n"
 506       "B       loc_FFC91678\n"
 507       "B       loc_FFC9169C\n"
 508       "B       loc_FFC9169C\n"
 509       "B       loc_FFC91680\n"
 510       "B       loc_FFC91688\n"
 511 "loc_FFC91538:\n"
 512       "BL      sub_FFC8E120\n"
 513       "B       loc_FFC9169C\n"
 514 "loc_FFC91540:\n"
 515       "BL      sub_FFC8E3B0\n"
 516       "B       loc_FFC9169C\n"
 517 "loc_FFC91548:\n"
 518       "BL      sub_FFC8E5B4\n"
 519       "B       loc_FFC9169C\n"
 520 "loc_FFC91550:\n"
 521       "BL      sub_FFC8E81C\n"
 522       "B       loc_FFC9169C\n"
 523 "loc_FFC91558:\n"
 524       "BL      sub_FFC8EA10\n"
 525       "B       loc_FFC9169C\n"
 526 
 527 //
 528 
 529 "loc_FFC915A4:\n"
 530 //      "BL      sub_FFC8EC78\n"  //original
 531       "BL      sub_FFC8EC78_my\n" //patch
 532       "MOV     R4, #0\n"
 533       "B       loc_FFC9169C\n"
 534 "loc_FFC915B0:\n"
 535       "BL      sub_FFC8EDB4\n"
 536       "B       loc_FFC9169C\n"
 537 "loc_FFC915B8:\n"
 538       "LDRH    R1, [R0, #4]\n"
 539       "STRH    R1, [SP, #0x10]\n"
 540       "LDRH    R1, [R5, #2]\n"
 541       "STRH    R1, [SP, #0x12]\n"
 542       "LDRH    R1, [R5, #4]\n"
 543       "STRH    R1, [SP, #0x14]\n"
 544       "LDRH    R1, [R5, #6]\n"
 545       "STRH    R1, [SP, #0x16]\n"
 546       "LDRH    R1, [R0, #0xC]\n"
 547       "STRH    R1, [SP, #0x18]\n"
 548       "BL      sub_FFC9246C\n"
 549       "B       loc_FFC9169C\n"
 550 "loc_FFC915E8:\n"
 551       "LDRH    R1, [R0, #4]\n"
 552       "STRH    R1, [SP, #0x10]\n"
 553       "LDRH    R1, [R5, #2]\n"
 554       "STRH    R1, [SP, #0x12]\n"
 555       "LDRH    R1, [R5, #4]\n"
 556       "STRH    R1, [SP, #0x14]\n"
 557       "LDRH    R1, [R5, #6]\n"
 558       "STRH    R1, [SP, #0x16]\n"
 559       "LDRH    R1, [R5, #8]\n"
 560       "STRH    R1, [SP, #0x18]\n"
 561       "BL      sub_FFC925EC\n"
 562       "B       loc_FFC9169C\n"
 563 "loc_FFC91618:\n"
 564       "LDRH    R1, [R5]\n"
 565       "STRH    R1, [SP, #0x10]\n"
 566       "LDRH    R1, [R0, #6]\n"
 567       "STRH    R1, [SP, #0x12]\n"
 568       "LDRH    R1, [R5, #4]\n"
 569       "STRH    R1, [SP, #0x14]\n"
 570       "LDRH    R1, [R5, #6]\n"
 571       "STRH    R1, [SP, #0x16]\n"
 572       "LDRH    R1, [R5, #8]\n"
 573       "STRH    R1, [SP, #0x18]\n"
 574       "BL      sub_FFC92698\n"
 575       "B       loc_FFC9169C\n"
 576 "loc_FFC91648:\n"
 577       "LDRH    R1, [R5]\n"
 578       "STRH    R1, [SP, #0x10]\n"
 579       "LDRH    R1, [R5, #2]\n"
 580       "STRH    R1, [SP, #0x12]\n"
 581       "LDRH    R1, [R5, #4]\n"
 582       "STRH    R1, [SP, #0x14]\n"
 583       "LDRH    R1, [R5, #6]\n"
 584       "STRH    R1, [SP, #0x16]\n"
 585       "LDRH    R1, [R0, #0xC]\n"
 586       "STRH    R1, [SP, #0x18]\n"
 587       "BL      sub_FFC92738\n"
 588       "B       loc_FFC9169C\n"
 589 "loc_FFC91678:\n"
 590       "BL      sub_FFC8F028\n"
 591       "B       loc_FFC9169C\n"
 592 "loc_FFC91680:\n"
 593       "BL      sub_FFC8F644\n"
 594       "B       loc_FFC9169C\n"
 595 "loc_FFC91688:\n"
 596       "BL      sub_FFC8F87C\n"
 597       "B       loc_FFC9169C\n"
 598 "loc_FFC91690:\n"
 599       "BL      sub_FFC8F9F4\n"
 600       "B       loc_FFC9169C\n"
 601 "loc_FFC91698:\n"
 602       "BL      sub_FFC8FB8C\n"
 603 "loc_FFC9169C:\n"
 604       "LDR     R0, [SP, #0x1C]\n"
 605       "LDR     R1, [R0, #0x7C]\n"
 606       "LDR     R3, [R0, #0x88]\n"
 607       "LDR     R2, [R0, #0x8C]\n"
 608       "ADD     R0, R0, #4\n"
 609       "BLX     R3\n"
 610       "CMP     R4, #1\n"
 611       "BNE     loc_FFC91704\n"
 612 "loc_FFC916BC:\n"
 613       "LDR     R0, [SP, #0x1C]\n"
 614       "MOV     R2, #0xC\n"
 615       "LDR     R1, [R0, #0x7C]\n"
 616       "ADD     R1, R1, R1, LSL #1\n"
 617       "ADD     R0, R0, R1, LSL #2\n"
 618       "SUB     R4, R0, #8\n"
 619       "LDR     R0, =0x3C0F0\n"
 620       "ADD     R1, SP, #0x10\n"
 621       "BL      sub_FFE58B10\n"
 622       "LDR     R0, =0x3C0FC\n"
 623       "MOV     R2, #0xC\n"
 624       "ADD     R1, SP, #0x10\n"
 625       "BL      sub_FFE58B10\n"
 626       "LDR     R0, =0x3C108\n"
 627       "MOV     R2, #0xC\n"
 628       "MOV     R1, R4\n"
 629       "BL      sub_FFE58B10\n"
 630       "B       loc_FFC9177C\n"
 631 "loc_FFC91704:\n"
 632       "LDR     R0, [SP, #0x1C]\n"
 633       "LDR     R0, [R0]\n"
 634       "CMP     R0, #0xB\n"
 635       "BNE     loc_FFC9174C\n"
 636       "MOV     R3, #0\n"
 637       "STR     R3, [SP]\n"
 638       "MOV     R3, #1\n"
 639       "MOV     R2, #1\n"
 640       "MOV     R1, #1\n"
 641       "MOV     R0, #0\n"
 642       "BL      sub_FFC8DF28\n"
 643       "MOV     R3, #0\n"
 644       "STR     R3, [SP]\n"
 645       "MOV     R3, #1\n"
 646       "MOV     R2, #1\n"
 647       "MOV     R1, #1\n"
 648       "MOV     R0, #0\n"
 649       "B       loc_FFC91778\n"
 650 "loc_FFC9174C:\n"
 651       "MOV     R3, #1\n"
 652       "MOV     R2, #1\n"
 653       "MOV     R1, #1\n"
 654       "MOV     R0, #1\n"
 655       "STR     R3, [SP]\n"
 656       "BL      sub_FFC8DF28\n"
 657       "MOV     R3, #1\n"
 658       "MOV     R2, #1\n"
 659       "MOV     R1, #1\n"
 660       "MOV     R0, #1\n"
 661       "STR     R3, [SP]\n"
 662 "loc_FFC91778:\n"
 663       "BL      sub_FFC8E068\n"
 664 "loc_FFC9177C:\n"
 665       "LDR     R0, [SP, #0x1C]\n"
 666       "BL      sub_FFC923F8\n"
 667       "B       loc_FFC911B4\n"
 668         );
 669 }
 670 
 671 
 672 //** sub_FFC8EC78_my  @ 0xFFC8EC78 
 673 
 674 void __attribute__((naked,noinline)) sub_FFC8EC78_my() {
 675 asm volatile (
 676       "STMFD   SP!, {R4-R8,LR}\n"
 677       "LDR     R7, =0x649C\n"
 678       "MOV     R4, R0\n"
 679       "LDR     R0, [R7, #0x1C]\n"
 680       "MOV     R1, #0x3E\n"
 681       "BL      sub_FFC173FC\n"
 682       "LDRSH   R0, [R4, #4]\n"
 683       "MOV     R2, #0\n"
 684       "MOV     R1, #0\n"
 685       "BL      sub_FFC8DCBC\n"
 686       "MOV     R6, R0\n"
 687       "LDRSH   R0, [R4, #6]\n"
 688       "BL      sub_FFC8DDC8\n"
 689       "LDRSH   R0, [R4, #8]\n"
 690       "BL      sub_FFC8DE20\n"
 691       "LDRSH   R0, [R4, #0xA]\n"
 692       "BL      sub_FFC8DE78\n"
 693       "LDRSH   R0, [R4, #0xC]\n"
 694       "BL      sub_FFC8DED0\n"
 695       "MOV     R5, R0\n"
 696       "LDR     R0, [R4]\n"
 697       "LDR     R8, =0x3C108\n"
 698       "CMP     R0, #0xB\n"
 699       "MOVEQ   R6, #0\n"
 700       "MOVEQ   R5, #0\n"
 701       "BEQ     loc_FFC8ED08\n"
 702       "CMP     R6, #1\n"
 703       "BNE     loc_FFC8ED08\n"
 704       "LDRSH   R0, [R4, #4]\n"
 705       "LDR     R1, =0xFFC8DC28\n"
 706       "MOV     R2, #2\n"
 707       "BL      sub_FFD059D4\n"
 708       "STRH    R0, [R4, #4]\n"
 709       "MOV     R0, #0\n"
 710       "STR     R0, [R7, #0x28]\n"
 711       "B       loc_FFC8ED10\n"
 712 "loc_FFC8ED08:\n"
 713       "LDRH    R0, [R8]\n"
 714       "STRH    R0, [R4, #4]\n"
 715 "loc_FFC8ED10:\n"
 716       "CMP     R5, #1\n"
 717       "LDRNEH  R0, [R8, #8]\n"
 718       "BNE     loc_FFC8ED2C\n"
 719       "LDRSH   R0, [R4, #0xC]\n"
 720       "MOV     R2, #0x20\n"
 721       "LDR     R1, =0xFFC8DCAC\n"
 722       "BL      sub_FFC92428\n"
 723 "loc_FFC8ED2C:\n"
 724       "STRH    R0, [R4, #0xC]\n"
 725       "LDRSH   R0, [R4, #6]\n"
 726 //      "BL      sub_FFC70CCC\n"  //original
 727       "BL      sub_FFC70CCC_my\n" //patch
 728       "LDRSH   R0, [R4, #8]\n"
 729       "MOV     R1, #1\n"
 730       "BL      sub_FFC714C8\n"
 731       "MOV     R1, #0\n"
 732       "ADD     R0, R4, #8\n"
 733       "BL      sub_FFC71550\n"
 734       "LDRSH   R0, [R4, #0xE]\n"
 735       "BL      sub_FFC84BF8\n"
 736       "LDR     R4, =0xBB8\n"
 737       "CMP     R6, #1\n"
 738       "BNE     loc_FFC8ED84\n"
 739       "LDR     R0, [R7, #0x1C]\n"
 740       "MOV     R2, R4\n"
 741       "MOV     R1, #2\n"
 742       "BL      sub_FFC17300\n"
 743       "TST     R0, #1\n"
 744       "LDRNE   R1, =0x532\n"
 745       "LDRNE   R0, =0xFFC8E338\n" //aExpdrv_c
 746       "BLNE    _DebugAssert \n"
 747 "loc_FFC8ED84:\n"
 748       "CMP     R5, #1\n"
 749       "LDMNEFD SP!, {R4-R8,PC}\n"
 750       "LDR     R0, [R7, #0x1C]\n"
 751       "MOV     R2, R4\n"
 752       "MOV     R1, #0x20\n"
 753       "BL      sub_FFC17300\n"
 754       "TST     R0, #1\n"
 755       "LDRNE   R1, =0x537\n"
 756       "LDRNE   R0, =0xFFC8E338\n" //aExpdrv_c
 757       "LDMNEFD SP!, {R4-R8,LR}\n"
 758       "BNE     _DebugAssert \n"
 759       "LDMFD   SP!, {R4-R8,PC}\n"
 760         );
 761 }
 762 
 763 
 764 //** sub_FFC70CCC_my  @ 0xFFC70CCC 
 765 
 766 void __attribute__((naked,noinline)) sub_FFC70CCC_my(  ) { 
 767 asm volatile (
 768       "STMFD   SP!, {R4-R6,LR}\n"
 769       "LDR     R5, =0x5F74\n"
 770       "MOV     R4, R0\n"
 771       "LDR     R0, [R5, #4]\n"
 772       "CMP     R0, #1\n"
 773       "LDRNE   R1, =0x16D\n"
 774       "LDRNE   R0, =0xFFC70A64\n" // aShutter_c
 775       "BLNE    _DebugAssert \n"
 776       "CMN     R4, #0xC00\n"
 777       "LDREQSH R4, [R5, #2]\n"
 778       "CMN     R4, #0xC00\n"
 779       "LDREQ   R1, =0x173\n"
 780       "LDREQ   R0, =0xFFC70A64\n" // aShutter_c
 781       "STRH    R4, [R5, #2]\n"
 782       "BLEQ    _DebugAssert \n"
 783       "MOV     R0, R4\n"
 784 //      "BL      _apex2us \n" //original
 785       "BL      apex2us \n"    //patch
 786       "MOV     R4, R0\n"
 787 //      "BL      sub_FFCA0200\n" //nulsub_
 788       "MOV     R0, R4\n"
 789       "BL      sub_FFCA4090\n"
 790       "TST     R0, #1\n"
 791       "LDMNEFD SP!, {R4-R6,LR}\n"
 792       "MOVNE   R1, #0x178\n"
 793       "LDRNE   R0, =0xFFC70A64\n" // aShutter_c
 794       "BNE     _DebugAssert \n"
 795       "LDMFD   SP!, {R4-R6,PC}\n"
 796         );
 797 }

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