root/platform/sx130is/sub/101f/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskCreateHook
  2. boot
  3. loc_FF810354_my
  4. sub_FF811198_my
  5. sub_FF815EE0_my
  6. taskcreate_Startup_my
  7. task_Startup_my
  8. spytask
  9. CreateTask_spytask
  10. CreateTask_PhySw
  11. init_file_modules_task
  12. sub_FF88E098_my
  13. sub_FF8705CC_my
  14. sub_FF8701F4_my
  15. sub_FF86FF14_my
  16. JogDial_task_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 //#include "stdlib.h"
   5 #include "dryos31.h"
   6 
   7 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
   8 
   9 const char * const new_sa = &_end;
  10 
  11 
  12 // Forward declarations
  13 void CreateTask_PhySw();
  14 void CreateTask_spytask();
  15 extern volatile int jogdial_stopped;
  16 void JogDial_task_my(void);
  17 
  18 /*----------------------------------------------------------------------
  19         taskCreateHook()
  20 -----------------------------------------------------------------------*/
  21 
  22 extern void task_CaptSeq();
  23 extern void task_InitFileModules();
  24 extern void task_RotaryEncoder();
  25 extern void task_MovieRecord();
  26 extern void task_ExpDrv();
  27 extern void task_FileWrite();
  28 
  29 void taskCreateHook(context_t **context) { 
  30         task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  31 
  32         // Replace firmware task addresses with ours
  33         if(tcb->entry == (void*)task_CaptSeq)                   tcb->entry = (void*)capt_seq_task; 
  34         if(tcb->entry == (void*)task_InitFileModules)   tcb->entry = (void*)init_file_modules_task;
  35         if(tcb->entry == (void*)task_RotaryEncoder)             tcb->entry = (void*)JogDial_task_my;
  36         if(tcb->entry == (void*)task_MovieRecord)               tcb->entry = (void*)movie_record_task;
  37         if(tcb->entry == (void*)task_ExpDrv)                    tcb->entry = (void*)exp_drv_task;
  38     if(tcb->entry == (void*)task_FileWrite)         tcb->entry = (void*)filewritetask;
  39 }
  40 
  41 /*----------------------------------------------------------------------
  42         boot()
  43 
  44         Main entry point for the CHDK code
  45 -----------------------------------------------------------------------*/
  46 void __attribute__((naked,noinline)) boot()
  47 {
  48 
  49     asm volatile (
  50         
  51 "               LDR     R1, =0xC0410000 \n"
  52 "               MOV     R0, #0 \n"
  53 "               STR     R0, [R1] \n"
  54 "               MOV     R1, #0x78 \n"
  55 "               MCR     p15, 0, R1,c1,c0 \n"
  56 "               MOV     R1, #0 \n"
  57 "               MCR     p15, 0, R1,c7,c10, 4 \n"
  58 "               MCR     p15, 0, R1,c7,c5 \n"
  59 "               MCR     p15, 0, R1,c7,c6 \n"
  60 "               MOV     R0, #0x3D \n"
  61 "               MCR     p15, 0, R0,c6,c0 \n"
  62 "               MOV     R0, #0xC000002F \n"
  63 "               MCR     p15, 0, R0,c6,c1 \n"
  64 "               MOV     R0, #0x33 \n"
  65 "               MCR     p15, 0, R0,c6,c2 \n"
  66 "               MOV     R0, #0x40000033 \n"
  67 "               MCR     p15, 0, R0,c6,c3 \n"
  68 "               MOV     R0, #0x80000017 \n"
  69 "               MCR     p15, 0, R0,c6,c4 \n"
  70 "               LDR     R0, =0xFF80002D \n"
  71 "               MCR     p15, 0, R0,c6,c5 \n"
  72 "               MOV     R0, #0x34 \n"
  73 "               MCR     p15, 0, R0,c2,c0 \n"
  74 "               MOV     R0, #0x34 \n"
  75 "               MCR     p15, 0, R0,c2,c0, 1 \n"
  76 "               MOV     R0, #0x34 \n"
  77 "               MCR     p15, 0, R0,c3,c0 \n"
  78 "               LDR     R0, =0x3333330 \n"
  79 "               MCR     p15, 0, R0,c5,c0, 2 \n"
  80 "               LDR     R0, =0x3333330 \n"
  81 "               MCR     p15, 0, R0,c5,c0, 3 \n"
  82 "               MRC     p15, 0, R0,c1,c0 \n"
  83 "               ORR     R0, R0, #0x1000 \n"
  84 "               ORR     R0, R0, #4 \n"
  85 "               ORR     R0, R0, #1 \n"
  86 "               MCR     p15, 0, R0,c1,c0 \n"
  87 "               MOV     R1, #0x80000006 \n"
  88 "               MCR     p15, 0, R1,c9,c1 \n"
  89 "               MOV     R1, #6 \n"
  90 "               MCR     p15, 0, R1,c9,c1, 1 \n"
  91 "               MRC     p15, 0, R1,c1,c0 \n"
  92 "               ORR     R1, R1, #0x50000 \n"
  93 "               MCR     p15, 0, R1,c1,c0 \n"
  94 "               LDR     R2, =0xC0200000 \n"
  95 "               MOV     R1, #1 \n"
  96 "               STR     R1, [R2,#0x10C] \n"
  97 "               MOV     R1, #0xFF \n"
  98 "               STR     R1, [R2,#0xC] \n"
  99 "               STR     R1, [R2,#0x1C] \n"
 100 "               STR     R1, [R2,#0x2C] \n"
 101 "               STR     R1, [R2,#0x3C] \n"
 102 "               STR     R1, [R2,#0x4C] \n"
 103 "               STR     R1, [R2,#0x5C] \n"
 104 "               STR     R1, [R2,#0x6C] \n"
 105 "               STR     R1, [R2,#0x7C] \n"
 106 "               STR     R1, [R2,#0x8C] \n"
 107 "               STR     R1, [R2,#0x9C] \n"
 108 "               STR     R1, [R2,#0xAC] \n"
 109 "               STR     R1, [R2,#0xBC] \n"
 110 "               STR     R1, [R2,#0xCC] \n"
 111 "               STR     R1, [R2,#0xDC] \n"
 112 "               STR     R1, [R2,#0xEC] \n"
 113 "               STR     R1, [R2,#0xFC] \n"
 114 "               LDR     R1, =0xC0400008 \n"
 115 "               LDR     R2, =0x430005 \n"
 116 "               STR     R2, [R1] \n"
 117 "               MOV     R1, #1 \n"
 118 "               LDR     R2, =0xC0243100 \n"
 119 "               STR     R2, [R1] \n"
 120 "               LDR     R2, =0xC0242010 \n"
 121 "               LDR     R1, [R2] \n"
 122 "               ORR     R1, R1, #1 \n"
 123 "               STR     R1, [R2] \n"
 124 "               LDR     R0, =0xFFC08438 \n"
 125 "               LDR     R1, =0x1900 \n"
 126 "               LDR     R3, =0xEE70 \n"
 127 "loc_FF81013C: \n"
 128 "               CMP     R1, R3 \n"
 129 "               LDRCC   R2, [R0],#4 \n"
 130 "               STRCC   R2, [R1],#4 \n"
 131 "               BCC     loc_FF81013C \n"
 132 "               LDR     R1, =0x166210 \n"
 133 "               MOV     R2, #0 \n"
 134 "loc_FF810154: \n"
 135 "               CMP     R3, R1 \n"
 136 "               STRCC   R2, [R3],#4 \n"
 137 "               BCC     loc_FF810154 \n"
 138 //"             B       loc_FF810354 \n"
 139 "               B       loc_FF810354_my \n"             // patched --------------->             
 140                 
 141     );
 142 };
 143 
 144 void __attribute__((naked,noinline)) loc_FF810354_my() {
 145 
 146     //*(int*)0x1934 = (int)taskCreateHook;
 147     *(int*)0x1938 = (int)taskCreateHook;
 148     *(int*)0x193C = (int)taskCreateHook;
 149     
 150         
 151         // SX130 @FF85F4F8
 152 
 153         // fix for correct power-on
 154         // must also comment out function in taskcreate_Startup_my
 155         //SX130
 156         if ((*(int*) 0xC0220118) & 1)                   // look at play switch
 157                 *(int*)(0x2478) = 0x100000;             // start in play mode
 158         else
 159                 *(int*)(0x2478) = 0x200000;             // start in rec mode    
 160         
 161         
 162         asm volatile (
 163         
 164 "               LDR     R0, =0xFF8103CC \n"
 165 "               MOV     R1, #0 \n"
 166 "               LDR     R3, =0xFF810404 \n"
 167 "loc_FF810360: \n"
 168 "               CMP     R0, R3 \n"
 169 "               LDRCC   R2, [R0],#4 \n"
 170 "               STRCC   R2, [R1],#4 \n"
 171 "               BCC     loc_FF810360 \n"
 172 "               LDR     R0, =0xFF810404 \n"
 173 "               MOV     R1, #0x4B0 \n"
 174 "               LDR     R3, =0xFF810618 \n"
 175 "loc_FF81037C: \n"
 176 "               CMP     R0, R3 \n"
 177 "               LDRCC   R2, [R0],#4 \n"
 178 "               STRCC   R2, [R1],#4 \n"
 179 "               BCC     loc_FF81037C \n"
 180 "               MOV     R0, #0xD2 \n"
 181 "               MSR     CPSR_cxsf, R0 \n"
 182 "               MOV     SP, #0x1000 \n"
 183 "               MOV     R0, #0xD3 \n"
 184 "               MSR     CPSR_cxsf, R0 \n"
 185 "               MOV     SP, #0x1000 \n"
 186 "               LDR     R0, =0x6C4 \n"
 187 "               LDR     R2, =0xEEEEEEEE \n"
 188 "               MOV     R3, #0x1000 \n"
 189 "loc_FF8103B0: \n"
 190 "               CMP     R0, R3 \n"
 191 "               STRCC   R2, [R0],#4 \n"
 192 "               BCC     loc_FF8103B0 \n"
 193 //"             BL      sub_FF811198 \n"
 194 "               BL      sub_FF811198_my \n"             // patched  ------------->
 195         
 196 
 197   );
 198 }
 199 
 200 void __attribute__((naked,noinline)) sub_FF811198_my() {
 201 
 202         asm volatile (
 203         
 204 "               STR     LR, [SP,#-4]! \n"
 205 "               SUB     SP, SP, #0x74 \n"
 206 "               MOV     R0, SP \n"
 207 "               MOV     R1, #0x74 \n"
 208 "               BL      sub_FFB4A184 \n"
 209 "               MOV     R0, #0x53000 \n"
 210 "               STR     R0, [SP,#0x4] \n"
 211 
 212 // Use original heap address - CHDK loaded at 0xF000000
 213 // Loading CHDK at 0x166210 leaves too little memory and camera crashes
 214 "               LDR     R0, =0x166210 \n"
 215 //"             LDR     R0, =new_sa \n"                 // added -------------->
 216 //"             LDR     R0, [R0] \n"                    // added -------------->
 217 
 218 "               LDR     R1, =0x2F9C00 \n"
 219 "               STR     R0, [SP,#0x8] \n"
 220 "               RSB     R0, R0, #0x1F80 \n"
 221 "               ADD     R0, R0, #0x2F0000 \n"
 222 "               STR     R0, [SP,#0xC] \n"
 223 "               LDR     R0, =0x2F1F80 \n"
 224 "               STR     R1, [SP,#0x0] \n"
 225 "               STRD    R0, [SP,#0x10] \n"
 226 "               MOV     R0, #0x22 \n"
 227 "               STR     R0, [SP,#0x18] \n"
 228 "               MOV     R0, #0x68 \n"
 229 "               STR     R0, [SP,#0x1C] \n"
 230 "               LDR     R0, =0x19B \n"
 231 //"             LDR     R1, =sub_FF815EE0 \n"
 232 "               LDR     R1, =sub_FF815EE0_my \n"        // patched -------------->
 233 
 234 "               B       sub_FF8111F0 \n "               // Return to firmware ----------->
 235 
 236         );
 237 }
 238 
 239 void __attribute__((naked,noinline)) sub_FF815EE0_my() {
 240         asm volatile (
 241         
 242 "               STMFD   SP!, {R4,LR} \n"
 243 "               BL      sub_FF810B20 \n"
 244 "               BL      sub_FF81A33C \n"
 245 "               CMP     R0, #0 \n"
 246 //"             ADRLT   R0, aDmsetup \n"        // "dmSetup"
 247 "               LDRLT   R0, =0xFF815FF4 \n"
 248 "               BLLT    sub_FF815FD4 \n" // err_init_task
 249 "               BL      sub_FF815B1C \n"
 250 "               CMP     R0, #0 \n"
 251 //"             ADRLT   R0, aTermdriverinit \n" // "termDriverInit"
 252 "               LDRLT   R0, =0xFF815FFC \n"
 253 "               BLLT    sub_FF815FD4 \n" // err_init_task
 254 //"             ADR     R0, a_term \n"  // "/_term"
 255 "               LDR     R0, =0xFF81600C \n"
 256 "               BL      sub_FF815C04 \n"
 257 "               CMP     R0, #0 \n"
 258 //"             ADRLT   R0, aTermdevicecrea \n" // "termDeviceCreate"
 259 "               LDRLT   R0, =0xFF816014 \n"
 260 "               BLLT    sub_FF815FD4 \n" // err_init_task
 261 //"             ADR     R0, a_term \n"  // "/_term"
 262 "               LDR     R0, =0xFF81600C \n"
 263 "               BL      sub_FF813CA4 \n"
 264 "               CMP     R0, #0 \n"
 265 //"             ADRLT   R0, aStdiosetup \n"     // "stdioSetup"
 266 "               LDRLT   R0, =0xFF816028 \n" 
 267 "               BLLT    sub_FF815FD4 \n" // err_init_task
 268 "               BL      sub_FF819CC4 \n"
 269 "               CMP     R0, #0 \n"
 270 //"             ADRLT   R0, aStdlibsetup \n" // "stdlibSetup"
 271 "               LDRLT   R0, =0xFF816034 \n"
 272 "               BLLT    sub_FF815FD4 \n" // err_init_task
 273 "               BL      sub_FF81167C \n"
 274 "               CMP     R0, #0 \n"
 275 //"             ADRLT   R0, aArmlib_setup \n" // "armlib_setup"
 276 "               LDRLT   R0, =0xFF816040 \n"
 277 "               BLLT    sub_FF815FD4 \n" // err_init_task
 278 "               LDMFD   SP!, {R4,LR} \n"
 279 "               B       taskcreate_Startup_my \n"
 280         
 281         );
 282 }
 283 
 284 // @ FF81FB54
 285 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 286 
 287     asm volatile (
 288         
 289 "               STMFD   SP!, {R3,LR} \n"
 290 //"             BL      j_nullsub_197 \n"
 291 "               BL      sub_FF83BF3C \n"
 292 "               CMP     R0, #0 \n"
 293 "               BNE     loc_FF81FB98 \n"
 294 "               BL      sub_FF835D84 \n"
 295 "               CMP     R0, #0 \n"
 296 "               BEQ     loc_FF81FB98 \n"
 297 "               BL      sub_FF834394 \n"
 298 "               CMP     R0, #0 \n"
 299 "               BNE     loc_FF81FB98 \n"
 300 "               BL      sub_FF833A50 \n"
 301 "               LDR     R1, =0xC0220000 \n"
 302 "               MOV     R0, #0x44 \n"
 303 "               STR     R0, [R1,#0x80] \n"
 304 "               BL      sub_FF833C44 \n"
 305 "loc_FF81FB94: \n"
 306 "               B       loc_FF81FB94 \n"
 307 "loc_FF81FB98: \n"
 308 //"             BL      sub_FF8343A0 \n" // remove for correct power on (hold pwr button for rec)
 309 //"             BL      j_nullsub_198 \n"
 310 "               BL      sub_FF83A158 \n"
 311 "               LDR     R1, =0x34E000 \n"
 312 "               MOV     R0, #0 \n"
 313 "               BL      sub_FF83A5A0 \n"
 314 "               BL      sub_FF83A34C \n"
 315 "               MOV     R3, #0 \n"
 316 "               STR     R3, [SP] \n"
 317 //"             ADR     R3, task_Startup \n"
 318 "               LDR     R3, =task_Startup_my \n"        // Patched ----------->
 319 
 320 "               B       sub_FF81FBC0 \n"                // Return to firmware ----------->
 321         );
 322 }
 323 
 324 // @ FF81FAF0
 325 void __attribute__((naked,noinline)) task_Startup_my() {
 326 
 327         asm volatile (
 328 "               STMFD   SP!, {R4,LR} \n"
 329 "               BL      sub_FF816594 \n"
 330 "               BL      sub_FF8354FC \n"
 331 "               BL      sub_FF833714 \n"
 332 //"             BL      j_nullsub_201 \n"
 333 "               BL      sub_FF83C16C \n"
 334 //"             BL      sub_FF83C014 \n"                // Skip starting diskboot.bin again
 335 "               BL      sub_FF83C308 \n"
 336 "               BL      sub_FF832474 \n"
 337 "               BL      sub_FF83C19C \n"
 338 "               BL      sub_FF8398FC \n"
 339 "               BL      sub_FF83C30C \n"
 340 
 341 //"             BL      taskcreate_PhySw \n"
 342 "               BL      CreateTask_PhySw \n"                    // our keyboard task
 343 "               BL      CreateTask_spytask \n"                  // chdk initialization
 344 
 345 "               B       sub_FF81FB24 \n"                // Return to firmware ----------->
 346         );
 347 
 348 }
 349 
 350 
 351 /*----------------------------------------------------------------------
 352         spytask
 353 -----------------------------------------------------------------------*/
 354 void spytask(long ua, long ub, long uc, long ud, long ue, long uf)
 355 {
 356     core_spytask();
 357 }
 358 
 359 
 360 /*----------------------------------------------------------------------
 361         CreateTask_spytask
 362 -----------------------------------------------------------------------*/
 363 void CreateTask_spytask() {
 364         _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0);
 365 }
 366 
 367 // @ FF83427C
 368 void __attribute__((naked,noinline)) CreateTask_PhySw() {
 369 
 370     asm volatile (
 371 
 372 "               STMFD   SP!, {R3-R5,LR} \n"
 373 "               LDR     R4, =0x1C30 \n"
 374 "               LDR     R0, [R4,#0x10] \n"
 375 "               CMP     R0, #0 \n"
 376 "               BNE     sub_FF8342B0 \n"
 377 "               MOV     R3, #0 \n"
 378 "               STR     R3, [SP] \n"
 379 //"             ADR     R3, task_PhySw \n"
 380 //"             MOV     R2, #0x800 \n"
 381 
 382 "               LDR     R3, =mykbd_task \n"             // PhySw Task patch
 383 "               MOV     R2, #0x2000 \n"                 // larger stack
 384 
 385 "               B       sub_FF8342A0 \n"                // Return to firmware ----------->
 386         );
 387         
 388 }
 389 
 390 
 391 /*----------------------------------------------------------------------
 392         init_file_modules_task()
 393 -----------------------------------------------------------------------*/
 394 // @ 0xff897938
 395 void __attribute__((naked,noinline)) init_file_modules_task() {
 396         asm volatile (
 397 "               STMFD   SP!, {R4-R6,LR} \n"
 398 "               BL      sub_FF88E06C \n"
 399 "               LDR     R5, =0x5006 \n"
 400 "               MOVS    R4, R0 \n"
 401 "               MOVNE   R1, #0 \n"
 402 "               MOVNE   R0, R5 \n"
 403 "               BLNE    sub_FF891DDC \n"                // eventproc_export_PostLogicalEventToUI
 404 //"             BL      sub_FF88E098 \n"
 405 "               BL      sub_FF88E098_my \n"             // patched ------------->
 406 "               BL      core_spytask_can_start \n"      // added ------------->
 407 
 408 "               B       sub_FF897958 \n"                // Return to firmware ----------->
 409         );
 410 }
 411 
 412 void __attribute__((naked,noinline)) sub_FF88E098_my() {
 413         asm volatile (
 414         
 415         
 416 "               STMFD   SP!, {R4,LR} \n"
 417 "               MOV     R0, #3 \n"
 418 //"             BL      sub_FF8705CC \n"                                
 419 "               BL      sub_FF8705CC_my \n"             // patched ------------->
 420 //"             BL      nullsub_72 \n"
 421 
 422 "               B       sub_FF88E0A8 \n"                // Return to firmware ----------->
 423         );
 424 }
 425 
 426 void __attribute__((naked,noinline)) sub_FF8705CC_my() {
 427         asm volatile (
 428         
 429 "               STMFD   SP!, {R4-R8,LR} \n"
 430 "               MOV     R8, R0 \n"
 431 "               BL      sub_FF87054C \n"
 432 "               LDR     R1, =0x37988 \n"
 433 "               MOV     R6, R0 \n"
 434 "               ADD     R4, R1, R0,LSL#7 \n"
 435 "               LDR     R0, [R4,#0x6C] \n"
 436 "               CMP     R0, #4 \n"
 437 "               LDREQ   R1, =0x83F \n"
 438 "               LDREQ   R0, =0xFF87008C \n"     // "Mounter.c"
 439 "               BLEQ    _DebugAssert \n"
 440 "               MOV     R1, R8 \n"
 441 "               MOV     R0, R6 \n"
 442 "               BL      sub_FF86FE00 \n"
 443 "               LDR     R0, [R4,#0x38] \n"
 444 "               BL      sub_FF870C2C \n"
 445 "               CMP     R0, #0 \n"
 446 "               STREQ   R0, [R4,#0x6C] \n"
 447 "               MOV     R0, R6 \n"
 448 "               BL      sub_FF86FE90 \n"
 449 "               MOV     R0, R6 \n"
 450 //"             BL      sub_FF8701F4 \n"
 451 "               BL      sub_FF8701F4_my \n"             // patched ------------->
 452 
 453 "               B       sub_FF870624 \n"                // Return to firmware ----------->
 454         );
 455 }
 456 
 457 void __attribute__((naked,noinline)) sub_FF8701F4_my() {
 458         asm volatile (
 459         
 460 "               STMFD   SP!, {R4-R6,LR} \n"
 461 "               MOV     R5, R0 \n"
 462 "               LDR     R0, =0x37988 \n"
 463 "               ADD     R4, R0, R5,LSL#7 \n"
 464 "               LDR     R0, [R4,#0x6C] \n"
 465 "               TST     R0, #2 \n"
 466 "               MOVNE   R0, #1 \n"
 467 "               LDMNEFD SP!, {R4-R6,PC} \n"
 468 "               LDR     R0, [R4,#0x38] \n"
 469 "               MOV     R1, R5 \n"
 470 //"             BL      sub_FF86FF14 \n"
 471 "               BL      sub_FF86FF14_my \n"             // patched ------------->
 472 
 473 "               B       sub_FF870220 \n"                // Return to firmware ----------->
 474         );
 475 }
 476 
 477 void __attribute__((naked,noinline)) sub_FF86FF14_my() {
 478         asm volatile (
 479 "               STMFD   SP!, {R4-R10,LR} \n"
 480 "               MOV     R9, R0 \n"
 481 "               LDR     R0, =0x37988 \n"
 482 "               MOV     R8, #0 \n"
 483 "               ADD     R5, R0, R1,LSL#7 \n"
 484 "               LDR     R0, [R5,#0x3C] \n"
 485 "               MOV     R7, #0 \n"
 486 "               CMP     R0, #7 \n"
 487 "               MOV     R6, #0 \n"
 488 "               ADDLS   PC, PC, R0,LSL#2 \n"
 489 "               B       sub_FF87006C \n"
 490 "loc_FF86FF40: \n"
 491 "               B       loc_FF86FF78 \n"
 492 "loc_FF86FF44: \n"
 493 "               B       loc_FF86FF60 \n"
 494 "loc_FF86FF48: \n"
 495 "               B       loc_FF86FF60 \n"
 496 "loc_FF86FF4C: \n"
 497 "               B       loc_FF86FF60 \n"
 498 "loc_FF86FF50: \n"
 499 "               B       loc_FF86FF60 \n"
 500 "loc_FF86FF54: \n"
 501 "               B       sub_FF870064 \n"
 502 "loc_FF86FF58: \n"
 503 "               B       loc_FF86FF60 \n"
 504 "loc_FF86FF5C: \n"
 505 "               B       loc_FF86FF60 \n"
 506 "loc_FF86FF60: \n"
 507 // jumptable FF86FF38 entries 1-4,6,7
 508 "               MOV     R2, #0 \n"
 509 "               MOV     R1, #0x200 \n"
 510 "               MOV     R0, #2 \n"
 511 "               BL      sub_FF888184 \n"
 512 "               MOVS    R4, R0 \n"
 513 "               BNE     loc_FF86FF80 \n"
 514 "loc_FF86FF78: \n"
 515 // jumptable FF86FF38 entry 0
 516 "               MOV     R0, #0 \n"
 517 "               LDMFD   SP!, {R4-R10,PC} \n"
 518 "loc_FF86FF80: \n"
 519 "               LDR     R12, [R5,#0x50] \n"
 520 "               MOV     R3, R4 \n"
 521 "               MOV     R2, #1 \n"
 522 "               MOV     R1, #0 \n"
 523 "               MOV     R0, R9 \n"
 524 "               BLX     R12 \n"
 525 "               CMP     R0, #1 \n"
 526 "               BNE     loc_FF86FFAC \n"
 527 "               MOV     R0, #2 \n"
 528 "               BL      sub_FF8882D4 \n"
 529 "               B       loc_FF86FF78 \n"
 530 "loc_FF86FFAC: \n"
 531 "               LDR     R1, [R5,#0x64] \n"
 532 "               MOV     R0, R9 \n"
 533 "               BLX     R1 \n"
 534 
 535 //------------------  begin added code ---------------
 536                 "MOV    R1, R4\n"           //  pointer to MBR in R1
 537                 "BL     mbr_read_dryos\n"   //  total sectors count in R0 before and after call
 538 
 539                 // Start of DataGhost's FAT32 autodetection code
 540                 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 541                 // According to the code below, we can use R1, R2, R3 and R12.
 542                 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 543                 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 544                 "MOV    R12, R4\n"                    // Copy the MBR start address so we have something to work with
 545                 "MOV    LR, R4\n"                     // Save old offset for MBR signature
 546                 "MOV    R1, #1\n"                     // Note the current partition number
 547                 "B      dg_sd_fat32_enter\n"          // We actually need to check the first partition as well, no increments yet!
 548    "dg_sd_fat32:\n"
 549                 "CMP    R1, #4\n"                     // Did we already see the 4th partition?
 550                 "BEQ    dg_sd_fat32_end\n"            // Yes, break. We didn't find anything, so don't change anything.
 551                 "ADD    R12, R12, #0x10\n"            // Second partition
 552                 "ADD    R1, R1, #1\n"                 // Second partition for the loop
 553    "dg_sd_fat32_enter:\n"
 554                 "LDRB   R2, [R12, #0x1BE]\n"          // Partition status
 555                 "LDRB   R3, [R12, #0x1C2]\n"          // Partition type (FAT32 = 0xB)
 556                 "CMP    R3, #0xB\n"                   // Is this a FAT32 partition?
 557                 "CMPNE  R3, #0xC\n"                   // Not 0xB, is it 0xC (FAT32 LBA) then?
 558                 "BNE    dg_sd_fat32\n"                // No, it isn't.
 559                 "CMP    R2, #0x00\n"                  // It is, check the validity of the partition type
 560                 "CMPNE  R2, #0x80\n"
 561                 "BNE    dg_sd_fat32\n"                // Invalid, go to next partition
 562                                                                                            // This partition is valid, it's the first one, bingo!
 563                 "MOV    R4, R12\n"                    // Move the new MBR offset for the partition detection.
 564 
 565    "dg_sd_fat32_end:\n"
 566                 // End of DataGhost's FAT32 autodetection code
 567 //------------------  end added code ---------------
 568 
 569 "               LDRB    R1, [R4,#0x1C9] \n"
 570 "               LDRB    R3, [R4,#0x1C8] \n"
 571 "               LDRB    R12, [R4,#0x1CC] \n"
 572 "               MOV     R1, R1,LSL#24 \n"
 573 "               ORR     R1, R1, R3,LSL#16 \n"
 574 "               LDRB    R3, [R4,#0x1C7] \n"
 575 "               LDRB    R2, [R4,#0x1BE] \n"
 576 //"             LDRB    LR, [R4,#0x1FF] \n"             // Replaced below
 577 "               ORR     R1, R1, R3,LSL#8 \n"
 578 "               LDRB    R3, [R4,#0x1C6] \n"
 579 "               CMP     R2, #0 \n"
 580 "               CMPNE   R2, #0x80 \n"
 581 "               ORR     R1, R1, R3 \n"
 582 "               LDRB    R3, [R4,#0x1CD] \n"
 583 "               MOV     R3, R3,LSL#24 \n"
 584 "               ORR     R3, R3, R12,LSL#16 \n"
 585 "               LDRB    R12, [R4,#0x1CB] \n"
 586 "               ORR     R3, R3, R12,LSL#8 \n"
 587 "               LDRB    R12, [R4,#0x1CA] \n"
 588 "               ORR     R3, R3, R12 \n"
 589 //"             LDRB    R12, [R4,#0x1FE] \n"            // Replaced below
 590 
 591 "               LDRB    R12, [LR,#0x1FE]\n"            // New! First MBR signature byte (0x55)
 592 "               LDRB    LR, [LR,#0x1FF]\n"             //      Last MBR signature byte (0xAA)
 593 
 594 "               B       sub_FF87000C \n"                // Return to firmware ----------->
 595 
 596         );
 597 }
 598 
 599 /*----------------------------------------------------------------------
 600         JogDial_task_my()
 601 -----------------------------------------------------------------------*/
 602 // @ 0xff85fd80
 603 void __attribute__((naked,noinline)) JogDial_task_my()
 604 {
 605         asm volatile (
 606 "               STMFD   SP!, {R4-R11,LR} \n"
 607 "               SUB     SP, SP, #0x1C \n"
 608 "               BL      sub_FF860118 \n"
 609 "               LDR     R1, =0x2480 \n"
 610 "               LDR     R6, =0xFFB4F5A4 \n"
 611 "               MOV     R0, #0 \n"
 612 "               ADD     R3, SP, #0x10 \n"
 613 "               ADD     R12, SP, #0x14 \n"
 614 "               ADD     R10, SP, #0x8 \n"
 615 "               MOV     R2, #0 \n"
 616 "               ADD     R9, SP, #0xC \n"
 617 "loc_FF85FDAC: \n"
 618 "               ADD     R12, SP, #0x14 \n"
 619 "               ADD     LR, R12, R0,LSL#1 \n"
 620 "               MOV     R2, #0 \n"
 621 "               ADD     R3, SP, #0x10 \n"
 622 "               STRH    R2, [LR] \n"
 623 "               ADD     LR, R3, R0,LSL#1 \n"
 624 "               STRH    R2, [LR] \n"
 625 "               STR     R2, [R9,R0,LSL#2] \n"
 626 "               STR     R2, [R10,R0,LSL#2] \n"
 627 "               ADD     R0, R0, #1 \n"
 628 "               CMP     R0, #1 \n"
 629 "               BLT     loc_FF85FDAC \n"
 630 "loc_FF85FDDC: \n"
 631 "               LDR     R0, =0x2480 \n"
 632 "               MOV     R2, #0 \n"
 633 "               LDR     R0, [R0,#8] \n"
 634 "               MOV     R1, SP \n"
 635 "               BL      sub_FF839B8C \n"
 636 "               CMP     R0, #0 \n"
 637 "               LDRNE   R1, =0x262 \n"
 638 //"             ADRNE   R0, aRotaryencoder_ \n" // "RotaryEncoder.c"
 639 "               LDRNE   R0, =0xFF86003C \n"
 640 "               BLNE    _DebugAssert \n"
 641 "               LDR     R0, [SP] \n"
 642 "               AND     R4, R0, #0xFF \n"
 643 "               AND     R0, R0, #0xFF00 \n"
 644 "               CMP     R0, #0x100 \n"
 645 "               BEQ     loc_FF85FE4C \n"
 646 "               CMP     R0, #0x200 \n"
 647 "               BEQ     loc_FF85FE84 \n"
 648 "               CMP     R0, #0x300 \n"
 649 "               BEQ     loc_FF86007C \n"
 650 "               CMP     R0, #0x400 \n"
 651 "               BNE     loc_FF85FDDC \n"
 652 "               CMP     R4, #0 \n"
 653 "               LDRNE   R1, =0x2ED \n"
 654 //"             ADRNE   R0, aRotaryencoder_ \n"// "RotaryEncoder.c"
 655 "               LDRNE   R0, =0xFF86003C \n"
 656 "               BLNE    _DebugAssert \n"
 657 "               RSB     R0, R4, R4,LSL#3 \n"
 658 "               LDR     R0, [R6,R0,LSL#2] \n"
 659 "loc_FF85FE44: \n"
 660 "               BL      sub_FF8600FC \n"
 661 "               B       loc_FF85FDDC \n"
 662 "loc_FF85FE4C: \n"
 663 //------------------  begin added code ---------------
 664 "labelA: \n"
 665                 "LDR    R0, =jogdial_stopped\n"
 666                 "LDR    R0, [R0]\n"
 667                 "CMP    R0, #1\n"
 668                 "BNE    labelB\n"                       // continue on if jogdial_stopped = 0
 669                 "MOV    R0, #40\n"
 670                 "BL     _SleepTask\n"                   // jogdial_stopped=1 -- give time back to OS and suspend jogdial task
 671                 "B      labelA\n"
 672 "labelB: \n" 
 673 //------------------  end added code -----------------
 674 
 675 "               LDR     R7, =0x248C \n"
 676 "               LDR     R0, [R7,R4,LSL#2] \n"
 677 "               BL      sub_FF83AB24 \n"
 678 //"             ADR     R2, unk_FF85FCCC \n"
 679 "               LDR     R2, =0xFF85FCCC \n"
 680 "               MOV     R1, R2 \n"
 681 "               ORR     R3, R4, #0x200 \n"
 682 "               MOV     R0, #0x28 \n"
 683 "               BL      sub_FF83AA40 \n"
 684 "               TST     R0, #1 \n"
 685 "               CMPNE   R0, #0x15 \n"
 686 "               STR     R0, [R10,R4,LSL#2] \n"
 687 "               BEQ     loc_FF85FDDC \n"
 688 "               MOV     R1, #0x274 \n"
 689 "               B       loc_FF860028 \n"
 690 "loc_FF85FE84: \n"
 691 "               RSB     R5, R4, R4,LSL#3 \n"
 692 "               LDR     R0, [R6,R5,LSL#2] \n"
 693 "               LDR     R1, =0xC0240104 \n"
 694 "               LDR     R0, [R1,R0,LSL#8] \n"
 695 "               MOV     R2, R0,ASR#16 \n"
 696 "               ADD     R0, SP, #0x14 \n"
 697 "               ADD     R0, R0, R4,LSL#1 \n"
 698 "               STR     R0, [SP,#0x18] \n"
 699 "               STRH    R2, [R0] \n"
 700 "               ADD     R0, SP, #0x10 \n"
 701 "               ADD     R11, R0, R4,LSL#1 \n"
 702 "               LDRSH   R3, [R11] \n"
 703 "               SUB     R0, R2, R3 \n"
 704 "               CMP     R0, #0 \n"
 705 "               BNE     loc_FF85FF04 \n"
 706 "               LDR     R0, [R9,R4,LSL#2] \n"
 707 "               CMP     R0, #0 \n"
 708 "               BEQ     loc_FF85FFE4 \n"
 709 "               LDR     R7, =0x248C \n"
 710 "               LDR     R0, [R7,R4,LSL#2] \n"
 711 "               BL      sub_FF83AB24 \n"
 712 //"             ADR     R2, sub_FF85FCD8 \n"
 713 "               LDR     R2, =0xFF85FCD8 \n"
 714 "               MOV     R1, R2 \n"
 715 "               ORR     R3, R4, #0x300 \n"
 716 "               MOV     R0, #0x1F4 \n"
 717 "               BL      sub_FF83AA40 \n"
 718 "               TST     R0, #1 \n"
 719 "               CMPNE   R0, #0x15 \n"
 720 "               STR     R0, [R7,R4,LSL#2] \n"
 721 "               BEQ     loc_FF85FFE4 \n"
 722 "               LDR     R1, =0x28D \n"
 723 "               B       loc_FF85FFDC \n"
 724 "loc_FF85FF04: \n"
 725 "               MOV     R1, R0 \n"
 726 "               RSBLT   R0, R0, #0 \n"
 727 "               MOVLE   R7, #0 \n"
 728 "               MOVGT   R7, #1 \n"
 729 "               CMP     R0, #0xFF \n"
 730 "               BLS     loc_FF85FF44 \n"
 731 "               CMP     R1, #0 \n"
 732 "               RSBLE   R0, R3, #0xFF \n"
 733 "               ADDLE   R0, R0, #0x7F00 \n"
 734 "               ADDLE   R0, R0, R2 \n"
 735 "               RSBGT   R0, R2, #0xFF \n"
 736 "               ADDGT   R0, R0, #0x7F00 \n"
 737 "               ADDGT   R0, R0, R3 \n"
 738 "               ADD     R0, R0, #0x8000 \n"
 739 "               ADD     R0, R0, #1 \n"
 740 "               EOR     R7, R7, #1 \n"
 741 "loc_FF85FF44: \n"
 742 "               STR     R0, [SP,#0x4] \n"
 743 "               LDR     R0, [R9,R4,LSL#2] \n"
 744 "               CMP     R0, #0 \n"
 745 "               ADDEQ   R0, R6, R5,LSL#2 \n"
 746 "               LDREQ   R0, [R0,#8] \n"
 747 "               BEQ     loc_FF85FF7C \n"
 748 "               ADD     R8, R6, R5,LSL#2 \n"
 749 "               ADD     R1, R8, R7,LSL#2 \n"
 750 "               LDR     R1, [R1,#0x10] \n"
 751 "               CMP     R1, R0 \n"
 752 "               BEQ     loc_FF85FF80 \n"
 753 "               LDR     R0, [R8,#0xC] \n"
 754 "               BL      sub_FF893C28 \n"
 755 "               LDR     R0, [R8,#8] \n"
 756 "loc_FF85FF7C: \n"
 757 "               BL      sub_FF893C28 \n"
 758 "loc_FF85FF80: \n"
 759 "               ADD     R0, R6, R5,LSL#2 \n"
 760 "               ADD     R7, R0, R7,LSL#2 \n"
 761 "               LDR     R0, [R7,#0x10] \n"
 762 "               LDR     R1, [SP,#0x4] \n"
 763 "               BL      sub_FF893B50 \n"
 764 "               LDR     R0, [R7,#0x10] \n"
 765 "               LDR     R7, =0x248C \n"
 766 "               STR     R0, [R9,R4,LSL#2] \n"
 767 "               LDR     R0, [SP,#0x18] \n"
 768 "               LDRH    R0, [R0] \n"
 769 "               STRH    R0, [R11] \n"
 770 "               LDR     R0, [R7,R4,LSL#2] \n"
 771 "               BL      sub_FF83AB24 \n"
 772 //"             ADR     R2, sub_FF85FCD8 \n"
 773 "               LDR     R2, =0xFF85FCD8 \n"
 774 "               MOV     R1, R2 \n"
 775 "               ORR     R3, R4, #0x300 \n"
 776 "               MOV     R0, #0x1F4 \n"
 777 "               BL      sub_FF83AA40 \n"
 778 "               TST     R0, #1 \n"
 779 "               CMPNE   R0, #0x15 \n"
 780 "               STR     R0, [R7,R4,LSL#2] \n"
 781 "               BEQ     loc_FF85FFE4 \n"
 782 "               LDR     R1, =0x2CF \n"
 783 "loc_FF85FFDC: \n"
 784 //"             ADR     R0, aRotaryencoder_ \n" // "RotaryEncoder.c"
 785 "               LDR     R0, =0xFF86003C \n"
 786 "               BL      _DebugAssert \n"
 787 "loc_FF85FFE4: \n"
 788 "               ADD     R0, R6, R5,LSL#2 \n"
 789 "               LDR     R0, [R0,#0x18] \n"
 790 "               CMP     R0, #1 \n"
 791 "               BNE     loc_FF860074 \n"
 792 "               LDR     R0, =0x2480 \n"
 793 "               LDR     R0, [R0,#0x10] \n"
 794 "               CMP     R0, #0 \n"
 795 "loc_FF860000: \n"
 796 "               BEQ     loc_FF860074 \n"
 797 //"             ADR     R2, unk_FF85FCCC \n"
 798 "               LDR     R2, =0xFF85FCCC \n"
 799 "               MOV     R1, R2 \n"
 800 "               ORR     R3, R4, #0x400 \n"
 801 "               BL      sub_FF83AA40 \n"
 802 "               TST     R0, #1 \n"
 803 "               CMPNE   R0, #0x15 \n"
 804 "               STR     R0, [R10,R4,LSL#2] \n"
 805 "               BEQ     loc_FF85FDDC \n"
 806 "               LDR     R1, =0x2D6 \n"
 807 "loc_FF860028: \n"
 808 //"             ADR     R0, aRotaryencoder_ \n" // "RotaryEncoder.c"
 809 "               LDR     R0, =0xFF86003C \n"
 810 "               BL      _DebugAssert \n"
 811 "               B       loc_FF85FDDC \n"
 812 "loc_FF860074: \n"
 813 "               LDR     R0, [R6,R5,LSL#2] \n"
 814 "               B       loc_FF85FE44 \n"
 815 "loc_FF86007C: \n"
 816 "               LDR     R0, [R9,R4,LSL#2] \n"
 817 "               CMP     R0, #0 \n"
 818 "               MOVEQ   R1, #0x2E0 \n"
 819 //"             ADREQ   R0, aRotaryencoder_ \n" // "RotaryEncoder.c"
 820 "               LDREQ   R0, =0xFF86003C \n"
 821 "               BLEQ    _DebugAssert \n"
 822 "               RSB     R0, R4, R4,LSL#3 \n"
 823 "               ADD     R0, R6, R0,LSL#2 \n"
 824 "               LDR     R0, [R0,#0xC] \n"
 825 "               BL      sub_FF893C28 \n"
 826 "               MOV     R2, #0 \n"
 827 "               STR     R2, [R9,R4,LSL#2] \n"
 828 "               B       loc_FF85FDDC \n"
 829         );
 830 }

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