root/platform/sx130is/sub/101c/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskCreateHook
  2. boot
  3. loc_FF810354_my
  4. sub_FF811198_my
  5. sub_FF815EE0_my
  6. taskcreate_Startup_my
  7. task_Startup_my
  8. spytask
  9. CreateTask_spytask
  10. CreateTask_PhySw
  11. init_file_modules_task
  12. sub_FF88E098_my
  13. sub_FF8705CC_my
  14. sub_FF8701F4_my
  15. sub_FF86FF14_my
  16. JogDial_task_my

   1 #include "lolevel.h"
   2 #include "platform.h"
   3 #include "core.h"
   4 //#include "stdlib.h"
   5 #include "dryos31.h"
   6 
   7 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
   8 
   9 const char * const new_sa = &_end;
  10 
  11 
  12 // Forward declarations
  13 void CreateTask_PhySw();
  14 void CreateTask_spytask();
  15 extern volatile int jogdial_stopped;
  16 void JogDial_task_my(void);
  17 
  18 /*----------------------------------------------------------------------
  19         taskCreateHook()
  20 -----------------------------------------------------------------------*/
  21 
  22 extern void task_CaptSeq();
  23 extern void task_InitFileModules();
  24 extern void task_RotaryEncoder();
  25 extern void task_MovieRecord();
  26 extern void task_ExpDrv();
  27 
  28 void taskCreateHook(context_t **context) { 
  29         task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  30 
  31         // Replace firmware task addresses with ours
  32         if(tcb->entry == (void*)task_CaptSeq)                   tcb->entry = (void*)capt_seq_task; 
  33         if(tcb->entry == (void*)task_InitFileModules)   tcb->entry = (void*)init_file_modules_task;
  34         if(tcb->entry == (void*)task_RotaryEncoder)             tcb->entry = (void*)JogDial_task_my;
  35         if(tcb->entry == (void*)task_MovieRecord)               tcb->entry = (void*)movie_record_task;
  36         if(tcb->entry == (void*)task_ExpDrv)                    tcb->entry = (void*)exp_drv_task;
  37 }
  38 
  39 /*----------------------------------------------------------------------
  40         boot()
  41 
  42         Main entry point for the CHDK code
  43 -----------------------------------------------------------------------*/
  44 void __attribute__((naked,noinline)) boot()
  45 {
  46 
  47     asm volatile (
  48         
  49 "               LDR     R1, =0xC0410000 \n"
  50 "               MOV     R0, #0 \n"
  51 "               STR     R0, [R1] \n"
  52 "               MOV     R1, #0x78 \n"
  53 "               MCR     p15, 0, R1,c1,c0 \n"
  54 "               MOV     R1, #0 \n"
  55 "               MCR     p15, 0, R1,c7,c10, 4 \n"
  56 "               MCR     p15, 0, R1,c7,c5 \n"
  57 "               MCR     p15, 0, R1,c7,c6 \n"
  58 "               MOV     R0, #0x3D \n"
  59 "               MCR     p15, 0, R0,c6,c0 \n"
  60 "               MOV     R0, #0xC000002F \n"
  61 "               MCR     p15, 0, R0,c6,c1 \n"
  62 "               MOV     R0, #0x33 \n"
  63 "               MCR     p15, 0, R0,c6,c2 \n"
  64 "               MOV     R0, #0x40000033 \n"
  65 "               MCR     p15, 0, R0,c6,c3 \n"
  66 "               MOV     R0, #0x80000017 \n"
  67 "               MCR     p15, 0, R0,c6,c4 \n"
  68 "               LDR     R0, =0xFF80002D \n"
  69 "               MCR     p15, 0, R0,c6,c5 \n"
  70 "               MOV     R0, #0x34 \n"
  71 "               MCR     p15, 0, R0,c2,c0 \n"
  72 "               MOV     R0, #0x34 \n"
  73 "               MCR     p15, 0, R0,c2,c0, 1 \n"
  74 "               MOV     R0, #0x34 \n"
  75 "               MCR     p15, 0, R0,c3,c0 \n"
  76 "               LDR     R0, =0x3333330 \n"
  77 "               MCR     p15, 0, R0,c5,c0, 2 \n"
  78 "               LDR     R0, =0x3333330 \n"
  79 "               MCR     p15, 0, R0,c5,c0, 3 \n"
  80 "               MRC     p15, 0, R0,c1,c0 \n"
  81 "               ORR     R0, R0, #0x1000 \n"
  82 "               ORR     R0, R0, #4 \n"
  83 "               ORR     R0, R0, #1 \n"
  84 "               MCR     p15, 0, R0,c1,c0 \n"
  85 "               MOV     R1, #0x80000006 \n"
  86 "               MCR     p15, 0, R1,c9,c1 \n"
  87 "               MOV     R1, #6 \n"
  88 "               MCR     p15, 0, R1,c9,c1, 1 \n"
  89 "               MRC     p15, 0, R1,c1,c0 \n"
  90 "               ORR     R1, R1, #0x50000 \n"
  91 "               MCR     p15, 0, R1,c1,c0 \n"
  92 "               LDR     R2, =0xC0200000 \n"
  93 "               MOV     R1, #1 \n"
  94 "               STR     R1, [R2,#0x10C] \n"
  95 "               MOV     R1, #0xFF \n"
  96 "               STR     R1, [R2,#0xC] \n"
  97 "               STR     R1, [R2,#0x1C] \n"
  98 "               STR     R1, [R2,#0x2C] \n"
  99 "               STR     R1, [R2,#0x3C] \n"
 100 "               STR     R1, [R2,#0x4C] \n"
 101 "               STR     R1, [R2,#0x5C] \n"
 102 "               STR     R1, [R2,#0x6C] \n"
 103 "               STR     R1, [R2,#0x7C] \n"
 104 "               STR     R1, [R2,#0x8C] \n"
 105 "               STR     R1, [R2,#0x9C] \n"
 106 "               STR     R1, [R2,#0xAC] \n"
 107 "               STR     R1, [R2,#0xBC] \n"
 108 "               STR     R1, [R2,#0xCC] \n"
 109 "               STR     R1, [R2,#0xDC] \n"
 110 "               STR     R1, [R2,#0xEC] \n"
 111 "               STR     R1, [R2,#0xFC] \n"
 112 "               LDR     R1, =0xC0400008 \n"
 113 "               LDR     R2, =0x430005 \n"
 114 "               STR     R2, [R1] \n"
 115 "               MOV     R1, #1 \n"
 116 "               LDR     R2, =0xC0243100 \n"
 117 "               STR     R2, [R1] \n"
 118 "               LDR     R2, =0xC0242010 \n"
 119 "               LDR     R1, [R2] \n"
 120 "               ORR     R1, R1, #1 \n"
 121 "               STR     R1, [R2] \n"
 122 "               LDR     R0, =0xFFC08428 \n"
 123 "               LDR     R1, =0x1900 \n"
 124 "               LDR     R3, =0xEE70 \n"
 125 "loc_FF81013C: \n"
 126 "               CMP     R1, R3 \n"
 127 "               LDRCC   R2, [R0],#4 \n"
 128 "               STRCC   R2, [R1],#4 \n"
 129 "               BCC     loc_FF81013C \n"
 130 "               LDR     R1, =0x166210 \n"
 131 "               MOV     R2, #0 \n"
 132 "loc_FF810154: \n"
 133 "               CMP     R3, R1 \n"
 134 "               STRCC   R2, [R3],#4 \n"
 135 "               BCC     loc_FF810154 \n"
 136 //"             B       loc_FF810354 \n"
 137 "               B       loc_FF810354_my \n"             // patched --------------->             
 138                 
 139     );
 140 };
 141 
 142 void __attribute__((naked,noinline)) loc_FF810354_my() {
 143 
 144     //*(int*)0x1934 = (int)taskCreateHook;
 145     *(int*)0x1938 = (int)taskCreateHook;
 146     *(int*)0x193C = (int)taskCreateHook;
 147     
 148         
 149         // SX130 @FF85F4F8
 150 
 151         // fix for correct power-on
 152         // must also comment out function in taskcreate_Startup_my
 153         //SX130
 154         if ((*(int*) 0xC0220118) & 1)                   // look at play switch
 155                 *(int*)(0x2478) = 0x100000;             // start in play mode
 156         else
 157                 *(int*)(0x2478) = 0x200000;             // start in rec mode    
 158         
 159         
 160         asm volatile (
 161         
 162 "               LDR     R0, =0xFF8103CC \n"
 163 "               MOV     R1, #0 \n"
 164 "               LDR     R3, =0xFF810404 \n"
 165 "loc_FF810360: \n"
 166 "               CMP     R0, R3 \n"
 167 "               LDRCC   R2, [R0],#4 \n"
 168 "               STRCC   R2, [R1],#4 \n"
 169 "               BCC     loc_FF810360 \n"
 170 "               LDR     R0, =0xFF810404 \n"
 171 "               MOV     R1, #0x4B0 \n"
 172 "               LDR     R3, =0xFF810618 \n"
 173 "loc_FF81037C: \n"
 174 "               CMP     R0, R3 \n"
 175 "               LDRCC   R2, [R0],#4 \n"
 176 "               STRCC   R2, [R1],#4 \n"
 177 "               BCC     loc_FF81037C \n"
 178 "               MOV     R0, #0xD2 \n"
 179 "               MSR     CPSR_cxsf, R0 \n"
 180 "               MOV     SP, #0x1000 \n"
 181 "               MOV     R0, #0xD3 \n"
 182 "               MSR     CPSR_cxsf, R0 \n"
 183 "               MOV     SP, #0x1000 \n"
 184 "               LDR     R0, =0x6C4 \n"
 185 "               LDR     R2, =0xEEEEEEEE \n"
 186 "               MOV     R3, #0x1000 \n"
 187 "loc_FF8103B0: \n"
 188 "               CMP     R0, R3 \n"
 189 "               STRCC   R2, [R0],#4 \n"
 190 "               BCC     loc_FF8103B0 \n"
 191 //"             BL      sub_FF811198 \n"
 192 "               BL      sub_FF811198_my \n"             // patched  ------------->
 193         
 194 
 195   );
 196 }
 197 
 198 void __attribute__((naked,noinline)) sub_FF811198_my() {
 199 
 200         asm volatile (
 201         
 202 "               STR     LR, [SP,#-4]! \n"
 203 "               SUB     SP, SP, #0x74 \n"
 204 "               MOV     R0, SP \n"
 205 "               MOV     R1, #0x74 \n"
 206 "               BL      sub_FFB4A170 \n"
 207 "               MOV     R0, #0x53000 \n"
 208 "               STR     R0, [SP,#0x4] \n"
 209 
 210 // Use original heap address - CHDK loaded at 0xF000000
 211 // Loading CHDK at 0x166210 leaves too little memory and camera crashes
 212 "               LDR     R0, =0x166210 \n"
 213 //"             LDR     R0, =new_sa \n"                 // added -------------->
 214 //"             LDR     R0, [R0] \n"                    // added -------------->
 215 
 216 "               LDR     R1, =0x2F9C00 \n"
 217 "               STR     R0, [SP,#0x8] \n"
 218 "               RSB     R0, R0, #0x1F80 \n"
 219 "               ADD     R0, R0, #0x2F0000 \n"
 220 "               STR     R0, [SP,#0xC] \n"
 221 "               LDR     R0, =0x2F1F80 \n"
 222 "               STR     R1, [SP,#0x0] \n"
 223 "               STRD    R0, [SP,#0x10] \n"
 224 "               MOV     R0, #0x22 \n"
 225 "               STR     R0, [SP,#0x18] \n"
 226 "               MOV     R0, #0x68 \n"
 227 "               STR     R0, [SP,#0x1C] \n"
 228 "               LDR     R0, =0x19B \n"
 229 //"             LDR     R1, =sub_FF815EE0 \n"
 230 "               LDR     R1, =sub_FF815EE0_my \n"        // patched -------------->
 231 
 232 "               B       sub_FF8111F0 \n "               // Return to firmware ----------->
 233 
 234         );
 235 }
 236 
 237 void __attribute__((naked,noinline)) sub_FF815EE0_my() {
 238         asm volatile (
 239         
 240 "               STMFD   SP!, {R4,LR} \n"
 241 "               BL      sub_FF810B20 \n"
 242 "               BL      sub_FF81A33C \n"
 243 "               CMP     R0, #0 \n"
 244 //"             ADRLT   R0, aDmsetup \n"        // "dmSetup"
 245 "               LDRLT   R0, =0xFF815FF4 \n"
 246 "               BLLT    sub_FF815FD4 \n" // err_init_task
 247 "               BL      sub_FF815B1C \n"
 248 "               CMP     R0, #0 \n"
 249 //"             ADRLT   R0, aTermdriverinit \n" // "termDriverInit"
 250 "               LDRLT   R0, =0xFF815FFC \n"
 251 "               BLLT    sub_FF815FD4 \n" // err_init_task
 252 //"             ADR     R0, a_term \n"  // "/_term"
 253 "               LDR     R0, =0xFF81600C \n"
 254 "               BL      sub_FF815C04 \n"
 255 "               CMP     R0, #0 \n"
 256 //"             ADRLT   R0, aTermdevicecrea \n" // "termDeviceCreate"
 257 "               LDRLT   R0, =0xFF816014 \n"
 258 "               BLLT    sub_FF815FD4 \n" // err_init_task
 259 //"             ADR     R0, a_term \n"  // "/_term"
 260 "               LDR     R0, =0xFF81600C \n"
 261 "               BL      sub_FF813CA4 \n"
 262 "               CMP     R0, #0 \n"
 263 //"             ADRLT   R0, aStdiosetup \n"     // "stdioSetup"
 264 "               LDRLT   R0, =0xFF816028 \n" 
 265 "               BLLT    sub_FF815FD4 \n" // err_init_task
 266 "               BL      sub_FF819CC4 \n"
 267 "               CMP     R0, #0 \n"
 268 //"             ADRLT   R0, aStdlibsetup \n" // "stdlibSetup"
 269 "               LDRLT   R0, =0xFF816034 \n"
 270 "               BLLT    sub_FF815FD4 \n" // err_init_task
 271 "               BL      sub_FF81167C \n"
 272 "               CMP     R0, #0 \n"
 273 //"             ADRLT   R0, aArmlib_setup \n" // "armlib_setup"
 274 "               LDRLT   R0, =0xFF816040 \n"
 275 "               BLLT    sub_FF815FD4 \n" // err_init_task
 276 "               LDMFD   SP!, {R4,LR} \n"
 277 "               B       taskcreate_Startup_my \n"
 278         
 279         );
 280 }
 281 
 282 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 283 
 284     asm volatile (
 285         
 286 "               STMFD   SP!, {R3,LR} \n"
 287 //"             BL      j_nullsub_197 \n"
 288 "               BL      sub_FF83BF3C \n"
 289 "               CMP     R0, #0 \n"
 290 "               BNE     loc_FF81FB98 \n"
 291 "               BL      sub_FF835D84 \n"
 292 "               CMP     R0, #0 \n"
 293 "               BEQ     loc_FF81FB98 \n"
 294 "               BL      sub_FF834394 \n"
 295 "               CMP     R0, #0 \n"
 296 "               BNE     loc_FF81FB98 \n"
 297 "               BL      sub_FF833A50 \n"
 298 "               LDR     R1, =0xC0220000 \n"
 299 "               MOV     R0, #0x44 \n"
 300 "               STR     R0, [R1,#0x80] \n"
 301 "               BL      sub_FF833C44 \n"
 302 "loc_FF81FB94: \n"
 303 "               B       loc_FF81FB94 \n"
 304 "loc_FF81FB98: \n"
 305 //"             BL      sub_FF8343A0 \n" // remove for correct power on (hold pwr button for rec)
 306 //"             BL      j_nullsub_198 \n"
 307 "               BL      sub_FF83A158 \n"
 308 "               LDR     R1, =0x34E000 \n"
 309 "               MOV     R0, #0 \n"
 310 "               BL      sub_FF83A5A0 \n"
 311 "               BL      sub_FF83A34C \n"
 312 "               MOV     R3, #0 \n"
 313 "               STR     R3, [SP] \n"
 314 //"             ADR     R3, task_Startup \n"
 315 "               LDR     R3, =task_Startup_my \n"        // Patched ----------->
 316 
 317 "               B       sub_FF81FBC0 \n"                // Return to firmware ----------->
 318         );
 319 }
 320 
 321 void __attribute__((naked,noinline)) task_Startup_my() {
 322 
 323         asm volatile (
 324 "               STMFD   SP!, {R4,LR} \n"
 325 "               BL      sub_FF816594 \n"
 326 "               BL      sub_FF8354FC \n"
 327 "               BL      sub_FF833714 \n"
 328 //"             BL      j_nullsub_201 \n"
 329 "               BL      sub_FF83C16C \n"
 330 //"             BL      sub_FF83C014 \n"                // Skip starting diskboot.bin again
 331 "               BL      sub_FF83C308 \n"
 332 "               BL      sub_FF832474 \n"
 333 "               BL      sub_FF83C19C \n"
 334 "               BL      sub_FF8398FC \n"
 335 "               BL      sub_FF83C30C \n"
 336 
 337 //"             BL      taskcreate_PhySw \n"
 338 "               BL      CreateTask_PhySw \n"                    // our keyboard task
 339 "               BL      CreateTask_spytask \n"                  // chdk initialization
 340 
 341 "               B       sub_FF81FB24 \n"                // Return to firmware ----------->
 342         );
 343 
 344 }
 345 
 346 
 347 /*----------------------------------------------------------------------
 348         spytask
 349 -----------------------------------------------------------------------*/
 350 void spytask(long ua, long ub, long uc, long ud, long ue, long uf)
 351 {
 352     core_spytask();
 353 }
 354 
 355 
 356 /*----------------------------------------------------------------------
 357         CreateTask_spytask
 358 -----------------------------------------------------------------------*/
 359 void CreateTask_spytask() {
 360         _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0);
 361 }
 362 
 363 void __attribute__((naked,noinline)) CreateTask_PhySw() {
 364 
 365     asm volatile (
 366 
 367 "               STMFD   SP!, {R3-R5,LR} \n"
 368 "               LDR     R4, =0x1C30 \n"
 369 "               LDR     R0, [R4,#0x10] \n"
 370 "               CMP     R0, #0 \n"
 371 "               BNE     sub_FF8342B0 \n"
 372 "               MOV     R3, #0 \n"
 373 "               STR     R3, [SP] \n"
 374 //"             ADR     R3, task_PhySw \n"
 375 //"             MOV     R2, #0x800 \n"
 376 
 377 "               LDR     R3, =mykbd_task \n"             // PhySw Task patch
 378 "               MOV     R2, #0x2000 \n"                 // larger stack
 379 
 380 "               B       sub_FF8342A0 \n"                // Return to firmware ----------->
 381         );
 382         
 383 }
 384 
 385 
 386 /*----------------------------------------------------------------------
 387         init_file_modules_task()
 388 -----------------------------------------------------------------------*/
 389 void __attribute__((naked,noinline)) init_file_modules_task() {
 390         asm volatile (
 391 "               STMFD   SP!, {R4-R6,LR} \n"
 392 "               BL      sub_FF88E06C \n"
 393 "               LDR     R5, =0x5006 \n"
 394 "               MOVS    R4, R0 \n"
 395 "               MOVNE   R1, #0 \n"
 396 "               MOVNE   R0, R5 \n"
 397 "               BLNE    sub_FF891DDC \n"                // eventproc_export_PostLogicalEventToUI
 398 //"             BL      sub_FF88E098 \n"
 399 "               BL      sub_FF88E098_my \n"             // patched ------------->
 400 "               BL      core_spytask_can_start \n"      // added ------------->
 401 
 402 "               B       sub_FF897958 \n"                // Return to firmware ----------->
 403         );
 404 }
 405 
 406 void __attribute__((naked,noinline)) sub_FF88E098_my() {
 407         asm volatile (
 408         
 409         
 410 "               STMFD   SP!, {R4,LR} \n"
 411 "               MOV     R0, #3 \n"
 412 //"             BL      sub_FF8705CC \n"                                
 413 "               BL      sub_FF8705CC_my \n"             // patched ------------->
 414 //"             BL      nullsub_72 \n"
 415 
 416 "               B       sub_FF88E0A8 \n"                // Return to firmware ----------->
 417         );
 418 }
 419 
 420 void __attribute__((naked,noinline)) sub_FF8705CC_my() {
 421         asm volatile (
 422         
 423 "               STMFD   SP!, {R4-R8,LR} \n"
 424 "               MOV     R8, R0 \n"
 425 "               BL      sub_FF87054C \n"
 426 "               LDR     R1, =0x37988 \n"
 427 "               MOV     R6, R0 \n"
 428 "               ADD     R4, R1, R0,LSL#7 \n"
 429 "               LDR     R0, [R4,#0x6C] \n"
 430 "               CMP     R0, #4 \n"
 431 "               LDREQ   R1, =0x83F \n"
 432 "               LDREQ   R0, =0xFF87008C \n"     // "Mounter.c"
 433 "               BLEQ    _DebugAssert \n"
 434 "               MOV     R1, R8 \n"
 435 "               MOV     R0, R6 \n"
 436 "               BL      sub_FF86FE00 \n"
 437 "               LDR     R0, [R4,#0x38] \n"
 438 "               BL      sub_FF870C2C \n"
 439 "               CMP     R0, #0 \n"
 440 "               STREQ   R0, [R4,#0x6C] \n"
 441 "               MOV     R0, R6 \n"
 442 "               BL      sub_FF86FE90 \n"
 443 "               MOV     R0, R6 \n"
 444 //"             BL      sub_FF8701F4 \n"
 445 "               BL      sub_FF8701F4_my \n"             // patched ------------->
 446 
 447 "               B       sub_FF870624 \n"                // Return to firmware ----------->
 448         );
 449 }
 450 
 451 void __attribute__((naked,noinline)) sub_FF8701F4_my() {
 452         asm volatile (
 453         
 454 "               STMFD   SP!, {R4-R6,LR} \n"
 455 "               MOV     R5, R0 \n"
 456 "               LDR     R0, =0x37988 \n"
 457 "               ADD     R4, R0, R5,LSL#7 \n"
 458 "               LDR     R0, [R4,#0x6C] \n"
 459 "               TST     R0, #2 \n"
 460 "               MOVNE   R0, #1 \n"
 461 "               LDMNEFD SP!, {R4-R6,PC} \n"
 462 "               LDR     R0, [R4,#0x38] \n"
 463 "               MOV     R1, R5 \n"
 464 //"             BL      sub_FF86FF14 \n"
 465 "               BL      sub_FF86FF14_my \n"             // patched ------------->
 466 
 467 "               B       sub_FF870220 \n"                // Return to firmware ----------->
 468         );
 469 }
 470 
 471 void __attribute__((naked,noinline)) sub_FF86FF14_my() {
 472         asm volatile (
 473 "               STMFD   SP!, {R4-R10,LR} \n"
 474 "               MOV     R9, R0 \n"
 475 "               LDR     R0, =0x37988 \n"
 476 "               MOV     R8, #0 \n"
 477 "               ADD     R5, R0, R1,LSL#7 \n"
 478 "               LDR     R0, [R5,#0x3C] \n"
 479 "               MOV     R7, #0 \n"
 480 "               CMP     R0, #7 \n"
 481 "               MOV     R6, #0 \n"
 482 "               ADDLS   PC, PC, R0,LSL#2 \n"
 483 "               B       sub_FF87006C \n"
 484 "loc_FF86FF40: \n"
 485 "               B       loc_FF86FF78 \n"
 486 "loc_FF86FF44: \n"
 487 "               B       loc_FF86FF60 \n"
 488 "loc_FF86FF48: \n"
 489 "               B       loc_FF86FF60 \n"
 490 "loc_FF86FF4C: \n"
 491 "               B       loc_FF86FF60 \n"
 492 "loc_FF86FF50: \n"
 493 "               B       loc_FF86FF60 \n"
 494 "loc_FF86FF54: \n"
 495 "               B       sub_FF870064 \n"
 496 "loc_FF86FF58: \n"
 497 "               B       loc_FF86FF60 \n"
 498 "loc_FF86FF5C: \n"
 499 "               B       loc_FF86FF60 \n"
 500 "loc_FF86FF60: \n"
 501 // jumptable FF86FF38 entries 1-4,6,7
 502 "               MOV     R2, #0 \n"
 503 "               MOV     R1, #0x200 \n"
 504 "               MOV     R0, #2 \n"
 505 "               BL      sub_FF888184 \n"
 506 "               MOVS    R4, R0 \n"
 507 "               BNE     loc_FF86FF80 \n"
 508 "loc_FF86FF78: \n"
 509 // jumptable FF86FF38 entry 0
 510 "               MOV     R0, #0 \n"
 511 "               LDMFD   SP!, {R4-R10,PC} \n"
 512 "loc_FF86FF80: \n"
 513 "               LDR     R12, [R5,#0x50] \n"
 514 "               MOV     R3, R4 \n"
 515 "               MOV     R2, #1 \n"
 516 "               MOV     R1, #0 \n"
 517 "               MOV     R0, R9 \n"
 518 "               BLX     R12 \n"
 519 "               CMP     R0, #1 \n"
 520 "               BNE     loc_FF86FFAC \n"
 521 "               MOV     R0, #2 \n"
 522 "               BL      sub_FF8882D4 \n"
 523 "               B       loc_FF86FF78 \n"
 524 "loc_FF86FFAC: \n"
 525 "               LDR     R1, [R5,#0x64] \n"
 526 "               MOV     R0, R9 \n"
 527 "               BLX     R1 \n"
 528 
 529 //------------------  begin added code ---------------
 530                 "MOV    R1, R4\n"           //  pointer to MBR in R1
 531                 "BL     mbr_read_dryos\n"   //  total sectors count in R0 before and after call
 532 
 533                 // Start of DataGhost's FAT32 autodetection code
 534                 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 535                 // According to the code below, we can use R1, R2, R3 and R12.
 536                 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 537                 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 538                 "MOV    R12, R4\n"                    // Copy the MBR start address so we have something to work with
 539                 "MOV    LR, R4\n"                     // Save old offset for MBR signature
 540                 "MOV    R1, #1\n"                     // Note the current partition number
 541                 "B      dg_sd_fat32_enter\n"          // We actually need to check the first partition as well, no increments yet!
 542    "dg_sd_fat32:\n"
 543                 "CMP    R1, #4\n"                     // Did we already see the 4th partition?
 544                 "BEQ    dg_sd_fat32_end\n"            // Yes, break. We didn't find anything, so don't change anything.
 545                 "ADD    R12, R12, #0x10\n"            // Second partition
 546                 "ADD    R1, R1, #1\n"                 // Second partition for the loop
 547    "dg_sd_fat32_enter:\n"
 548                 "LDRB   R2, [R12, #0x1BE]\n"          // Partition status
 549                 "LDRB   R3, [R12, #0x1C2]\n"          // Partition type (FAT32 = 0xB)
 550                 "CMP    R3, #0xB\n"                   // Is this a FAT32 partition?
 551                 "CMPNE  R3, #0xC\n"                   // Not 0xB, is it 0xC (FAT32 LBA) then?
 552                 "BNE    dg_sd_fat32\n"                // No, it isn't.
 553                 "CMP    R2, #0x00\n"                  // It is, check the validity of the partition type
 554                 "CMPNE  R2, #0x80\n"
 555                 "BNE    dg_sd_fat32\n"                // Invalid, go to next partition
 556                                                                                            // This partition is valid, it's the first one, bingo!
 557                 "MOV    R4, R12\n"                    // Move the new MBR offset for the partition detection.
 558 
 559    "dg_sd_fat32_end:\n"
 560                 // End of DataGhost's FAT32 autodetection code
 561 //------------------  end added code ---------------
 562 
 563 "               LDRB    R1, [R4,#0x1C9] \n"
 564 "               LDRB    R3, [R4,#0x1C8] \n"
 565 "               LDRB    R12, [R4,#0x1CC] \n"
 566 "               MOV     R1, R1,LSL#24 \n"
 567 "               ORR     R1, R1, R3,LSL#16 \n"
 568 "               LDRB    R3, [R4,#0x1C7] \n"
 569 "               LDRB    R2, [R4,#0x1BE] \n"
 570 //"             LDRB    LR, [R4,#0x1FF] \n"             // Replaced below
 571 "               ORR     R1, R1, R3,LSL#8 \n"
 572 "               LDRB    R3, [R4,#0x1C6] \n"
 573 "               CMP     R2, #0 \n"
 574 "               CMPNE   R2, #0x80 \n"
 575 "               ORR     R1, R1, R3 \n"
 576 "               LDRB    R3, [R4,#0x1CD] \n"
 577 "               MOV     R3, R3,LSL#24 \n"
 578 "               ORR     R3, R3, R12,LSL#16 \n"
 579 "               LDRB    R12, [R4,#0x1CB] \n"
 580 "               ORR     R3, R3, R12,LSL#8 \n"
 581 "               LDRB    R12, [R4,#0x1CA] \n"
 582 "               ORR     R3, R3, R12 \n"
 583 //"             LDRB    R12, [R4,#0x1FE] \n"            // Replaced below
 584 
 585 "               LDRB    R12, [LR,#0x1FE]\n"            // New! First MBR signature byte (0x55)
 586 "               LDRB    LR, [LR,#0x1FF]\n"             //      Last MBR signature byte (0xAA)
 587 
 588 "               B       sub_FF87000C \n"                // Return to firmware ----------->
 589 
 590         );
 591 }
 592 
 593 /*----------------------------------------------------------------------
 594         JogDial_task_my()
 595 -----------------------------------------------------------------------*/
 596 void __attribute__((naked,noinline)) JogDial_task_my()
 597 {
 598         asm volatile (
 599 "               STMFD   SP!, {R4-R11,LR} \n"
 600 "               SUB     SP, SP, #0x1C \n"
 601 "               BL      sub_FF860118 \n"
 602 "               LDR     R1, =0x2480 \n"
 603 "               LDR     R6, =0xFFB4F590 \n"
 604 "               MOV     R0, #0 \n"
 605 "               ADD     R3, SP, #0x10 \n"
 606 "               ADD     R12, SP, #0x14 \n"
 607 "               ADD     R10, SP, #0x8 \n"
 608 "               MOV     R2, #0 \n"
 609 "               ADD     R9, SP, #0xC \n"
 610 "loc_FF85FDAC: \n"
 611 "               ADD     R12, SP, #0x14 \n"
 612 "               ADD     LR, R12, R0,LSL#1 \n"
 613 "               MOV     R2, #0 \n"
 614 "               ADD     R3, SP, #0x10 \n"
 615 "               STRH    R2, [LR] \n"
 616 "               ADD     LR, R3, R0,LSL#1 \n"
 617 "               STRH    R2, [LR] \n"
 618 "               STR     R2, [R9,R0,LSL#2] \n"
 619 "               STR     R2, [R10,R0,LSL#2] \n"
 620 "               ADD     R0, R0, #1 \n"
 621 "               CMP     R0, #1 \n"
 622 "               BLT     loc_FF85FDAC \n"
 623 "loc_FF85FDDC: \n"
 624 "               LDR     R0, =0x2480 \n"
 625 "               MOV     R2, #0 \n"
 626 "               LDR     R0, [R0,#8] \n"
 627 "               MOV     R1, SP \n"
 628 "               BL      sub_FF839B8C \n"
 629 "               CMP     R0, #0 \n"
 630 "               LDRNE   R1, =0x262 \n"
 631 //"             ADRNE   R0, aRotaryencoder_ \n" // "RotaryEncoder.c"
 632 "               LDRNE   R0, =0xFF86003C \n"
 633 "               BLNE    _DebugAssert \n"
 634 "               LDR     R0, [SP] \n"
 635 "               AND     R4, R0, #0xFF \n"
 636 "               AND     R0, R0, #0xFF00 \n"
 637 "               CMP     R0, #0x100 \n"
 638 "               BEQ     loc_FF85FE4C \n"
 639 "               CMP     R0, #0x200 \n"
 640 "               BEQ     loc_FF85FE84 \n"
 641 "               CMP     R0, #0x300 \n"
 642 "               BEQ     loc_FF86007C \n"
 643 "               CMP     R0, #0x400 \n"
 644 "               BNE     loc_FF85FDDC \n"
 645 "               CMP     R4, #0 \n"
 646 "               LDRNE   R1, =0x2ED \n"
 647 //"             ADRNE   R0, aRotaryencoder_ \n"// "RotaryEncoder.c"
 648 "               LDRNE   R0, =0xFF86003C \n"
 649 "               BLNE    _DebugAssert \n"
 650 "               RSB     R0, R4, R4,LSL#3 \n"
 651 "               LDR     R0, [R6,R0,LSL#2] \n"
 652 "loc_FF85FE44: \n"
 653 "               BL      sub_FF8600FC \n"
 654 "               B       loc_FF85FDDC \n"
 655 "loc_FF85FE4C: \n"
 656 //------------------  begin added code ---------------
 657 "labelA: \n"
 658                 "LDR    R0, =jogdial_stopped\n"
 659                 "LDR    R0, [R0]\n"
 660                 "CMP    R0, #1\n"
 661                 "BNE    labelB\n"                       // continue on if jogdial_stopped = 0
 662                 "MOV    R0, #40\n"
 663                 "BL     _SleepTask\n"                   // jogdial_stopped=1 -- give time back to OS and suspend jogdial task
 664                 "B      labelA\n"
 665 "labelB: \n" 
 666 //------------------  end added code -----------------
 667 
 668 "               LDR     R7, =0x248C \n"
 669 "               LDR     R0, [R7,R4,LSL#2] \n"
 670 "               BL      sub_FF83AB24 \n"
 671 //"             ADR     R2, unk_FF85FCCC \n"
 672 "               LDR     R2, =0xFF85FCCC \n"
 673 "               MOV     R1, R2 \n"
 674 "               ORR     R3, R4, #0x200 \n"
 675 "               MOV     R0, #0x28 \n"
 676 "               BL      sub_FF83AA40 \n"
 677 "               TST     R0, #1 \n"
 678 "               CMPNE   R0, #0x15 \n"
 679 "               STR     R0, [R10,R4,LSL#2] \n"
 680 "               BEQ     loc_FF85FDDC \n"
 681 "               MOV     R1, #0x274 \n"
 682 "               B       loc_FF860028 \n"
 683 "loc_FF85FE84: \n"
 684 "               RSB     R5, R4, R4,LSL#3 \n"
 685 "               LDR     R0, [R6,R5,LSL#2] \n"
 686 "               LDR     R1, =0xC0240104 \n"
 687 "               LDR     R0, [R1,R0,LSL#8] \n"
 688 "               MOV     R2, R0,ASR#16 \n"
 689 "               ADD     R0, SP, #0x14 \n"
 690 "               ADD     R0, R0, R4,LSL#1 \n"
 691 "               STR     R0, [SP,#0x18] \n"
 692 "               STRH    R2, [R0] \n"
 693 "               ADD     R0, SP, #0x10 \n"
 694 "               ADD     R11, R0, R4,LSL#1 \n"
 695 "               LDRSH   R3, [R11] \n"
 696 "               SUB     R0, R2, R3 \n"
 697 "               CMP     R0, #0 \n"
 698 "               BNE     loc_FF85FF04 \n"
 699 "               LDR     R0, [R9,R4,LSL#2] \n"
 700 "               CMP     R0, #0 \n"
 701 "               BEQ     loc_FF85FFE4 \n"
 702 "               LDR     R7, =0x248C \n"
 703 "               LDR     R0, [R7,R4,LSL#2] \n"
 704 "               BL      sub_FF83AB24 \n"
 705 //"             ADR     R2, sub_FF85FCD8 \n"
 706 "               LDR     R2, =0xFF85FCD8 \n"
 707 "               MOV     R1, R2 \n"
 708 "               ORR     R3, R4, #0x300 \n"
 709 "               MOV     R0, #0x1F4 \n"
 710 "               BL      sub_FF83AA40 \n"
 711 "               TST     R0, #1 \n"
 712 "               CMPNE   R0, #0x15 \n"
 713 "               STR     R0, [R7,R4,LSL#2] \n"
 714 "               BEQ     loc_FF85FFE4 \n"
 715 "               LDR     R1, =0x28D \n"
 716 "               B       loc_FF85FFDC \n"
 717 "loc_FF85FF04: \n"
 718 "               MOV     R1, R0 \n"
 719 "               RSBLT   R0, R0, #0 \n"
 720 "               MOVLE   R7, #0 \n"
 721 "               MOVGT   R7, #1 \n"
 722 "               CMP     R0, #0xFF \n"
 723 "               BLS     loc_FF85FF44 \n"
 724 "               CMP     R1, #0 \n"
 725 "               RSBLE   R0, R3, #0xFF \n"
 726 "               ADDLE   R0, R0, #0x7F00 \n"
 727 "               ADDLE   R0, R0, R2 \n"
 728 "               RSBGT   R0, R2, #0xFF \n"
 729 "               ADDGT   R0, R0, #0x7F00 \n"
 730 "               ADDGT   R0, R0, R3 \n"
 731 "               ADD     R0, R0, #0x8000 \n"
 732 "               ADD     R0, R0, #1 \n"
 733 "               EOR     R7, R7, #1 \n"
 734 "loc_FF85FF44: \n"
 735 "               STR     R0, [SP,#0x4] \n"
 736 "               LDR     R0, [R9,R4,LSL#2] \n"
 737 "               CMP     R0, #0 \n"
 738 "               ADDEQ   R0, R6, R5,LSL#2 \n"
 739 "               LDREQ   R0, [R0,#8] \n"
 740 "               BEQ     loc_FF85FF7C \n"
 741 "               ADD     R8, R6, R5,LSL#2 \n"
 742 "               ADD     R1, R8, R7,LSL#2 \n"
 743 "               LDR     R1, [R1,#0x10] \n"
 744 "               CMP     R1, R0 \n"
 745 "               BEQ     loc_FF85FF80 \n"
 746 "               LDR     R0, [R8,#0xC] \n"
 747 "               BL      sub_FF893C28 \n"
 748 "               LDR     R0, [R8,#8] \n"
 749 "loc_FF85FF7C: \n"
 750 "               BL      sub_FF893C28 \n"
 751 "loc_FF85FF80: \n"
 752 "               ADD     R0, R6, R5,LSL#2 \n"
 753 "               ADD     R7, R0, R7,LSL#2 \n"
 754 "               LDR     R0, [R7,#0x10] \n"
 755 "               LDR     R1, [SP,#0x4] \n"
 756 "               BL      sub_FF893B50 \n"
 757 "               LDR     R0, [R7,#0x10] \n"
 758 "               LDR     R7, =0x248C \n"
 759 "               STR     R0, [R9,R4,LSL#2] \n"
 760 "               LDR     R0, [SP,#0x18] \n"
 761 "               LDRH    R0, [R0] \n"
 762 "               STRH    R0, [R11] \n"
 763 "               LDR     R0, [R7,R4,LSL#2] \n"
 764 "               BL      sub_FF83AB24 \n"
 765 //"             ADR     R2, sub_FF85FCD8 \n"
 766 "               LDR     R2, =0xFF85FCD8 \n"
 767 "               MOV     R1, R2 \n"
 768 "               ORR     R3, R4, #0x300 \n"
 769 "               MOV     R0, #0x1F4 \n"
 770 "               BL      sub_FF83AA40 \n"
 771 "               TST     R0, #1 \n"
 772 "               CMPNE   R0, #0x15 \n"
 773 "               STR     R0, [R7,R4,LSL#2] \n"
 774 "               BEQ     loc_FF85FFE4 \n"
 775 "               LDR     R1, =0x2CF \n"
 776 "loc_FF85FFDC: \n"
 777 //"             ADR     R0, aRotaryencoder_ \n" // "RotaryEncoder.c"
 778 "               LDR     R0, =0xFF86003C \n"
 779 "               BL      _DebugAssert \n"
 780 "loc_FF85FFE4: \n"
 781 "               ADD     R0, R6, R5,LSL#2 \n"
 782 "               LDR     R0, [R0,#0x18] \n"
 783 "               CMP     R0, #1 \n"
 784 "               BNE     loc_FF860074 \n"
 785 "               LDR     R0, =0x2480 \n"
 786 "               LDR     R0, [R0,#0x10] \n"
 787 "               CMP     R0, #0 \n"
 788 "loc_FF860000: \n"
 789 "               BEQ     loc_FF860074 \n"
 790 //"             ADR     R2, unk_FF85FCCC \n"
 791 "               LDR     R2, =0xFF85FCCC \n"
 792 "               MOV     R1, R2 \n"
 793 "               ORR     R3, R4, #0x400 \n"
 794 "               BL      sub_FF83AA40 \n"
 795 "               TST     R0, #1 \n"
 796 "               CMPNE   R0, #0x15 \n"
 797 "               STR     R0, [R10,R4,LSL#2] \n"
 798 "               BEQ     loc_FF85FDDC \n"
 799 "               LDR     R1, =0x2D6 \n"
 800 "loc_FF860028: \n"
 801 //"             ADR     R0, aRotaryencoder_ \n" // "RotaryEncoder.c"
 802 "               LDR     R0, =0xFF86003C \n"
 803 "               BL      _DebugAssert \n"
 804 "               B       loc_FF85FDDC \n"
 805 "loc_FF860074: \n"
 806 "               LDR     R0, [R6,R5,LSL#2] \n"
 807 "               B       loc_FF85FE44 \n"
 808 "loc_FF86007C: \n"
 809 "               LDR     R0, [R9,R4,LSL#2] \n"
 810 "               CMP     R0, #0 \n"
 811 "               MOVEQ   R1, #0x2E0 \n"
 812 //"             ADREQ   R0, aRotaryencoder_ \n" // "RotaryEncoder.c"
 813 "               LDREQ   R0, =0xFF86003C \n"
 814 "               BLEQ    _DebugAssert \n"
 815 "               RSB     R0, R4, R4,LSL#3 \n"
 816 "               ADD     R0, R6, R0,LSL#2 \n"
 817 "               LDR     R0, [R0,#0xC] \n"
 818 "               BL      sub_FF893C28 \n"
 819 "               MOV     R2, #0 \n"
 820 "               STR     R2, [R9,R4,LSL#2] \n"
 821 "               B       loc_FF85FDDC \n"
 822         );
 823 }

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