This source file includes following definitions.
- capt_seq_task
- sub_FFD0A3CC_my
- exp_drv_task
- sub_FFC8EF34_my
- sub_FFC7330C_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R3-R7,LR} \n"
17 " LDR R6, =0x5680 \n"
18
19 "loc_FFC4CB6C:\n"
20 " LDR R0, [R6, #8] \n"
21 " MOV R2, #0 \n"
22 " MOV R1, SP \n"
23 " BL sub_FFC19070 /*_ReceiveMessageQueue*/ \n"
24 " TST R0, #1 \n"
25 " BEQ loc_FFC4CB98 \n"
26 " LDR R1, =0x43F \n"
27 " LDR R0, =0xFFC4C924 /*'SsShootTask.c'*/ \n"
28 " BL _DebugAssert \n"
29 " BL _ExitTask \n"
30 " LDMFD SP!, {R3-R7,PC} \n"
31
32 "loc_FFC4CB98:\n"
33 " LDR R0, [SP] \n"
34 " LDR R1, [R0] \n"
35 " CMP R1, #0x16 \n"
36 " ADDLS PC, PC, R1, LSL#2 \n"
37 " B loc_FFC4CD80 \n"
38 " B loc_FFC4CC08 \n"
39 " B loc_FFC4CC10 \n"
40 " B loc_FFC4CC88 \n"
41 " B loc_FFC4CC9C \n"
42 " B loc_FFC4CC94 \n"
43 " B loc_FFC4CCA4 \n"
44 " B loc_FFC4CCAC \n"
45 " B loc_FFC4CCB8 \n"
46 " B loc_FFC4CD10 \n"
47 " B loc_FFC4CC9C \n"
48 " B loc_FFC4CD18 \n"
49 " B loc_FFC4CD20 \n"
50 " B loc_FFC4CD28 \n"
51 " B loc_FFC4CD30 \n"
52 " B loc_FFC4CD38 \n"
53 " B loc_FFC4CD40 \n"
54 " B loc_FFC4CD48 \n"
55 " B loc_FFC4CD50 \n"
56 " B loc_FFC4CD58 \n"
57 " B loc_FFC4CD64 \n"
58 " B loc_FFC4CD70 \n"
59 " B loc_FFC4CD78 \n"
60 " B loc_FFC4CD8C \n"
61
62 "loc_FFC4CC08:\n"
63 " BL sub_FFD08E6C \n"
64 " BL shooting_expo_param_override\n"
65 " B loc_FFC4CCB0 \n"
66
67 "loc_FFC4CC10:\n"
68 " LDR R4, [R0, #0xC] \n"
69 " LDR R0, [R4, #8] \n"
70 " ORR R0, R0, #1 \n"
71 " STR R0, [R4, #8] \n"
72 " MOV R0, #2 \n"
73 " BL sub_FFC48200 \n"
74 " BL sub_FFD08E5C \n"
75 " MOV R0, R4 \n"
76 " BL sub_FFD092AC \n"
77 " TST R0, #1 \n"
78 " MOVNE R2, R4 \n"
79 " MOVNE R1, #1 \n"
80 " BNE loc_FFC4CD08 \n"
81 " BL sub_FFD1D864 \n"
82 " BL sub_FFC59DBC \n"
83 " STR R0, [R4, #0x14] \n"
84 " MOV R0, R4 \n"
85 " BL sub_FFD0A2E4 \n"
86 " BL sub_FFD0AD48 \n"
87 " MOV R0, R4 \n"
88 " BL sub_FFD0A3CC_my \n"
89 " BL capt_seq_hook_raw_here \n"
90 " MOV R2, R4 \n"
91 " MOV R1, #1 \n"
92 " BL sub_FFC4B2F8 \n"
93 " BL sub_FFD0A798 \n"
94 " CMP R0, #0 \n"
95 " LDRNE R0, [R4, #8] \n"
96 " ORRNE R0, R0, #0x2000 \n"
97 " STRNE R0, [R4, #8] \n"
98 " B loc_FFC4CD8C \n"
99
100 "loc_FFC4CC88:\n"
101 " MOV R0, #1 \n"
102 " BL sub_FFD08FFC \n"
103 " B loc_FFC4CD8C \n"
104
105 "loc_FFC4CC94:\n"
106 " BL sub_FFD08A88 \n"
107 " B loc_FFC4CD8C \n"
108
109 "loc_FFC4CC9C:\n"
110 " BL sub_FFD08E4C \n"
111 " B loc_FFC4CD8C \n"
112
113 "loc_FFC4CCA4:\n"
114 " BL sub_FFD08E54 \n"
115 " B loc_FFC4CD8C \n"
116
117 "loc_FFC4CCAC:\n"
118 " BL sub_FFD08F1C \n"
119
120 "loc_FFC4CCB0:\n"
121 " BL sub_FFC4AF60 \n"
122 " B loc_FFC4CD8C \n"
123
124 "loc_FFC4CCB8:\n"
125 " LDR R4, [R0, #0xC] \n"
126 " BL sub_FFD08E5C \n"
127 " MOV R0, R4 \n"
128 " BL sub_FFD0962C \n"
129 " TST R0, #1 \n"
130 " MOV R5, R0 \n"
131 " BNE loc_FFC4CCF8 \n"
132 " BL sub_FFC59DBC \n"
133 " STR R0, [R4, #0x14] \n"
134 " MOV R0, R4 \n"
135 " BL sub_FFD0A2E4 \n"
136 " MOV R0, R4 \n"
137 " BL sub_FFD0A7F8 \n"
138 " MOV R5, R0 \n"
139 " LDR R0, [R4, #0x14] \n"
140 " BL sub_FFC59FD0 \n"
141
142 "loc_FFC4CCF8:\n"
143 " BL sub_FFD08E4C \n"
144 " MOV R2, R4 \n"
145 " MOV R1, #8 \n"
146 " MOV R0, R5 \n"
147
148 "loc_FFC4CD08:\n"
149 " BL sub_FFC4B2F8 \n"
150 " B loc_FFC4CD8C \n"
151
152 "loc_FFC4CD10:\n"
153 " BL sub_FFD08F78 \n"
154 " B loc_FFC4CCB0 \n"
155
156 "loc_FFC4CD18:\n"
157 " BL sub_FFD09898 \n"
158 " B loc_FFC4CD8C \n"
159
160 "loc_FFC4CD20:\n"
161 " BL sub_FFD09A50 \n"
162 " B loc_FFC4CD8C \n"
163
164 "loc_FFC4CD28:\n"
165 " BL sub_FFD09AE0 \n"
166 " B loc_FFC4CD8C \n"
167
168 "loc_FFC4CD30:\n"
169 " BL sub_FFD09B94 \n"
170 " B loc_FFC4CD8C \n"
171
172 "loc_FFC4CD38:\n"
173 " MOV R0, #0 \n"
174 " B loc_FFC4CD5C \n"
175
176 "loc_FFC4CD40:\n"
177 " BL sub_FFD09EC8 \n"
178 " B loc_FFC4CD8C \n"
179
180 "loc_FFC4CD48:\n"
181 " BL sub_FFD09F5C \n"
182 " B loc_FFC4CD8C \n"
183
184 "loc_FFC4CD50:\n"
185 " BL sub_FFD0A01C \n"
186 " B loc_FFC4CD8C \n"
187
188 "loc_FFC4CD58:\n"
189 " MOV R0, #1 \n"
190
191 "loc_FFC4CD5C:\n"
192 " BL sub_FFD09D88 \n"
193 " B loc_FFC4CD8C \n"
194
195 "loc_FFC4CD64:\n"
196 " BL sub_FFD09128 \n"
197 " BL sub_FFC15B44 \n"
198 " B loc_FFC4CD8C \n"
199
200 "loc_FFC4CD70:\n"
201 " BL sub_FFD09C50 \n"
202 " B loc_FFC4CD8C \n"
203
204 "loc_FFC4CD78:\n"
205 " BL sub_FFD09CBC \n"
206 " B loc_FFC4CD8C \n"
207
208 "loc_FFC4CD80:\n"
209 " LDR R1, =0x523 \n"
210 " LDR R0, =0xFFC4C924 /*'SsShootTask.c'*/ \n"
211 " BL _DebugAssert \n"
212
213 "loc_FFC4CD8C:\n"
214 " LDR R0, [SP] \n"
215 " LDR R1, [R0, #4] \n"
216 " LDR R0, [R6, #4] \n"
217 " BL sub_FFC18DEC /*_SetEventFlag*/ \n"
218 " LDR R4, [SP] \n"
219 " LDR R0, [R4, #8] \n"
220 " CMP R0, #0 \n"
221 " MOVEQ R1, #0xFC \n"
222 " LDREQ R0, =0xFFC4C924 /*'SsShootTask.c'*/ \n"
223 " BLEQ _DebugAssert \n"
224 " MOV R0, #0 \n"
225 " STR R0, [R4, #8] \n"
226 " B loc_FFC4CB6C \n"
227 );
228 }
229
230
231
232 void __attribute__((naked,noinline)) sub_FFD0A3CC_my() {
233 asm volatile (
234 " STMFD SP!, {R0-R10,LR} \n"
235 " MOV R6, #0 \n"
236 " MOV R4, R0 \n"
237 " BL sub_FFD0AEB4 \n"
238 " MVN R1, #0 \n"
239 " BL sub_FFC18E20 /*_ClearEventFlag*/ \n"
240 " MOV R2, #4 \n"
241 " ADD R1, SP, #8 \n"
242 " MOV R0, #0x8A \n"
243 " BL _GetPropertyCase \n"
244 " TST R0, #1 \n"
245 " LDRNE R1, =0x20A \n"
246 " LDRNE R0, =0xFFD0A5A0 /*'SsCaptureSeq.c'*/ \n"
247 " BLNE _DebugAssert \n"
248 " LDR R8, =0x1933C \n"
249 " LDR R5, =0x19290 \n"
250 " LDRSH R1, [R8, #0xE] \n"
251 " LDR R0, [R5, #0x74] \n"
252 " BL sub_FFD9DDBC \n"
253 " BL _GetCCDTemperature \n"
254 " LDR R2, =0x9F94 \n"
255 " ADD R3, R4, #0x8C \n"
256 " STRH R0, [R4, #0x88] \n"
257 " STRD R2, [SP] \n"
258 " MOV R1, R0 \n"
259 " LDRH R0, [R5, #0x4C] \n"
260 " LDRSH R2, [R8, #0xC] \n"
261 " LDR R3, =0x9F90 \n"
262 " BL sub_FFD0B3A0 \n"
263 " BL wait_until_remote_button_is_released\n"
264 " BL capt_seq_hook_set_nr\n"
265 " LDR PC, =0xFFD0A440 \n"
266 );
267 }
268
269
270
271 void __attribute__((naked,noinline)) exp_drv_task() {
272 asm volatile (
273 " STMFD SP!, {R4-R8,LR} \n"
274 " SUB SP, SP, #0x20 \n"
275 " LDR R8, =0xBB8 \n"
276 " LDR R7, =0x6818 \n"
277 " LDR R5, =0x40A68 \n"
278 " MOV R0, #0 \n"
279 " ADD R6, SP, #0x10 \n"
280 " STR R0, [SP, #0xC] \n"
281
282 "loc_FFC91474:\n"
283 " LDR R0, [R7, #0x20] \n"
284 " MOV R2, #0 \n"
285 " ADD R1, SP, #0x1C \n"
286 " BL sub_FFC19070 /*_ReceiveMessageQueue*/ \n"
287 " LDR R0, [SP, #0xC] \n"
288 " CMP R0, #1 \n"
289 " BNE loc_FFC914BC \n"
290 " LDR R0, [SP, #0x1C] \n"
291 " LDR R0, [R0] \n"
292 " CMP R0, #0x13 \n"
293 " CMPNE R0, #0x14 \n"
294 " CMPNE R0, #0x15 \n"
295 " BEQ loc_FFC9163C \n"
296 " CMP R0, #0x26 \n"
297 " BEQ loc_FFC915A8 \n"
298 " ADD R1, SP, #0xC \n"
299 " MOV R0, #0 \n"
300 " BL sub_FFC91404 \n"
301
302 "loc_FFC914BC:\n"
303 " LDR R0, [SP, #0x1C] \n"
304 " LDR R1, [R0] \n"
305 " CMP R1, #0x2B \n"
306 " BNE loc_FFC914EC \n"
307 " LDR R0, [SP, #0x1C] \n"
308 " BL sub_FFC92734 \n"
309 " LDR R0, [R7, #0x1C] \n"
310 " MOV R1, #1 \n"
311 " BL sub_FFC18DEC /*_SetEventFlag*/ \n"
312 " BL _ExitTask \n"
313 " ADD SP, SP, #0x20 \n"
314 " LDMFD SP!, {R4-R8,PC} \n"
315
316 "loc_FFC914EC:\n"
317 " CMP R1, #0x2A \n"
318 " BNE loc_FFC91508 \n"
319 " LDR R2, [R0, #0x88]! \n"
320 " LDR R1, [R0, #4] \n"
321 " MOV R0, R1 \n"
322 " BLX R2 \n"
323 " B loc_FFC91AA0 \n"
324
325 "loc_FFC91508:\n"
326 " CMP R1, #0x24 \n"
327 " BNE loc_FFC91558 \n"
328 " LDR R0, [R7, #0x1C] \n"
329 " MOV R1, #0x80 \n"
330 " BL sub_FFC18E20 /*_ClearEventFlag*/ \n"
331 " LDR R0, =0xFFC8DEF0 \n"
332 " MOV R1, #0x80 \n"
333 " BL sub_FFCFF1BC \n"
334 " LDR R0, [R7, #0x1C] \n"
335 " MOV R2, R8 \n"
336 " MOV R1, #0x80 \n"
337 " BL sub_FFC18D24 /*_WaitForAllEventFlag*/ \n"
338 " TST R0, #1 \n"
339 " LDRNE R1, =0xD07 \n"
340 " BNE loc_FFC91618 \n"
341
342 "loc_FFC91544:\n"
343 " LDR R1, [SP, #0x1C] \n"
344 " LDR R0, [R1, #0x8C] \n"
345 " LDR R1, [R1, #0x88] \n"
346 " BLX R1 \n"
347 " B loc_FFC91AA0 \n"
348
349 "loc_FFC91558:\n"
350 " CMP R1, #0x25 \n"
351 " BNE loc_FFC915A0 \n"
352 " ADD R1, SP, #0xC \n"
353 " BL sub_FFC91404 \n"
354 " LDR R0, [R7, #0x1C] \n"
355 " MOV R1, #0x100 \n"
356 " BL sub_FFC18E20 /*_ClearEventFlag*/ \n"
357 " MOV R1, #0x100 \n"
358 " LDR R0, =0xFFC8DF00 \n"
359 " BL sub_FFCFF97C \n"
360 " LDR R0, [R7, #0x1C] \n"
361 " MOV R2, R8 \n"
362 " MOV R1, #0x100 \n"
363 " BL sub_FFC18D24 /*_WaitForAllEventFlag*/ \n"
364 " TST R0, #1 \n"
365 " BEQ loc_FFC91544 \n"
366 " LDR R1, =0xD11 \n"
367 " B loc_FFC91618 \n"
368
369 "loc_FFC915A0:\n"
370 " CMP R1, #0x26 \n"
371 " BNE loc_FFC915B8 \n"
372
373 "loc_FFC915A8:\n"
374 " LDR R0, [SP, #0x1C] \n"
375 " ADD R1, SP, #0xC \n"
376 " BL sub_FFC91404 \n"
377 " B loc_FFC91544 \n"
378
379 "loc_FFC915B8:\n"
380 " CMP R1, #0x27 \n"
381 " CMPNE R1, #0x28 \n"
382 " BNE loc_FFC91624 \n"
383 " ADD R1, SP, #0xC \n"
384 " BL sub_FFC91404 \n"
385 " LDR R4, [SP, #0x1C] \n"
386 " LDR R0, [R7, #0x1C] \n"
387 " MOV R1, #0x40 \n"
388 " BL sub_FFC18E20 /*_ClearEventFlag*/ \n"
389 " LDR R0, [R4] \n"
390 " MOV R1, #0x40 \n"
391 " CMP R0, #0x27 \n"
392 " LDR R0, =0xFFC8DF64 \n"
393 " BNE loc_FFC915F8 \n"
394 " BL sub_FFCFF25C \n"
395 " B loc_FFC915FC \n"
396
397 "loc_FFC915F8:\n"
398 " BL sub_FFCFF2E8 \n"
399
400 "loc_FFC915FC:\n"
401 " LDR R0, [R7, #0x1C] \n"
402 " MOV R2, R8 \n"
403 " MOV R1, #0x40 \n"
404 " BL sub_FFC18D24 /*_WaitForAllEventFlag*/ \n"
405 " TST R0, #1 \n"
406 " BEQ loc_FFC91544 \n"
407 " LDR R1, =0xD1F \n"
408
409 "loc_FFC91618:\n"
410 " LDR R0, =0xFFC8E600 /*'ExpDrv.c'*/ \n"
411 " BL _DebugAssert \n"
412 " B loc_FFC91544 \n"
413
414 "loc_FFC91624:\n"
415 " CMP R1, #0x29 \n"
416 " BNE loc_FFC9163C \n"
417 " BL sub_FFC73568 \n"
418 " BL sub_FFC742E8 \n"
419 " BL sub_FFC73DA8 \n"
420 " B loc_FFC91544 \n"
421
422 "loc_FFC9163C:\n"
423 " LDR R0, [SP, #0x1C] \n"
424 " MOV R4, #1 \n"
425 " LDR R1, [R0] \n"
426 " CMP R1, #0x11 \n"
427 " CMPNE R1, #0x12 \n"
428 " BNE loc_FFC916AC \n"
429 " LDR R1, [R0, #0x7C] \n"
430 " ADD R1, R1, R1, LSL#1 \n"
431 " ADD R1, R0, R1, LSL#2 \n"
432 " SUB R1, R1, #8 \n"
433 " LDMIA R1, {R2-R4} \n"
434 " STMIA R6, {R2-R4} \n"
435 " BL sub_FFC8FF80 \n"
436 " LDR R0, [SP, #0x1C] \n"
437 " LDR R1, [R0, #0x7C] \n"
438 " LDR R3, [R0, #0x88] \n"
439 " LDR R2, [R0, #0x8C] \n"
440 " ADD R0, R0, #4 \n"
441 " BLX R3 \n"
442 " LDR R0, [SP, #0x1C] \n"
443 " BL sub_FFC92B08 \n"
444 " LDR R0, [SP, #0x1C] \n"
445 " LDR R1, [R0, #0x7C] \n"
446 " LDR R3, [R0, #0x90] \n"
447 " LDR R2, [R0, #0x94] \n"
448 " ADD R0, R0, #4 \n"
449 " BLX R3 \n"
450 " B loc_FFC919E0 \n"
451
452 "loc_FFC916AC:\n"
453 " CMP R1, #0x13 \n"
454 " CMPNE R1, #0x14 \n"
455 " CMPNE R1, #0x15 \n"
456 " BNE loc_FFC91760 \n"
457 " ADD R3, SP, #0xC \n"
458 " MOV R2, SP \n"
459 " ADD R1, SP, #0x10 \n"
460 " BL sub_FFC901C8 \n"
461 " CMP R0, #1 \n"
462 " MOV R4, R0 \n"
463 " CMPNE R4, #5 \n"
464 " BNE loc_FFC916FC \n"
465 " LDR R0, [SP, #0x1C] \n"
466 " MOV R2, R4 \n"
467 " LDR R1, [R0, #0x7C]! \n"
468 " LDR R12, [R0, #0xC]! \n"
469 " LDR R3, [R0, #4] \n"
470 " MOV R0, SP \n"
471 " BLX R12 \n"
472 " B loc_FFC91734 \n"
473
474 "loc_FFC916FC:\n"
475 " LDR R0, [SP, #0x1C] \n"
476 " CMP R4, #2 \n"
477 " LDR R3, [R0, #0x8C] \n"
478 " CMPNE R4, #6 \n"
479 " BNE loc_FFC91748 \n"
480 " LDR R12, [R0, #0x88] \n"
481 " MOV R0, SP \n"
482 " MOV R2, R4 \n"
483 " MOV R1, #1 \n"
484 " BLX R12 \n"
485 " LDR R0, [SP, #0x1C] \n"
486 " MOV R2, SP \n"
487 " ADD R1, SP, #0x10 \n"
488 " BL sub_FFC91150 \n"
489
490 "loc_FFC91734:\n"
491 " LDR R0, [SP, #0x1C] \n"
492 " LDR R2, [SP, #0xC] \n"
493 " MOV R1, R4 \n"
494 " BL sub_FFC913A4 \n"
495 " B loc_FFC919E0 \n"
496
497 "loc_FFC91748:\n"
498 " LDR R1, [R0, #0x7C] \n"
499 " LDR R12, [R0, #0x88] \n"
500 " ADD R0, R0, #4 \n"
501 " MOV R2, R4 \n"
502 " BLX R12 \n"
503 " B loc_FFC919E0 \n"
504
505 "loc_FFC91760:\n"
506 " CMP R1, #0x20 \n"
507 " CMPNE R1, #0x21 \n"
508 " BNE loc_FFC917AC \n"
509 " LDR R1, [R0, #0x7C] \n"
510 " ADD R1, R1, R1, LSL#1 \n"
511 " ADD R1, R0, R1, LSL#2 \n"
512 " SUB R1, R1, #8 \n"
513 " LDMIA R1, {R2-R4} \n"
514 " STMIA R6, {R2-R4} \n"
515 " BL sub_FFC8F504 \n"
516 " LDR R0, [SP, #0x1C] \n"
517 " LDR R1, [R0, #0x7C] \n"
518 " LDR R3, [R0, #0x88] \n"
519 " LDR R2, [R0, #0x8C] \n"
520 " ADD R0, R0, #4 \n"
521 " BLX R3 \n"
522 " LDR R0, [SP, #0x1C] \n"
523 " BL sub_FFC8F800 \n"
524 " B loc_FFC919E0 \n"
525
526 "loc_FFC917AC:\n"
527 " ADD R1, R0, #4 \n"
528 " LDMIA R1, {R2,R3,R12} \n"
529 " STMIA R6, {R2,R3,R12} \n"
530 " LDR R1, [R0] \n"
531 " CMP R1, #0x23 \n"
532 " ADDLS PC, PC, R1, LSL#2 \n"
533 " B loc_FFC919C0 \n"
534 " B loc_FFC91858 \n"
535 " B loc_FFC91858 \n"
536 " B loc_FFC918A8 \n"
537 " B loc_FFC918B0 \n"
538 " B loc_FFC918B0 \n"
539 " B loc_FFC918B0 \n"
540 " B loc_FFC91858 \n"
541 " B loc_FFC918A8 \n"
542 " B loc_FFC918B0 \n"
543 " B loc_FFC918B0 \n"
544 " B loc_FFC918C8 \n"
545 " B loc_FFC918C8 \n"
546 " B loc_FFC919B4 \n"
547 " B loc_FFC919BC \n"
548 " B loc_FFC919BC \n"
549 " B loc_FFC919BC \n"
550 " B loc_FFC919BC \n"
551 " B loc_FFC919C0 \n"
552 " B loc_FFC919C0 \n"
553 " B loc_FFC919C0 \n"
554 " B loc_FFC919C0 \n"
555 " B loc_FFC919C0 \n"
556 " B loc_FFC918B8 \n"
557 " B loc_FFC918C0 \n"
558 " B loc_FFC918C0 \n"
559 " B loc_FFC918D4 \n"
560 " B loc_FFC918DC \n"
561 " B loc_FFC9190C \n"
562 " B loc_FFC9193C \n"
563 " B loc_FFC9196C \n"
564 " B loc_FFC9199C \n"
565 " B loc_FFC9199C \n"
566 " B loc_FFC919C0 \n"
567 " B loc_FFC919C0 \n"
568 " B loc_FFC919A4 \n"
569 " B loc_FFC919AC \n"
570
571 "loc_FFC91858:\n"
572 " BL sub_FFC8E3E8 \n"
573 " B loc_FFC919C0 \n"
574
575
576 "loc_FFC918A8:\n"
577 " BL sub_FFC8E670 \n"
578 " B loc_FFC919C0 \n"
579
580 "loc_FFC918B0:\n"
581 " BL sub_FFC8E874 \n"
582 " B loc_FFC919C0 \n"
583
584 "loc_FFC918B8:\n"
585 " BL sub_FFC8EADC \n"
586 " B loc_FFC919C0 \n"
587
588 "loc_FFC918C0:\n"
589 " BL sub_FFC8ECD0 \n"
590 " B loc_FFC919C0 \n"
591
592 "loc_FFC918C8:\n"
593 " BL sub_FFC8EF34_my \n"
594 " MOV R4, #0 \n"
595 " B loc_FFC919C0 \n"
596
597 "loc_FFC918D4:\n"
598 " BL sub_FFC8F070 \n"
599 " B loc_FFC919C0 \n"
600
601 "loc_FFC918DC:\n"
602 " LDRH R1, [R0, #4] \n"
603 " STRH R1, [SP, #0x10] \n"
604 " LDRH R1, [R5, #2] \n"
605 " STRH R1, [SP, #0x12] \n"
606 " LDRH R1, [R5, #4] \n"
607 " STRH R1, [SP, #0x14] \n"
608 " LDRH R1, [R5, #6] \n"
609 " STRH R1, [SP, #0x16] \n"
610 " LDRH R1, [R0, #0xC] \n"
611 " STRH R1, [SP, #0x18] \n"
612 " BL sub_FFC927A8 \n"
613 " B loc_FFC919C0 \n"
614
615 "loc_FFC9190C:\n"
616 " LDRH R1, [R0, #4] \n"
617 " STRH R1, [SP, #0x10] \n"
618 " LDRH R1, [R5, #2] \n"
619 " STRH R1, [SP, #0x12] \n"
620 " LDRH R1, [R5, #4] \n"
621 " STRH R1, [SP, #0x14] \n"
622 " LDRH R1, [R5, #6] \n"
623 " STRH R1, [SP, #0x16] \n"
624 " LDRH R1, [R5, #8] \n"
625 " STRH R1, [SP, #0x18] \n"
626 " BL sub_FFC92924 \n"
627 " B loc_FFC919C0 \n"
628
629 "loc_FFC9193C:\n"
630 " LDRH R1, [R5] \n"
631 " STRH R1, [SP, #0x10] \n"
632 " LDRH R1, [R0, #6] \n"
633 " STRH R1, [SP, #0x12] \n"
634 " LDRH R1, [R5, #4] \n"
635 " STRH R1, [SP, #0x14] \n"
636 " LDRH R1, [R5, #6] \n"
637 " STRH R1, [SP, #0x16] \n"
638 " LDRH R1, [R5, #8] \n"
639 " STRH R1, [SP, #0x18] \n"
640 " BL sub_FFC929D0 \n"
641 " B loc_FFC919C0 \n"
642
643 "loc_FFC9196C:\n"
644 " LDRH R1, [R5] \n"
645 " STRH R1, [SP, #0x10] \n"
646 " LDRH R1, [R5, #2] \n"
647 " STRH R1, [SP, #0x12] \n"
648 " LDRH R1, [R5, #4] \n"
649 " STRH R1, [SP, #0x14] \n"
650 " LDRH R1, [R5, #6] \n"
651 " STRH R1, [SP, #0x16] \n"
652 " LDRH R1, [R0, #0xC] \n"
653 " STRH R1, [SP, #0x18] \n"
654 " BL sub_FFC92A70 \n"
655 " B loc_FFC919C0 \n"
656
657 "loc_FFC9199C:\n"
658 " BL sub_FFC8F2C8 \n"
659 " B loc_FFC919C0 \n"
660
661 "loc_FFC919A4:\n"
662 " BL sub_FFC8F904 \n"
663 " B loc_FFC919C0 \n"
664
665 "loc_FFC919AC:\n"
666 " BL sub_FFC8FB38 \n"
667 " B loc_FFC919C0 \n"
668
669 "loc_FFC919B4:\n"
670 " BL sub_FFC8FCB0 \n"
671 " B loc_FFC919C0 \n"
672
673 "loc_FFC919BC:\n"
674 " BL sub_FFC8FE48 \n"
675
676 "loc_FFC919C0:\n"
677 " LDR R0, [SP, #0x1C] \n"
678 " LDR R1, [R0, #0x7C] \n"
679 " LDR R3, [R0, #0x88] \n"
680 " LDR R2, [R0, #0x8C] \n"
681 " ADD R0, R0, #4 \n"
682 " BLX R3 \n"
683 " CMP R4, #1 \n"
684 " BNE loc_FFC91A28 \n"
685
686 "loc_FFC919E0:\n"
687 " LDR R0, [SP, #0x1C] \n"
688 " MOV R2, #0xC \n"
689 " LDR R1, [R0, #0x7C] \n"
690 " ADD R1, R1, R1, LSL#1 \n"
691 " ADD R0, R0, R1, LSL#2 \n"
692 " SUB R4, R0, #8 \n"
693 " LDR R0, =0x40A68 \n"
694 " ADD R1, SP, #0x10 \n"
695 " BL sub_FFE3B3C4 \n"
696 " LDR R0, =0x40A74 \n"
697 " MOV R2, #0xC \n"
698 " ADD R1, SP, #0x10 \n"
699 " BL sub_FFE3B3C4 \n"
700 " LDR R0, =0x40A80 \n"
701 " MOV R2, #0xC \n"
702 " MOV R1, R4 \n"
703 " BL sub_FFE3B3C4 \n"
704 " B loc_FFC91AA0 \n"
705
706 "loc_FFC91A28:\n"
707 " LDR R0, [SP, #0x1C] \n"
708 " LDR R0, [R0] \n"
709 " CMP R0, #0xB \n"
710 " BNE loc_FFC91A70 \n"
711 " MOV R3, #0 \n"
712 " STR R3, [SP] \n"
713 " MOV R3, #1 \n"
714 " MOV R2, #1 \n"
715 " MOV R1, #1 \n"
716 " MOV R0, #0 \n"
717 " BL sub_FFC8E1F0 \n"
718 " MOV R3, #0 \n"
719 " STR R3, [SP] \n"
720 " MOV R3, #1 \n"
721 " MOV R2, #1 \n"
722 " MOV R1, #1 \n"
723 " MOV R0, #0 \n"
724 " B loc_FFC91A9C \n"
725
726 "loc_FFC91A70:\n"
727 " MOV R3, #1 \n"
728 " MOV R2, #1 \n"
729 " MOV R1, #1 \n"
730 " MOV R0, #1 \n"
731 " STR R3, [SP] \n"
732 " BL sub_FFC8E1F0 \n"
733 " MOV R3, #1 \n"
734 " MOV R2, #1 \n"
735 " MOV R1, #1 \n"
736 " MOV R0, #1 \n"
737 " STR R3, [SP] \n"
738
739 "loc_FFC91A9C:\n"
740 " BL sub_FFC8E330 \n"
741
742 "loc_FFC91AA0:\n"
743 " LDR R0, [SP, #0x1C] \n"
744 " BL sub_FFC92734 \n"
745 " B loc_FFC91474 \n"
746 );
747 }
748
749
750
751 void __attribute__((naked,noinline)) sub_FFC8EF34_my() {
752 asm volatile (
753 " STMFD SP!, {R4-R8,LR} \n"
754 " LDR R7, =0x6818 \n"
755 " MOV R4, R0 \n"
756 " LDR R0, [R7, #0x1C] \n"
757 " MOV R1, #0x3E \n"
758 " BL sub_FFC18E20 /*_ClearEventFlag*/ \n"
759 " LDRSH R0, [R4, #4] \n"
760 " MOV R2, #0 \n"
761 " MOV R1, #0 \n"
762 " BL sub_FFC8DF84 \n"
763 " MOV R6, R0 \n"
764 " LDRSH R0, [R4, #6] \n"
765 " BL sub_FFC8E090 \n"
766 " LDRSH R0, [R4, #8] \n"
767 " BL sub_FFC8E0E8 \n"
768 " LDRSH R0, [R4, #0xA] \n"
769 " BL sub_FFC8E140 \n"
770 " LDRSH R0, [R4, #0xC] \n"
771 " BL sub_FFC8E198 \n"
772 " MOV R5, R0 \n"
773 " LDR R0, [R4] \n"
774 " LDR R8, =0x40A80 \n"
775 " CMP R0, #0xB \n"
776 " MOVEQ R6, #0 \n"
777 " MOVEQ R5, #0 \n"
778 " BEQ loc_FFC8EFC4 \n"
779 " CMP R6, #1 \n"
780 " BNE loc_FFC8EFC4 \n"
781 " LDRSH R0, [R4, #4] \n"
782 " LDR R1, =0xFFC8DEE0 \n"
783 " MOV R2, #2 \n"
784 " BL sub_FFCFF430 \n"
785 " STRH R0, [R4, #4] \n"
786 " MOV R0, #0 \n"
787 " STR R0, [R7, #0x28] \n"
788 " B loc_FFC8EFCC \n"
789
790 "loc_FFC8EFC4:\n"
791 " LDRH R0, [R8] \n"
792 " STRH R0, [R4, #4] \n"
793
794 "loc_FFC8EFCC:\n"
795 " CMP R5, #1 \n"
796 " LDRNEH R0, [R8, #8] \n"
797 " BNE loc_FFC8EFE8 \n"
798 " LDRSH R0, [R4, #0xC] \n"
799 " LDR R1, =0xFFC8DF74 \n"
800 " MOV R2, #0x20 \n"
801 " BL sub_FFC92764 \n"
802
803 "loc_FFC8EFE8:\n"
804 " STRH R0, [R4, #0xC] \n"
805 " LDRSH R0, [R4, #6] \n"
806 " BL sub_FFC7330C_my \n"
807 " LDR PC, =0xFFC8EFF4 \n"
808 );
809 }
810
811
812
813 void __attribute__((naked,noinline)) sub_FFC7330C_my() {
814 asm volatile (
815 " STMFD SP!, {R4-R6,LR} \n"
816 " LDR R5, =0x62D4 \n"
817 " MOV R4, R0 \n"
818 " LDR R0, [R5, #4] \n"
819 " CMP R0, #1 \n"
820 " MOVNE R1, #0x16C \n"
821 " LDRNE R0, =0xFFC730A4 /*'Shutter.c'*/ \n"
822 " BLNE _DebugAssert \n"
823 " CMN R4, #0xC00 \n"
824 " LDREQSH R4, [R5, #2] \n"
825 " CMN R4, #0xC00 \n"
826 " LDREQ R1, =0x172 \n"
827 " LDREQ R0, =0xFFC730A4 /*'Shutter.c'*/ \n"
828 " STRH R4, [R5, #2] \n"
829 " BLEQ _DebugAssert \n"
830 " MOV R0, R4 \n"
831 " BL apex2us \n"
832 " MOV R4, R0 \n"
833
834 " MOV R0, R4 \n"
835 " BL sub_FFCA493C \n"
836 " TST R0, #1 \n"
837 " LDRNE R1, =0x177 \n"
838 " LDMNEFD SP!, {R4-R6,LR} \n"
839 " LDRNE R0, =0xFFC730A4 /*'Shutter.c'*/ \n"
840 " BNE _DebugAssert \n"
841 " LDMFD SP!, {R4-R6,PC} \n"
842 );
843 }