This source file includes following definitions.
- capt_seq_task
- sub_FFD0EC34_my
- sub_FFC4DED8_my
- exp_drv_task
- sub_FFC91328_my
- sub_FFC751B4_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 #define USE_STUBS_NRFLAG 1
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R3-R9,LR} \n"
17 " LDR R6, =0x1CDB8 \n"
18 " LDR R5, =0x565C \n"
19 " MOV R9, #1 \n"
20 " MOV R7, #0 \n"
21
22 "loc_FFC4DB9C:\n"
23 " LDR R0, [R5, #0xC] \n"
24 " MOV R2, #0 \n"
25 " MOV R1, SP \n"
26 " BL sub_FFC19230 /*_ReceiveMessageQueue*/ \n"
27 " TST R0, #1 \n"
28 " BEQ loc_FFC4DBC8 \n"
29 " LDR R1, =0x43F \n"
30 " LDR R0, =0xFFC4D8F8 /*'SsShootTask.c'*/ \n"
31 " BL _DebugAssert \n"
32 " BL _ExitTask \n"
33 " LDMFD SP!, {R3-R9,PC} \n"
34
35 "loc_FFC4DBC8:\n"
36 " LDR R0, [SP] \n"
37 " LDR R1, [R0] \n"
38 " CMP R1, #0x18 \n"
39 " ADDLS PC, PC, R1, LSL#2 \n"
40 " B loc_FFC4DDC4 \n"
41 " B loc_FFC4DC40 \n"
42 " B loc_FFC4DCA8 \n"
43 " B loc_FFC4DCB0 \n"
44 " B loc_FFC4DCC8 \n"
45 " B loc_FFC4DCBC \n"
46 " B loc_FFC4DCD0 \n"
47 " B loc_FFC4DCD8 \n"
48 " B loc_FFC4DCE0 \n"
49 " B loc_FFC4DD38 \n"
50 " B loc_FFC4DD44 \n"
51 " B loc_FFC4DD4C \n"
52 " B loc_FFC4DD54 \n"
53 " B loc_FFC4DD5C \n"
54 " B loc_FFC4DD64 \n"
55 " B loc_FFC4DD6C \n"
56 " B loc_FFC4DD74 \n"
57 " B loc_FFC4DD7C \n"
58 " B loc_FFC4DD84 \n"
59 " B loc_FFC4DD8C \n"
60 " B loc_FFC4DD94 \n"
61 " B loc_FFC4DD9C \n"
62 " B loc_FFC4DDA8 \n"
63 " B loc_FFC4DDB4 \n"
64 " B loc_FFC4DDBC \n"
65 " B loc_FFC4DDD0 \n"
66
67 "loc_FFC4DC40:\n"
68 " BL sub_FFD0D5DC \n"
69 " BL shooting_expo_param_override\n"
70 " BL sub_FFC4BF50 \n"
71 " MOV R0, #0\n"
72 " STR R0, [R6,#0x24]\n"
73
74 " CMP R0, #0 \n"
75 " BEQ loc_FFC4DDD0 \n"
76
77
78 "loc_FFC4DC88:\n"
79 " BL sub_FFD22C14 \n"
80 " BL sub_FFC5B05C \n"
81 " STR R0, [R4, #0x14] \n"
82 " MOV R0, R4 \n"
83 " BL sub_FFD0EC34_my \n"
84 " BL capt_seq_hook_raw_here \n"
85 " TST R0, #1 \n"
86 " STRNE R9, [R5, #4] \n"
87 " B loc_FFC4DDD0 \n"
88
89 "loc_FFC4DCA8:\n"
90 " BL sub_FFC4DED8_my \n"
91 " B loc_FFC4DCC0 \n"
92
93 "loc_FFC4DCB0:\n"
94 " MOV R0, #1 \n"
95 " BL sub_FFD0D780 \n"
96 " B loc_FFC4DDD0 \n"
97
98 "loc_FFC4DCBC:\n"
99 " BL sub_FFD0D278 \n"
100
101 "loc_FFC4DCC0:\n"
102 " STR R7, [R6, #0x24] \n"
103 " B loc_FFC4DDD0 \n"
104
105 "loc_FFC4DCC8:\n"
106 " BL sub_FFD0D5A8 \n"
107 " B loc_FFC4DCC0 \n"
108
109 "loc_FFC4DCD0:\n"
110 " BL sub_FFD0D5B0 \n"
111 " B loc_FFC4DDD0 \n"
112
113 "loc_FFC4DCD8:\n"
114 " BL sub_FFD0D6A0 \n"
115 " B loc_FFC4DD3C \n"
116
117 "loc_FFC4DCE0:\n"
118 " LDR R4, [R0, #0xC] \n"
119 " BL sub_FFD0D5B8 \n"
120 " MOV R0, R4 \n"
121 " BL sub_FFD0DDCC \n"
122 " TST R0, #1 \n"
123 " MOV R8, R0 \n"
124 " BNE loc_FFC4DD20 \n"
125 " BL sub_FFC5B05C \n"
126 " STR R0, [R4, #0x14] \n"
127 " MOV R0, R4 \n"
128 " BL sub_FFD0EB4C \n"
129 " MOV R0, R4 \n"
130 " BL sub_FFD0F09C \n"
131 " MOV R8, R0 \n"
132 " LDR R0, [R4, #0x14] \n"
133 " BL sub_FFC5B270 \n"
134
135 "loc_FFC4DD20:\n"
136 " BL sub_FFD0D5A8 \n"
137 " MOV R2, R4 \n"
138 " MOV R1, #8 \n"
139 " MOV R0, R8 \n"
140 " BL sub_FFC4C398 \n"
141 " B loc_FFC4DDD0 \n"
142
143 "loc_FFC4DD38:\n"
144 " BL sub_FFD0D6FC \n"
145
146 "loc_FFC4DD3C:\n"
147 " BL sub_FFC4BF50 \n"
148 " B loc_FFC4DDD0 \n"
149
150 "loc_FFC4DD44:\n"
151 " BL sub_FFD0D5A8 \n"
152 " B loc_FFC4DDD0 \n"
153
154 "loc_FFC4DD4C:\n"
155 " BL sub_FFD0E038 \n"
156 " B loc_FFC4DDD0 \n"
157
158 "loc_FFC4DD54:\n"
159 " BL sub_FFD0E1F0 \n"
160 " B loc_FFC4DDD0 \n"
161
162 "loc_FFC4DD5C:\n"
163 " BL sub_FFD0E280 \n"
164 " B loc_FFC4DDD0 \n"
165
166 "loc_FFC4DD64:\n"
167 " BL sub_FFD0E334 \n"
168 " B loc_FFC4DDD0 \n"
169
170 "loc_FFC4DD6C:\n"
171 " BL sub_FFD0E51C \n"
172 " B loc_FFC4DDD0 \n"
173
174 "loc_FFC4DD74:\n"
175 " BL sub_FFD0E56C \n"
176 " B loc_FFC4DDD0 \n"
177
178 "loc_FFC4DD7C:\n"
179 " MOV R0, #0 \n"
180 " B loc_FFC4DDA0 \n"
181
182 "loc_FFC4DD84:\n"
183 " BL sub_FFD0E730 \n"
184 " B loc_FFC4DDD0 \n"
185
186 "loc_FFC4DD8C:\n"
187 " BL sub_FFD0E7C4 \n"
188 " B loc_FFC4DDD0 \n"
189
190 "loc_FFC4DD94:\n"
191 " BL sub_FFD0E884 \n"
192 " B loc_FFC4DDD0 \n"
193
194 "loc_FFC4DD9C:\n"
195 " MOV R0, #1 \n"
196
197 "loc_FFC4DDA0:\n"
198 " BL sub_FFD0E5F0 \n"
199 " B loc_FFC4DDD0 \n"
200
201 "loc_FFC4DDA8:\n"
202 " BL sub_FFD0D8A4 \n"
203 " BL sub_FFC15B18 \n"
204 " B loc_FFC4DDD0 \n"
205
206 "loc_FFC4DDB4:\n"
207 " BL sub_FFD0E3F0 \n"
208 " B loc_FFC4DDD0 \n"
209
210 "loc_FFC4DDBC:\n"
211 " BL sub_FFD0E45C \n"
212 " B loc_FFC4DDD0 \n"
213
214 "loc_FFC4DDC4:\n"
215 " LDR R1, =0x523 \n"
216 " LDR R0, =0xFFC4D8F8 /*'SsShootTask.c'*/ \n"
217 " BL _DebugAssert \n"
218
219 "loc_FFC4DDD0:\n"
220 " LDR R0, [SP] \n"
221 " LDR R1, [R0, #4] \n"
222 " LDR R0, [R5, #8] \n"
223 " BL sub_FFC18FAC /*_SetEventFlag*/ \n"
224 " LDR R4, [SP] \n"
225 " LDR R0, [R4, #8] \n"
226 " CMP R0, #0 \n"
227 " MOVEQ R1, #0xFC \n"
228 " LDREQ R0, =0xFFC4D8F8 /*'SsShootTask.c'*/ \n"
229 " BLEQ _DebugAssert \n"
230 " STR R7, [R4, #8] \n"
231 " B loc_FFC4DB9C \n"
232 " STMFD SP!, {R3-R5,LR} \n"
233 );
234 }
235
236
237
238 void __attribute__((naked,noinline)) sub_FFD0EC34_my() {
239 asm volatile (
240 " STMFD SP!, {R0-R10,LR} \n"
241 " MOV R6, #0 \n"
242 " MOV R4, R0 \n"
243 " BL sub_FFD0F760 \n"
244 " MVN R1, #0 \n"
245 " BL sub_FFC18FE0 /*_ClearEventFlag*/ \n"
246 " MOV R2, #4 \n"
247 " ADD R1, SP, #8 \n"
248 " MOV R0, #0x8A \n"
249 " BL _GetPropertyCase \n"
250 " TST R0, #1 \n"
251 " LDRNE R1, =0x20A \n"
252 " LDRNE R0, =0xFFD0EE08 /*'SsCaptureSeq.c'*/ \n"
253 " BLNE _DebugAssert \n"
254 " LDR R8, =0x1CE6C \n"
255 " LDR R5, =0x1CDB8 \n"
256 " LDRSH R1, [R8, #0xE] \n"
257 " LDR R0, [R5, #0x7C] \n"
258
259 " BL _GetCCDTemperature \n"
260 " LDR R2, =0xD788 \n"
261 " ADD R3, R4, #0x8C \n"
262 " STRH R0, [R4, #0x88] \n"
263 " STRD R2, [SP] \n"
264 " MOV R1, R0 \n"
265 " LDRH R0, [R5, #0x54] \n"
266 " LDRSH R2, [R8, #0xC] \n"
267 " LDR R3, =0xD784 \n"
268 " BL sub_FFD0FC54 \n"
269 " BL wait_until_remote_button_is_released\n"
270 " BL capt_seq_hook_set_nr\n"
271 " LDR PC, =0xFFD0ECA8 \n"
272 );
273 }
274
275
276
277 void __attribute__((naked,noinline)) sub_FFC4DED8_my() {
278 asm volatile (
279 " STMFD SP!, {R4-R6,LR} \n"
280 " LDR R4, [R0, #0xC] \n"
281 " LDR R6, =0x1CDB8 \n"
282 " LDR R0, [R4, #8] \n"
283 " MOV R5, #0 \n"
284 " ORR R0, R0, #1 \n"
285 " STR R0, [R4, #8] \n"
286 " LDR R0, [R6, #0x24] \n"
287 " CMP R0, #0 \n"
288 " MOVEQ R0, #2 \n"
289 " BLEQ sub_FFC48FB4 \n"
290 " BL sub_FFD0D5B8 \n"
291 " LDR R0, [R6, #0x24] \n"
292 " CMP R0, #0 \n"
293 " BNE loc_FFC4DF58 \n"
294 " MOV R0, R4 \n"
295 " BL sub_FFD0DA4C \n"
296 " TST R0, #1 \n"
297 " MOVNE R2, R4 \n"
298 " LDMNEFD SP!, {R4-R6,LR} \n"
299 " MOVNE R1, #1 \n"
300 " BNE sub_FFC4C398 \n"
301 " BL sub_FFD22C14 \n"
302 " BL sub_FFC5B05C \n"
303 " STR R0, [R4, #0x14] \n"
304 " MOV R0, R4 \n"
305 " BL sub_FFD0EB4C \n"
306 " BL sub_FFD0F5F4 \n"
307 " MOV R0, R4 \n"
308 " BL sub_FFD0EC34_my \n"
309 " BL capt_seq_hook_raw_here \n"
310 " MOV R5, R0 \n"
311 " B loc_FFC4DF68 \n"
312
313 "loc_FFC4DF58:\n"
314 " LDR R0, =0x565C \n"
315 " LDR R0, [R0, #4] \n"
316 " CMP R0, #0 \n"
317 " MOVNE R5, #0x1D \n"
318
319 "loc_FFC4DF68:\n"
320 " MOV R2, R4 \n"
321 " MOV R1, #1 \n"
322 " MOV R0, R5 \n"
323 " BL sub_FFC4C398 \n"
324 " BL sub_FFD0F03C \n"
325 " CMP R0, #0 \n"
326 " LDRNE R0, [R4, #8] \n"
327 " ORRNE R0, R0, #0x2000 \n"
328 " STRNE R0, [R4, #8] \n"
329 " LDMFD SP!, {R4-R6,PC} \n"
330 );
331 }
332
333
334
335 void __attribute__((naked,noinline)) exp_drv_task() {
336 asm volatile (
337 " STMFD SP!, {R4-R8,LR} \n"
338 " SUB SP, SP, #0x20 \n"
339 " LDR R8, =0xBB8 \n"
340 " LDR R7, =0x68DC \n"
341 " LDR R5, =0x44594 \n"
342 " MOV R0, #0 \n"
343 " ADD R6, SP, #0x10 \n"
344 " STR R0, [SP, #0xC] \n"
345
346 "loc_FFC93868:\n"
347 " LDR R0, [R7, #0x20] \n"
348 " MOV R2, #0 \n"
349 " ADD R1, SP, #0x1C \n"
350 " BL sub_FFC19230 /*_ReceiveMessageQueue*/ \n"
351 " LDR R0, [SP, #0xC] \n"
352 " CMP R0, #1 \n"
353 " BNE loc_FFC938B0 \n"
354 " LDR R0, [SP, #0x1C] \n"
355 " LDR R0, [R0] \n"
356 " CMP R0, #0x13 \n"
357 " CMPNE R0, #0x14 \n"
358 " CMPNE R0, #0x15 \n"
359 " BEQ loc_FFC93A30 \n"
360 " CMP R0, #0x26 \n"
361 " BEQ loc_FFC9399C \n"
362 " ADD R1, SP, #0xC \n"
363 " MOV R0, #0 \n"
364 " BL sub_FFC937F8 \n"
365
366 "loc_FFC938B0:\n"
367 " LDR R0, [SP, #0x1C] \n"
368 " LDR R1, [R0] \n"
369 " CMP R1, #0x2B \n"
370 " BNE loc_FFC938E0 \n"
371 " LDR R0, [SP, #0x1C] \n"
372 " BL sub_FFC94B28 \n"
373 " LDR R0, [R7, #0x1C] \n"
374 " MOV R1, #1 \n"
375 " BL sub_FFC18FAC /*_SetEventFlag*/ \n"
376 " BL _ExitTask \n"
377 " ADD SP, SP, #0x20 \n"
378 " LDMFD SP!, {R4-R8,PC} \n"
379
380 "loc_FFC938E0:\n"
381 " CMP R1, #0x2A \n"
382 " BNE loc_FFC938FC \n"
383 " LDR R2, [R0, #0x88]! \n"
384 " LDR R1, [R0, #4] \n"
385 " MOV R0, R1 \n"
386 " BLX R2 \n"
387 " B loc_FFC93E94 \n"
388
389 "loc_FFC938FC:\n"
390 " CMP R1, #0x24 \n"
391 " BNE loc_FFC9394C \n"
392 " LDR R0, [R7, #0x1C] \n"
393 " MOV R1, #0x80 \n"
394 " BL sub_FFC18FE0 /*_ClearEventFlag*/ \n"
395 " LDR R0, =0xFFC902E4 \n"
396 " MOV R1, #0x80 \n"
397 " BL sub_FFD03490 \n"
398 " LDR R0, [R7, #0x1C] \n"
399 " MOV R2, R8 \n"
400 " MOV R1, #0x80 \n"
401 " BL sub_FFC18EE4 /*_WaitForAllEventFlag*/ \n"
402 " TST R0, #1 \n"
403 " LDRNE R1, =0xD07 \n"
404 " BNE loc_FFC93A0C \n"
405
406 "loc_FFC93938:\n"
407 " LDR R1, [SP, #0x1C] \n"
408 " LDR R0, [R1, #0x8C] \n"
409 " LDR R1, [R1, #0x88] \n"
410 " BLX R1 \n"
411 " B loc_FFC93E94 \n"
412
413 "loc_FFC9394C:\n"
414 " CMP R1, #0x25 \n"
415 " BNE loc_FFC93994 \n"
416 " ADD R1, SP, #0xC \n"
417 " BL sub_FFC937F8 \n"
418 " LDR R0, [R7, #0x1C] \n"
419 " MOV R1, #0x100 \n"
420 " BL sub_FFC18FE0 /*_ClearEventFlag*/ \n"
421 " MOV R1, #0x100 \n"
422 " LDR R0, =0xFFC902F4 \n"
423 " BL sub_FFD03C50 \n"
424 " LDR R0, [R7, #0x1C] \n"
425 " MOV R2, R8 \n"
426 " MOV R1, #0x100 \n"
427 " BL sub_FFC18EE4 /*_WaitForAllEventFlag*/ \n"
428 " TST R0, #1 \n"
429 " BEQ loc_FFC93938 \n"
430 " LDR R1, =0xD11 \n"
431 " B loc_FFC93A0C \n"
432
433 "loc_FFC93994:\n"
434 " CMP R1, #0x26 \n"
435 " BNE loc_FFC939AC \n"
436
437 "loc_FFC9399C:\n"
438 " LDR R0, [SP, #0x1C] \n"
439 " ADD R1, SP, #0xC \n"
440 " BL sub_FFC937F8 \n"
441 " B loc_FFC93938 \n"
442
443 "loc_FFC939AC:\n"
444 " CMP R1, #0x27 \n"
445 " CMPNE R1, #0x28 \n"
446 " BNE loc_FFC93A18 \n"
447 " ADD R1, SP, #0xC \n"
448 " BL sub_FFC937F8 \n"
449 " LDR R4, [SP, #0x1C] \n"
450 " LDR R0, [R7, #0x1C] \n"
451 " MOV R1, #0x40 \n"
452 " BL sub_FFC18FE0 /*_ClearEventFlag*/ \n"
453 " LDR R0, [R4] \n"
454 " MOV R1, #0x40 \n"
455 " CMP R0, #0x27 \n"
456 " LDR R0, =0xFFC90358 \n"
457 " BNE loc_FFC939EC \n"
458 " BL sub_FFD03530 \n"
459 " B loc_FFC939F0 \n"
460
461 "loc_FFC939EC:\n"
462 " BL sub_FFD035BC \n"
463
464 "loc_FFC939F0:\n"
465 " LDR R0, [R7, #0x1C] \n"
466 " MOV R2, R8 \n"
467 " MOV R1, #0x40 \n"
468 " BL sub_FFC18EE4 /*_WaitForAllEventFlag*/ \n"
469 " TST R0, #1 \n"
470 " BEQ loc_FFC93938 \n"
471 " LDR R1, =0xD1F \n"
472
473 "loc_FFC93A0C:\n"
474 " LDR R0, =0xFFC909F4 /*'ExpDrv.c'*/ \n"
475 " BL _DebugAssert \n"
476 " B loc_FFC93938 \n"
477
478 "loc_FFC93A18:\n"
479 " CMP R1, #0x29 \n"
480 " BNE loc_FFC93A30 \n"
481 " BL sub_FFC75410 \n"
482 " BL sub_FFC76190 \n"
483 " BL sub_FFC75C50 \n"
484 " B loc_FFC93938 \n"
485
486 "loc_FFC93A30:\n"
487 " LDR R0, [SP, #0x1C] \n"
488 " MOV R4, #1 \n"
489 " LDR R1, [R0] \n"
490 " CMP R1, #0x11 \n"
491 " CMPNE R1, #0x12 \n"
492 " BNE loc_FFC93AA0 \n"
493 " LDR R1, [R0, #0x7C] \n"
494 " ADD R1, R1, R1, LSL#1 \n"
495 " ADD R1, R0, R1, LSL#2 \n"
496 " SUB R1, R1, #8 \n"
497 " LDMIA R1, {R2-R4} \n"
498 " STMIA R6, {R2-R4} \n"
499 " BL sub_FFC92374 \n"
500 " LDR R0, [SP, #0x1C] \n"
501 " LDR R1, [R0, #0x7C] \n"
502 " LDR R3, [R0, #0x88] \n"
503 " LDR R2, [R0, #0x8C] \n"
504 " ADD R0, R0, #4 \n"
505 " BLX R3 \n"
506 " LDR R0, [SP, #0x1C] \n"
507 " BL sub_FFC94EFC \n"
508 " LDR R0, [SP, #0x1C] \n"
509 " LDR R1, [R0, #0x7C] \n"
510 " LDR R3, [R0, #0x90] \n"
511 " LDR R2, [R0, #0x94] \n"
512 " ADD R0, R0, #4 \n"
513 " BLX R3 \n"
514 " B loc_FFC93DD4 \n"
515
516 "loc_FFC93AA0:\n"
517 " CMP R1, #0x13 \n"
518 " CMPNE R1, #0x14 \n"
519 " CMPNE R1, #0x15 \n"
520 " BNE loc_FFC93B54 \n"
521 " ADD R3, SP, #0xC \n"
522 " MOV R2, SP \n"
523 " ADD R1, SP, #0x10 \n"
524 " BL sub_FFC925BC \n"
525 " CMP R0, #1 \n"
526 " MOV R4, R0 \n"
527 " CMPNE R4, #5 \n"
528 " BNE loc_FFC93AF0 \n"
529 " LDR R0, [SP, #0x1C] \n"
530 " MOV R2, R4 \n"
531 " LDR R1, [R0, #0x7C]! \n"
532 " LDR R12, [R0, #0xC]! \n"
533 " LDR R3, [R0, #4] \n"
534 " MOV R0, SP \n"
535 " BLX R12 \n"
536 " B loc_FFC93B28 \n"
537
538 "loc_FFC93AF0:\n"
539 " LDR R0, [SP, #0x1C] \n"
540 " CMP R4, #2 \n"
541 " LDR R3, [R0, #0x8C] \n"
542 " CMPNE R4, #6 \n"
543 " BNE loc_FFC93B3C \n"
544 " LDR R12, [R0, #0x88] \n"
545 " MOV R0, SP \n"
546 " MOV R2, R4 \n"
547 " MOV R1, #1 \n"
548 " BLX R12 \n"
549 " LDR R0, [SP, #0x1C] \n"
550 " MOV R2, SP \n"
551 " ADD R1, SP, #0x10 \n"
552 " BL sub_FFC93544 \n"
553
554 "loc_FFC93B28:\n"
555 " LDR R0, [SP, #0x1C] \n"
556 " LDR R2, [SP, #0xC] \n"
557 " MOV R1, R4 \n"
558 " BL sub_FFC93798 \n"
559 " B loc_FFC93DD4 \n"
560
561 "loc_FFC93B3C:\n"
562 " LDR R1, [R0, #0x7C] \n"
563 " LDR R12, [R0, #0x88] \n"
564 " ADD R0, R0, #4 \n"
565 " MOV R2, R4 \n"
566 " BLX R12 \n"
567 " B loc_FFC93DD4 \n"
568
569 "loc_FFC93B54:\n"
570 " CMP R1, #0x20 \n"
571 " CMPNE R1, #0x21 \n"
572 " BNE loc_FFC93BA0 \n"
573 " LDR R1, [R0, #0x7C] \n"
574 " ADD R1, R1, R1, LSL#1 \n"
575 " ADD R1, R0, R1, LSL#2 \n"
576 " SUB R1, R1, #8 \n"
577 " LDMIA R1, {R2-R4} \n"
578 " STMIA R6, {R2-R4} \n"
579 " BL sub_FFC918F8 \n"
580 " LDR R0, [SP, #0x1C] \n"
581 " LDR R1, [R0, #0x7C] \n"
582 " LDR R3, [R0, #0x88] \n"
583 " LDR R2, [R0, #0x8C] \n"
584 " ADD R0, R0, #4 \n"
585 " BLX R3 \n"
586 " LDR R0, [SP, #0x1C] \n"
587 " BL sub_FFC91BF4 \n"
588 " B loc_FFC93DD4 \n"
589
590 "loc_FFC93BA0:\n"
591 " ADD R1, R0, #4 \n"
592 " LDMIA R1, {R2,R3,R12} \n"
593 " STMIA R6, {R2,R3,R12} \n"
594 " LDR R1, [R0] \n"
595 " CMP R1, #0x23 \n"
596 " ADDLS PC, PC, R1, LSL#2 \n"
597 " B loc_FFC93DB4 \n"
598 " B loc_FFC93C4C \n"
599 " B loc_FFC93C4C \n"
600 " B loc_FFC93C9C \n"
601 " B loc_FFC93CA4 \n"
602 " B loc_FFC93CA4 \n"
603 " B loc_FFC93CA4 \n"
604 " B loc_FFC93C4C \n"
605 " B loc_FFC93C9C \n"
606 " B loc_FFC93CA4 \n"
607 " B loc_FFC93CA4 \n"
608 " B loc_FFC93CBC \n"
609 " B loc_FFC93CBC \n"
610 " B loc_FFC93DA8 \n"
611 " B loc_FFC93DB0 \n"
612 " B loc_FFC93DB0 \n"
613 " B loc_FFC93DB0 \n"
614 " B loc_FFC93DB0 \n"
615 " B loc_FFC93DB4 \n"
616 " B loc_FFC93DB4 \n"
617 " B loc_FFC93DB4 \n"
618 " B loc_FFC93DB4 \n"
619 " B loc_FFC93DB4 \n"
620 " B loc_FFC93CAC \n"
621 " B loc_FFC93CB4 \n"
622 " B loc_FFC93CB4 \n"
623 " B loc_FFC93CC8 \n"
624 " B loc_FFC93CD0 \n"
625 " B loc_FFC93D00 \n"
626 " B loc_FFC93D30 \n"
627 " B loc_FFC93D60 \n"
628 " B loc_FFC93D90 \n"
629 " B loc_FFC93D90 \n"
630 " B loc_FFC93DB4 \n"
631 " B loc_FFC93DB4 \n"
632 " B loc_FFC93D98 \n"
633 " B loc_FFC93DA0 \n"
634
635 "loc_FFC93C4C:\n"
636 " BL sub_FFC907DC \n"
637 " B loc_FFC93DB4 \n"
638
639
640 "loc_FFC93C9C:\n"
641 " BL sub_FFC90A64 \n"
642 " B loc_FFC93DB4 \n"
643
644 "loc_FFC93CA4:\n"
645 " BL sub_FFC90C68 \n"
646 " B loc_FFC93DB4 \n"
647
648 "loc_FFC93CAC:\n"
649 " BL sub_FFC90ED0 \n"
650 " B loc_FFC93DB4 \n"
651
652 "loc_FFC93CB4:\n"
653 " BL sub_FFC910C4 \n"
654 " B loc_FFC93DB4 \n"
655
656 "loc_FFC93CBC:\n"
657 " BL sub_FFC91328_my \n"
658 " MOV R4, #0 \n"
659 " B loc_FFC93DB4 \n"
660
661 "loc_FFC93CC8:\n"
662 " BL sub_FFC91464 \n"
663 " B loc_FFC93DB4 \n"
664
665 "loc_FFC93CD0:\n"
666 " LDRH R1, [R0, #4] \n"
667 " STRH R1, [SP, #0x10] \n"
668 " LDRH R1, [R5, #2] \n"
669 " STRH R1, [SP, #0x12] \n"
670 " LDRH R1, [R5, #4] \n"
671 " STRH R1, [SP, #0x14] \n"
672 " LDRH R1, [R5, #6] \n"
673 " STRH R1, [SP, #0x16] \n"
674 " LDRH R1, [R0, #0xC] \n"
675 " STRH R1, [SP, #0x18] \n"
676 " BL sub_FFC94B9C \n"
677 " B loc_FFC93DB4 \n"
678
679 "loc_FFC93D00:\n"
680 " LDRH R1, [R0, #4] \n"
681 " STRH R1, [SP, #0x10] \n"
682 " LDRH R1, [R5, #2] \n"
683 " STRH R1, [SP, #0x12] \n"
684 " LDRH R1, [R5, #4] \n"
685 " STRH R1, [SP, #0x14] \n"
686 " LDRH R1, [R5, #6] \n"
687 " STRH R1, [SP, #0x16] \n"
688 " LDRH R1, [R5, #8] \n"
689 " STRH R1, [SP, #0x18] \n"
690 " BL sub_FFC94D18 \n"
691 " B loc_FFC93DB4 \n"
692
693 "loc_FFC93D30:\n"
694 " LDRH R1, [R5] \n"
695 " STRH R1, [SP, #0x10] \n"
696 " LDRH R1, [R0, #6] \n"
697 " STRH R1, [SP, #0x12] \n"
698 " LDRH R1, [R5, #4] \n"
699 " STRH R1, [SP, #0x14] \n"
700 " LDRH R1, [R5, #6] \n"
701 " STRH R1, [SP, #0x16] \n"
702 " LDRH R1, [R5, #8] \n"
703 " STRH R1, [SP, #0x18] \n"
704 " BL sub_FFC94DC4 \n"
705 " B loc_FFC93DB4 \n"
706
707 "loc_FFC93D60:\n"
708 " LDRH R1, [R5] \n"
709 " STRH R1, [SP, #0x10] \n"
710 " LDRH R1, [R5, #2] \n"
711 " STRH R1, [SP, #0x12] \n"
712 " LDRH R1, [R5, #4] \n"
713 " STRH R1, [SP, #0x14] \n"
714 " LDRH R1, [R5, #6] \n"
715 " STRH R1, [SP, #0x16] \n"
716 " LDRH R1, [R0, #0xC] \n"
717 " STRH R1, [SP, #0x18] \n"
718 " BL sub_FFC94E64 \n"
719 " B loc_FFC93DB4 \n"
720
721 "loc_FFC93D90:\n"
722 " BL sub_FFC916BC \n"
723 " B loc_FFC93DB4 \n"
724
725 "loc_FFC93D98:\n"
726 " BL sub_FFC91CF8 \n"
727 " B loc_FFC93DB4 \n"
728
729 "loc_FFC93DA0:\n"
730 " BL sub_FFC91F2C \n"
731 " B loc_FFC93DB4 \n"
732
733 "loc_FFC93DA8:\n"
734 " BL sub_FFC920A4 \n"
735 " B loc_FFC93DB4 \n"
736
737 "loc_FFC93DB0:\n"
738 " BL sub_FFC9223C \n"
739
740 "loc_FFC93DB4:\n"
741 " LDR R0, [SP, #0x1C] \n"
742 " LDR R1, [R0, #0x7C] \n"
743 " LDR R3, [R0, #0x88] \n"
744 " LDR R2, [R0, #0x8C] \n"
745 " ADD R0, R0, #4 \n"
746 " BLX R3 \n"
747 " CMP R4, #1 \n"
748 " BNE loc_FFC93E1C \n"
749
750 "loc_FFC93DD4:\n"
751 " LDR R0, [SP, #0x1C] \n"
752 " MOV R2, #0xC \n"
753 " LDR R1, [R0, #0x7C] \n"
754 " ADD R1, R1, R1, LSL#1 \n"
755 " ADD R0, R0, R1, LSL#2 \n"
756 " SUB R4, R0, #8 \n"
757 " LDR R0, =0x44594 \n"
758 " ADD R1, SP, #0x10 \n"
759 " BL sub_FFE4A528 \n"
760 " LDR R0, =0x445A0 \n"
761 " MOV R2, #0xC \n"
762 " ADD R1, SP, #0x10 \n"
763 " BL sub_FFE4A528 \n"
764 " LDR R0, =0x445AC \n"
765 " MOV R2, #0xC \n"
766 " MOV R1, R4 \n"
767 " BL sub_FFE4A528 \n"
768 " B loc_FFC93E94 \n"
769
770 "loc_FFC93E1C:\n"
771 " LDR R0, [SP, #0x1C] \n"
772 " LDR R0, [R0] \n"
773 " CMP R0, #0xB \n"
774 " BNE loc_FFC93E64 \n"
775 " MOV R3, #0 \n"
776 " STR R3, [SP] \n"
777 " MOV R3, #1 \n"
778 " MOV R2, #1 \n"
779 " MOV R1, #1 \n"
780 " MOV R0, #0 \n"
781 " BL sub_FFC905E4 \n"
782 " MOV R3, #0 \n"
783 " STR R3, [SP] \n"
784 " MOV R3, #1 \n"
785 " MOV R2, #1 \n"
786 " MOV R1, #1 \n"
787 " MOV R0, #0 \n"
788 " B loc_FFC93E90 \n"
789
790 "loc_FFC93E64:\n"
791 " MOV R3, #1 \n"
792 " MOV R2, #1 \n"
793 " MOV R1, #1 \n"
794 " MOV R0, #1 \n"
795 " STR R3, [SP] \n"
796 " BL sub_FFC905E4 \n"
797 " MOV R3, #1 \n"
798 " MOV R2, #1 \n"
799 " MOV R1, #1 \n"
800 " MOV R0, #1 \n"
801 " STR R3, [SP] \n"
802
803 "loc_FFC93E90:\n"
804 " BL sub_FFC90724 \n"
805
806 "loc_FFC93E94:\n"
807 " LDR R0, [SP, #0x1C] \n"
808 " BL sub_FFC94B28 \n"
809 " B loc_FFC93868 \n"
810 );
811 }
812
813
814
815 void __attribute__((naked,noinline)) sub_FFC91328_my() {
816 asm volatile (
817 " STMFD SP!, {R4-R8,LR} \n"
818 " LDR R7, =0x68DC \n"
819 " MOV R4, R0 \n"
820 " LDR R0, [R7, #0x1C] \n"
821 " MOV R1, #0x3E \n"
822 " BL sub_FFC18FE0 /*_ClearEventFlag*/ \n"
823 " LDRSH R0, [R4, #4] \n"
824 " MOV R2, #0 \n"
825 " MOV R1, #0 \n"
826 " BL sub_FFC90378 \n"
827 " MOV R6, R0 \n"
828 " LDRSH R0, [R4, #6] \n"
829 " BL sub_FFC90484 \n"
830 " LDRSH R0, [R4, #8] \n"
831 " BL sub_FFC904DC \n"
832 " LDRSH R0, [R4, #0xA] \n"
833 " BL sub_FFC90534 \n"
834 " LDRSH R0, [R4, #0xC] \n"
835 " BL sub_FFC9058C \n"
836 " MOV R5, R0 \n"
837 " LDR R0, [R4] \n"
838 " LDR R8, =0x445AC \n"
839 " CMP R0, #0xB \n"
840 " MOVEQ R6, #0 \n"
841 " MOVEQ R5, #0 \n"
842 " BEQ loc_FFC913B8 \n"
843 " CMP R6, #1 \n"
844 " BNE loc_FFC913B8 \n"
845 " LDRSH R0, [R4, #4] \n"
846 " LDR R1, =0xFFC902D4 \n"
847 " MOV R2, #2 \n"
848 " BL sub_FFD03704 \n"
849 " STRH R0, [R4, #4] \n"
850 " MOV R0, #0 \n"
851 " STR R0, [R7, #0x28] \n"
852 " B loc_FFC913C0 \n"
853
854 "loc_FFC913B8:\n"
855 " LDRH R0, [R8] \n"
856 " STRH R0, [R4, #4] \n"
857
858 "loc_FFC913C0:\n"
859 " CMP R5, #1 \n"
860 " LDRNEH R0, [R8, #8] \n"
861 " BNE loc_FFC913DC \n"
862 " LDRSH R0, [R4, #0xC] \n"
863 " LDR R1, =0xFFC90368 \n"
864 " MOV R2, #0x20 \n"
865 " BL sub_FFC94B58 \n"
866
867 "loc_FFC913DC:\n"
868 " STRH R0, [R4, #0xC] \n"
869 " LDRSH R0, [R4, #6] \n"
870 " BL sub_FFC751B4_my \n"
871 " LDR PC, =0xFFC913E8 \n"
872 );
873 }
874
875
876
877 void __attribute__((naked,noinline)) sub_FFC751B4_my() {
878 asm volatile (
879 " STMFD SP!, {R4-R6,LR} \n"
880 " LDR R5, =0x6384 \n"
881 " MOV R4, R0 \n"
882 " LDR R0, [R5, #4] \n"
883 " CMP R0, #1 \n"
884 " MOVNE R1, #0x16C \n"
885 " LDRNE R0, =0xFFC74F4C /*'Shutter.c'*/ \n"
886 " BLNE _DebugAssert \n"
887 " CMN R4, #0xC00 \n"
888 " LDREQSH R4, [R5, #2] \n"
889 " CMN R4, #0xC00 \n"
890 " LDREQ R1, =0x172 \n"
891 " LDREQ R0, =0xFFC74F4C /*'Shutter.c'*/ \n"
892 " STRH R4, [R5, #2] \n"
893 " BLEQ _DebugAssert \n"
894 " MOV R0, R4 \n"
895 " BL apex2us \n"
896 " MOV R4, R0 \n"
897
898 " MOV R0, R4 \n"
899 " BL sub_FFCA77DC \n"
900 " TST R0, #1 \n"
901 " LDRNE R1, =0x177 \n"
902 " LDMNEFD SP!, {R4-R6,LR} \n"
903 " LDRNE R0, =0xFFC74F4C /*'Shutter.c'*/ \n"
904 " BNE _DebugAssert \n"
905 " LDMFD SP!, {R4-R6,PC} \n"
906 );
907 }