This source file includes following definitions.
- capt_seq_task
- sub_FFE6ED68_my
- sub_FFE71CDC_my
- exp_drv_task
- sub_FFD0FC98_my
- sub_FFCDCA94_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 static long *nrflag = (long*)0xCF74;
9
10 #include "../../../generic/capt_seq.c"
11
12
13
14 void __attribute__((naked,noinline)) capt_seq_task() {
15 asm volatile (
16 " STMFD SP!, {R4,LR} \n"
17 " SUB SP, SP, #4 \n"
18 " MOV R4, SP \n"
19 " B loc_FFE6F2D4 \n"
20
21 "loc_FFE6F178:\n"
22 " LDR R2, [SP] \n"
23 " LDR R3, [R2] \n"
24 " MOV R0, R2 \n"
25 " CMP R3, #0x15 \n"
26 " LDRLS PC, [PC, R3, LSL#2] \n"
27 " B loc_FFE6F2A8 \n"
28 " .long loc_FFE6F1E8 \n"
29 " .long loc_FFE6F1F4 \n"
30 " .long loc_FFE6F1FC \n"
31 " .long loc_FFE6F210 \n"
32 " .long loc_FFE6F208 \n"
33 " .long loc_FFE6F218 \n"
34 " .long loc_FFE6F220 \n"
35 " .long loc_FFE6F22C \n"
36 " .long loc_FFE6F234 \n"
37 " .long loc_FFE6F240 \n"
38 " .long loc_FFE6F248 \n"
39 " .long loc_FFE6F250 \n"
40 " .long loc_FFE6F258 \n"
41 " .long loc_FFE6F260 \n"
42 " .long loc_FFE6F268 \n"
43 " .long loc_FFE6F274 \n"
44 " .long loc_FFE6F27C \n"
45 " .long loc_FFE6F284 \n"
46 " .long loc_FFE6F28C \n"
47 " .long loc_FFE6F298 \n"
48 " .long loc_FFE6F2A0 \n"
49 " .long loc_FFE6F2BC \n"
50
51 "loc_FFE6F1E8:\n"
52 " BL sub_FFE6F814 \n"
53 " BL shooting_expo_param_override\n"
54 " BL sub_FFE6D0F4 \n"
55 " B loc_FFE6F2B8 \n"
56
57 "loc_FFE6F1F4:\n"
58 " BL sub_FFE6ED68_my \n"
59 " B loc_FFE6F2B8 \n"
60
61 "loc_FFE6F1FC:\n"
62 " MOV R0, #1 \n"
63 " BL sub_FFE6F9E8 \n"
64 " B loc_FFE6F2B8 \n"
65
66 "loc_FFE6F208:\n"
67 " BL sub_FFE6F3B8 \n"
68 " B loc_FFE6F2B8 \n"
69
70 "loc_FFE6F210:\n"
71 " BL sub_FFE6F7E0 \n"
72 " B loc_FFE6F2B8 \n"
73
74 "loc_FFE6F218:\n"
75 " BL sub_FFE6F7F0 \n"
76 " B loc_FFE6F2B8 \n"
77
78 "loc_FFE6F220:\n"
79 " BL sub_FFE6F8F8 \n"
80 " BL sub_FFE6D0F4 \n"
81 " B loc_FFE6F2B8 \n"
82
83 "loc_FFE6F22C:\n"
84 " BL sub_FFE6EE74 \n"
85 " B loc_FFE6F2B8 \n"
86
87 "loc_FFE6F234:\n"
88 " BL sub_FFE6F95C \n"
89 " BL sub_FFE6D0F4 \n"
90 " B loc_FFE6F2B8 \n"
91
92 "loc_FFE6F240:\n"
93 " BL sub_FFE6F7E0 \n"
94 " B loc_FFE6F2B8 \n"
95
96 "loc_FFE6F248:\n"
97 " BL sub_FFE70F48 \n"
98 " B loc_FFE6F2B8 \n"
99
100 "loc_FFE6F250:\n"
101 " BL sub_FFE71114 \n"
102 " B loc_FFE6F2B8 \n"
103
104 "loc_FFE6F258:\n"
105 " BL sub_FFE711A8 \n"
106 " B loc_FFE6F2B8 \n"
107
108 "loc_FFE6F260:\n"
109 " BL sub_FFE712A4 \n"
110 " B loc_FFE6F2B8 \n"
111
112 "loc_FFE6F268:\n"
113 " MOV R0, #0 \n"
114 " BL sub_FFE71510 \n"
115 " B loc_FFE6F2B8 \n"
116
117 "loc_FFE6F274:\n"
118 " BL sub_FFE716C8 \n"
119 " B loc_FFE6F2B8 \n"
120
121 "loc_FFE6F27C:\n"
122 " BL sub_FFE7175C \n"
123 " B loc_FFE6F2B8 \n"
124
125 "loc_FFE6F284:\n"
126 " BL sub_FFE71818 \n"
127 " B loc_FFE6F2B8 \n"
128
129 "loc_FFE6F28C:\n"
130 " BL sub_FFE6FB3C \n"
131 " BL sub_FFE6EC8C \n"
132 " B loc_FFE6F2B8 \n"
133
134 "loc_FFE6F298:\n"
135 " BL sub_FFE713E4 \n"
136 " B loc_FFE6F2B8 \n"
137
138 "loc_FFE6F2A0:\n"
139 " BL sub_FFE71440 \n"
140 " B loc_FFE6F2B8 \n"
141
142 "loc_FFE6F2A8:\n"
143 " MOV R1, #0x4C0 \n"
144 " LDR R0, =0xFFE6EAE8 /*'SsShootTask.c'*/ \n"
145 " ADD R1, R1, #0xE \n"
146 " BL _DebugAssert \n"
147
148 "loc_FFE6F2B8:\n"
149 " LDR R2, [SP] \n"
150
151 "loc_FFE6F2BC:\n"
152 " LDR R3, =0x6E2B8 \n"
153 " LDR R1, [R2, #4] \n"
154 " LDR R0, [R3] \n"
155 " BL sub_FFE81C34 /*_SetEventFlag*/ \n"
156 " LDR R0, [SP] \n"
157 " BL sub_FFE6EB68 \n"
158
159 "loc_FFE6F2D4:\n"
160 " LDR R3, =0x6E2BC \n"
161 " MOV R1, R4 \n"
162 " LDR R0, [R3] \n"
163 " MOV R2, #0 \n"
164 " BL sub_FFE8234C /*_ReceiveMessageQueue*/ \n"
165 " TST R0, #1 \n"
166 " BEQ loc_FFE6F178 \n"
167 " LDR R0, =0xFFE6EAE8 /*'SsShootTask.c'*/ \n"
168 " MOV R1, #0x400 \n"
169 " BL _DebugAssert \n"
170 " BL _ExitTask \n"
171 " ADD SP, SP, #4 \n"
172 " LDMFD SP!, {R4,PC} \n"
173 );
174 }
175
176
177
178 void __attribute__((naked,noinline)) sub_FFE6ED68_my() {
179 asm volatile (
180 " STMFD SP!, {R4,LR} \n"
181 " LDR R4, [R0, #0xC] \n"
182 " LDR R3, [R4, #8] \n"
183 " ORR R3, R3, #1 \n"
184 " STR R3, [R4, #8] \n"
185 " MOV R0, #0xC \n"
186 " BL sub_FFE78BA4 \n"
187 " TST R0, #1 \n"
188 " MOV R0, #1 \n"
189 " MOV R2, R4 \n"
190 " MOV R1, R0 \n"
191 " BEQ loc_FFE6EDAC \n"
192 " LDR R3, [R4, #8] \n"
193 " ORR R3, R3, #0x40000000 \n"
194 " STR R3, [R4, #8] \n"
195 " LDMFD SP!, {R4,LR} \n"
196 " B sub_FFE6D604 \n"
197
198 "loc_FFE6EDAC:\n"
199 " BL sub_FFE6F800 \n"
200 " MOV R0, R4 \n"
201 " BL sub_FFE70834 \n"
202 " TST R0, #1 \n"
203 " MOV R2, R4 \n"
204 " MOV R1, #1 \n"
205 " BEQ loc_FFE6EDD0 \n"
206 " LDMFD SP!, {R4,LR} \n"
207 " B sub_FFE6D604 \n"
208
209 "loc_FFE6EDD0:\n"
210 " BL sub_FFC0B998 \n"
211 " STR R0, [R4, #0x14] \n"
212 " MOV R0, R4 \n"
213 " BL sub_FFE71BC4 \n"
214 " BL sub_FFE72570 \n"
215 " MOV R0, R4 \n"
216 " BL sub_FFE71CDC_my \n"
217 " BL capt_seq_hook_raw_here\n"
218 " MOV R1, #1 \n"
219 " MOV R2, R4 \n"
220 " BL sub_FFE6D604 \n"
221 " BL sub_FFE72010 \n"
222 " CMP R0, #0 \n"
223 " LDRNE R3, [R4, #8] \n"
224 " ORRNE R3, R3, #0x2000 \n"
225 " STRNE R3, [R4, #8] \n"
226 " LDMFD SP!, {R4,PC} \n"
227 );
228 }
229
230
231
232 void __attribute__((naked,noinline)) sub_FFE71CDC_my() {
233 asm volatile (
234 " STMFD SP!, {R4,LR} \n"
235 " MOV R4, R0 \n"
236 " SUB SP, SP, #0xC \n"
237 " BL sub_FFE72704 \n"
238 " MVN R1, #0 \n"
239 " BL sub_FFE81DD0 /*_ClearEventFlag*/ \n"
240 " MOV R0, #0x8A \n"
241 " ADD R1, SP, #4 \n"
242 " MOV R2, #4 \n"
243 " BL _GetPropertyCase \n"
244 " TST R0, #1 \n"
245 " BEQ loc_FFE71D1C \n"
246 " MOV R1, #0x1D0 \n"
247 " LDR R0, =0xFFE71B60 /*'SsCaptureSeq.c'*/ \n"
248 " ADD R1, R1, #2 \n"
249 " BL _DebugAssert \n"
250
251 "loc_FFE71D1C:\n"
252 " LDR R3, =0x94240 \n"
253 " LDR R2, =0x94300 \n"
254 " LDR R0, [R3, #0x74] \n"
255 " LDRSH R1, [R2, #0xE] \n"
256 " BL sub_FFDCBF04 \n"
257 " MOV R0, R4 \n"
258 " BL sub_FFE71AE4 \n"
259 " BL wait_until_remote_button_is_released\n"
260 " BL capt_seq_hook_set_nr\n"
261 " LDR PC, =0xFFE71D38 \n"
262 );
263 }
264
265
266
267 void __attribute__((naked,noinline)) exp_drv_task() {
268 asm volatile (
269 " STMFD SP!, {R4-R8,LR} \n"
270 " SUB SP, SP, #0x20 \n"
271 " ADD R7, SP, #4 \n"
272 " B loc_FFD1319C \n"
273
274 "loc_FFD12CA8:\n"
275 " CMP R2, #0x22 \n"
276 " BNE loc_FFD12CC0 \n"
277 " LDR R0, [R12, #0x8C] \n"
278 " MOV LR, PC \n"
279 " LDR PC, [R12, #0x88] \n"
280 " B loc_FFD12D24 \n"
281
282 "loc_FFD12CC0:\n"
283 " CMP R2, #0x1D \n"
284 " BNE loc_FFD12CD4 \n"
285 " MOV R0, R12 \n"
286 " BL sub_FFD12B68 \n"
287 " B loc_FFD12D14 \n"
288
289 "loc_FFD12CD4:\n"
290 " CMP R2, #0x1E \n"
291 " BNE loc_FFD12CE8 \n"
292 " MOV R0, R12 \n"
293 " BL sub_FFD12BC4 \n"
294 " B loc_FFD12D14 \n"
295
296 "loc_FFD12CE8:\n"
297 " SUB R3, R2, #0x1F \n"
298 " CMP R3, #1 \n"
299 " BHI loc_FFD12D00 \n"
300 " MOV R0, R12 \n"
301 " BL sub_FFD12C20 \n"
302 " B loc_FFD12D14 \n"
303
304 "loc_FFD12D00:\n"
305 " CMP R2, #0x21 \n"
306 " BNE loc_FFD12D30 \n"
307 " BL sub_FFCDCE18 \n"
308 " BL sub_FFCDFF50 \n"
309 " BL sub_FFCDF188 \n"
310
311 "loc_FFD12D14:\n"
312 " LDR R3, [SP, #4] \n"
313 " LDR R0, [R3, #0x8C] \n"
314 " MOV LR, PC \n"
315 " LDR PC, [R3, #0x88] \n"
316
317 "loc_FFD12D24:\n"
318 " LDR R0, [SP, #4] \n"
319 " BL sub_FFD0E834 \n"
320 " B loc_FFD1319C \n"
321
322 "loc_FFD12D30:\n"
323 " CMP R2, #0xD \n"
324 " MOV R8, #1 \n"
325 " BNE loc_FFD12DA0 \n"
326 " LDR R1, [R12, #0x7C] \n"
327 " ADD R1, R1, R1, LSL#1 \n"
328 " ADD R1, R12, R1, LSL#2 \n"
329 " ADD R6, SP, #0x14 \n"
330 " SUB R1, R1, #8 \n"
331 " MOV R2, #0xC \n"
332 " MOV R0, R6 \n"
333 " BL _memcpy \n"
334 " LDR R0, [SP, #4] \n"
335 " BL sub_FFD1116C \n"
336 " LDR R3, [SP, #4] \n"
337 " LDR R1, [R3, #0x7C] \n"
338 " LDR R2, [R3, #0x8C] \n"
339 " ADD R0, R3, #4 \n"
340 " MOV LR, PC \n"
341 " LDR PC, [R3, #0x88] \n"
342 " LDR R0, [SP, #4] \n"
343 " BL sub_FFD1143C \n"
344 " LDR R3, [SP, #4] \n"
345 " ADD R0, R3, #4 \n"
346 " LDR R1, [R3, #0x7C] \n"
347 " LDR R2, [R3, #0x94] \n"
348 " MOV LR, PC \n"
349 " LDR PC, [R3, #0x90] \n"
350 " B loc_FFD130F0 \n"
351
352 "loc_FFD12DA0:\n"
353 " SUB R3, R2, #0xE \n"
354 " CMP R3, #1 \n"
355 " BHI loc_FFD12E5C \n"
356 " ADD R6, SP, #0x14 \n"
357 " ADD R5, SP, #8 \n"
358 " MOV R0, R12 \n"
359 " MOV R1, R6 \n"
360 " MOV R2, R5 \n"
361 " BL sub_FFD11530 \n"
362 " MOV R4, R0 \n"
363 " CMP R4, #5 \n"
364 " CMPNE R4, #1 \n"
365 " BNE loc_FFD12DF4 \n"
366 " LDR R12, [SP, #4] \n"
367 " MOV R0, R5 \n"
368 " LDR R1, [R12, #0x7C] \n"
369 " MOV R2, R4 \n"
370 " LDR R3, [R12, #0x8C] \n"
371 " MOV LR, PC \n"
372 " LDR PC, [R12, #0x88] \n"
373 " B loc_FFD12E2C \n"
374
375 "loc_FFD12DF4:\n"
376 " CMP R4, #6 \n"
377 " CMPNE R4, #2 \n"
378 " BNE loc_FFD12E3C \n"
379 " LDR R12, [SP, #4] \n"
380 " MOV R0, R5 \n"
381 " MOV R1, R8 \n"
382 " MOV R2, R4 \n"
383 " LDR R3, [R12, #0x8C] \n"
384 " MOV LR, PC \n"
385 " LDR PC, [R12, #0x88] \n"
386 " MOV R1, R6 \n"
387 " LDR R0, [SP, #4] \n"
388 " MOV R2, R5 \n"
389 " BL sub_FFD127C8 \n"
390
391 "loc_FFD12E2C:\n"
392 " MOV R1, R4 \n"
393 " LDR R0, [SP, #4] \n"
394 " BL sub_FFD12AFC \n"
395 " B loc_FFD130F0 \n"
396
397 "loc_FFD12E3C:\n"
398 " LDR R12, [SP, #4] \n"
399 " MOV R2, R4 \n"
400 " ADD R0, R12, #4 \n"
401 " LDR R1, [R12, #0x7C] \n"
402 " LDR R3, [R12, #0x8C] \n"
403 " MOV LR, PC \n"
404 " LDR PC, [R12, #0x88] \n"
405 " B loc_FFD130F0 \n"
406
407 "loc_FFD12E5C:\n"
408 " SUB R3, R2, #0x19 \n"
409 " CMP R3, #1 \n"
410 " BHI loc_FFD12EB4 \n"
411 " LDR R1, [R12, #0x7C] \n"
412 " ADD R1, R1, R1, LSL#1 \n"
413 " ADD R1, R12, R1, LSL#2 \n"
414 " ADD R6, SP, #0x14 \n"
415 " SUB R1, R1, #8 \n"
416 " MOV R2, #0xC \n"
417 " MOV R0, R6 \n"
418 " BL _memcpy \n"
419 " LDR R0, [SP, #4] \n"
420 " BL sub_FFD1061C \n"
421 " LDR R3, [SP, #4] \n"
422 " ADD R0, R3, #4 \n"
423 " LDR R1, [R3, #0x7C] \n"
424 " LDR R2, [R3, #0x8C] \n"
425 " MOV LR, PC \n"
426 " LDR PC, [R3, #0x88] \n"
427 " LDR R0, [SP, #4] \n"
428 " BL sub_FFD1093C \n"
429 " B loc_FFD130F0 \n"
430
431 "loc_FFD12EB4:\n"
432 " ADD R6, SP, #0x14 \n"
433 " ADD R1, R12, #4 \n"
434 " MOV R2, #0xC \n"
435 " MOV R0, R6 \n"
436 " BL _memcpy \n"
437 " LDR R12, [SP, #4] \n"
438 " LDR R3, [R12] \n"
439 " MOV R2, R12 \n"
440 " CMP R3, #0x1C \n"
441 " LDRLS PC, [PC, R3, LSL#2] \n"
442 " B loc_FFD130DC \n"
443 " .long loc_FFD12F54 \n"
444 " .long loc_FFD12F60 \n"
445 " .long loc_FFD12F6C \n"
446 " .long loc_FFD12F6C \n"
447 " .long loc_FFD12F54 \n"
448 " .long loc_FFD12F60 \n"
449 " .long loc_FFD12F6C \n"
450 " .long loc_FFD12F6C \n"
451 " .long loc_FFD12F90 \n"
452 " .long loc_FFD12F90 \n"
453 " .long loc_FFD130B0 \n"
454 " .long loc_FFD130BC \n"
455 " .long loc_FFD130CC \n"
456 " .long loc_FFD130DC \n"
457 " .long loc_FFD130DC \n"
458 " .long loc_FFD130DC \n"
459 " .long loc_FFD12F78 \n"
460 " .long loc_FFD12F84 \n"
461 " .long loc_FFD12FA0 \n"
462 " .long loc_FFD12FAC \n"
463 " .long loc_FFD12FE4 \n"
464 " .long loc_FFD1301C \n"
465 " .long loc_FFD13054 \n"
466 " .long loc_FFD1308C \n"
467 " .long loc_FFD1308C \n"
468 " .long loc_FFD130DC \n"
469 " .long loc_FFD130DC \n"
470 " .long loc_FFD13098 \n"
471 " .long loc_FFD130A4 \n"
472
473 "loc_FFD12F54:\n"
474 " MOV R0, R2 \n"
475 " BL sub_FFD0F024 \n"
476 " B loc_FFD130D8 \n"
477
478 "loc_FFD12F60:\n"
479 " MOV R0, R2 \n"
480 " BL sub_FFD0F2C4 \n"
481 " B loc_FFD130D8 \n"
482
483 "loc_FFD12F6C:\n"
484 " MOV R0, R2 \n"
485 " BL sub_FFD0F538 \n"
486 " B loc_FFD130D8 \n"
487
488 "loc_FFD12F78:\n"
489 " MOV R0, R2 \n"
490 " BL sub_FFD0F830 \n"
491 " B loc_FFD130D8 \n"
492
493 "loc_FFD12F84:\n"
494 " MOV R0, R2 \n"
495 " BL sub_FFD0FA94 \n"
496 " B loc_FFD130D8 \n"
497
498 "loc_FFD12F90:\n"
499 " MOV R0, R2 \n"
500 " BL sub_FFD0FC98_my \n"
501 " MOV R8, #0 \n"
502 " B loc_FFD130D8 \n"
503
504 "loc_FFD12FA0:\n"
505 " MOV R0, R2 \n"
506 " BL sub_FFD0FDF8 \n"
507 " B loc_FFD130D8 \n"
508
509 "loc_FFD12FAC:\n"
510 " LDRH R1, [R2, #4] \n"
511 " LDR R3, =0x1DE78 \n"
512 " STRH R1, [SP, #0x14] \n"
513 " LDRH R1, [R3, #6] \n"
514 " STRH R1, [SP, #0x1A] \n"
515 " LDRH R1, [R3, #2] \n"
516 " STRH R1, [SP, #0x16] \n"
517 " LDRH R3, [R3, #4] \n"
518 " STRH R3, [SP, #0x18] \n"
519 " MOV R0, R2 \n"
520 " LDRH R2, [R2, #0xC] \n"
521 " STRH R2, [SP, #0x1C] \n"
522 " BL sub_FFD100F0 \n"
523 " B loc_FFD130D8 \n"
524
525 "loc_FFD12FE4:\n"
526 " MOV R0, R2 \n"
527 " LDRH R2, [R2, #4] \n"
528 " LDR R3, =0x1DE78 \n"
529 " STRH R2, [SP, #0x14] \n"
530 " LDRH R2, [R3, #8] \n"
531 " STRH R2, [SP, #0x1C] \n"
532 " LDRH R1, [R3, #2] \n"
533 " STRH R1, [SP, #0x16] \n"
534 " LDRH R2, [R3, #4] \n"
535 " STRH R2, [SP, #0x18] \n"
536 " LDRH R3, [R3, #6] \n"
537 " STRH R3, [SP, #0x1A] \n"
538 " BL sub_FFD10214 \n"
539 " B loc_FFD130D8 \n"
540
541 "loc_FFD1301C:\n"
542 " LDR R3, =0x1DE78 \n"
543 " LDRH R1, [R3] \n"
544 " STRH R1, [SP, #0x14] \n"
545 " MOV R0, R2 \n"
546 " LDRH R2, [R2, #6] \n"
547 " STRH R2, [SP, #0x16] \n"
548 " LDRH R2, [R3, #8] \n"
549 " STRH R2, [SP, #0x1C] \n"
550 " LDRH R1, [R3, #4] \n"
551 " STRH R1, [SP, #0x18] \n"
552 " LDRH R3, [R3, #6] \n"
553 " STRH R3, [SP, #0x1A] \n"
554 " BL sub_FFD102D8 \n"
555 " B loc_FFD130D8 \n"
556
557 "loc_FFD13054:\n"
558 " LDR R3, =0x1DE78 \n"
559 " LDRH R1, [R3, #6] \n"
560 " STRH R1, [SP, #0x1A] \n"
561 " LDRH R1, [R3] \n"
562 " STRH R1, [SP, #0x14] \n"
563 " LDRH R1, [R3, #2] \n"
564 " STRH R1, [SP, #0x16] \n"
565 " LDRH R3, [R3, #4] \n"
566 " STRH R3, [SP, #0x18] \n"
567 " MOV R0, R2 \n"
568 " LDRH R2, [R2, #0xC] \n"
569 " STRH R2, [SP, #0x1C] \n"
570 " BL sub_FFD10390 \n"
571 " B loc_FFD130D8 \n"
572
573 "loc_FFD1308C:\n"
574 " MOV R0, R2 \n"
575 " BL sub_FFD1043C \n"
576 " B loc_FFD130D8 \n"
577
578 "loc_FFD13098:\n"
579 " MOV R0, R2 \n"
580 " BL sub_FFD10A8C \n"
581 " B loc_FFD130D8 \n"
582
583 "loc_FFD130A4:\n"
584 " MOV R0, R2 \n"
585 " BL sub_FFD10C88 \n"
586 " B loc_FFD130D8 \n"
587
588 "loc_FFD130B0:\n"
589 " MOV R0, R2 \n"
590 " BL sub_FFD10E44 \n"
591 " B loc_FFD130D8 \n"
592
593 "loc_FFD130BC:\n"
594 " MOV R0, R2 \n"
595 " MOV R1, #0 \n"
596 " BL sub_FFD1102C \n"
597 " B loc_FFD130D8 \n"
598
599 "loc_FFD130CC:\n"
600 " MOV R0, R2 \n"
601 " MOV R1, #1 \n"
602 " BL sub_FFD1102C \n"
603
604 "loc_FFD130D8:\n"
605 " LDR R12, [SP, #4] \n"
606
607 "loc_FFD130DC:\n"
608 " ADD R0, R12, #4 \n"
609 " LDR R1, [R12, #0x7C] \n"
610 " LDR R2, [R12, #0x8C] \n"
611 " MOV LR, PC \n"
612 " LDR PC, [R12, #0x88] \n"
613
614 "loc_FFD130F0:\n"
615 " CMP R8, #1 \n"
616 " BNE loc_FFD13118 \n"
617 " LDR R1, [SP, #4] \n"
618 " LDR R3, [R1, #0x7C] \n"
619 " ADD R3, R3, R3, LSL#1 \n"
620 " ADD R1, R1, R3, LSL#2 \n"
621 " MOV R0, R6 \n"
622 " SUB R1, R1, #8 \n"
623 " BL sub_FFD0ED9C \n"
624 " B loc_FFD13194 \n"
625
626 "loc_FFD13118:\n"
627 " LDR R3, [SP, #4] \n"
628 " LDR R2, [R3] \n"
629 " CMP R2, #9 \n"
630 " BNE loc_FFD13160 \n"
631 " MOV R4, #0 \n"
632 " MOV R1, #1 \n"
633 " MOV R2, R1 \n"
634 " MOV R3, R1 \n"
635 " MOV R0, R4 \n"
636 " STR R4, [SP] \n"
637 " BL sub_FFD0ECF0 \n"
638 " MOV R1, #1 \n"
639 " MOV R0, R4 \n"
640 " MOV R2, R1 \n"
641 " MOV R3, R1 \n"
642 " STR R4, [SP] \n"
643 " BL sub_FFD0EE78 \n"
644 " B loc_FFD13194 \n"
645
646 "loc_FFD13160:\n"
647 " MOV R4, #1 \n"
648 " MOV R0, R4 \n"
649 " MOV R1, R4 \n"
650 " MOV R2, R4 \n"
651 " MOV R3, R4 \n"
652 " STR R4, [SP] \n"
653 " BL sub_FFD0ECF0 \n"
654 " MOV R0, R4 \n"
655 " MOV R1, R0 \n"
656 " MOV R2, R0 \n"
657 " MOV R3, R0 \n"
658 " STR R4, [SP] \n"
659 " BL sub_FFD0EE78 \n"
660
661 "loc_FFD13194:\n"
662 " LDR R0, [SP, #4] \n"
663 " BL sub_FFD0E834 \n"
664
665 "loc_FFD1319C:\n"
666 " LDR R3, =0x1DE6C \n"
667 " MOV R2, #0 \n"
668 " LDR R0, [R3] \n"
669 " MOV R1, R7 \n"
670 " BL sub_FFE8234C /*_ReceiveMessageQueue*/ \n"
671 " LDR R12, [SP, #4] \n"
672 " LDR R2, [R12] \n"
673 " CMP R2, #0x23 \n"
674 " BNE loc_FFD12CA8 \n"
675 " MOV R0, R12 \n"
676 " BL sub_FFD0E834 \n"
677 " LDR R3, =0x1DE68 \n"
678 " MOV R1, #1 \n"
679 " LDR R0, [R3] \n"
680 " BL sub_FFE81C34 /*_SetEventFlag*/ \n"
681 " BL _ExitTask \n"
682 " ADD SP, SP, #0x20 \n"
683 " LDMFD SP!, {R4-R8,PC} \n"
684 );
685 }
686
687
688
689 void __attribute__((naked,noinline)) sub_FFD0FC98_my() {
690 asm volatile (
691 " STMFD SP!, {R4-R6,LR} \n"
692 " LDR R3, =0x1DE68 \n"
693 " MOV R4, R0 \n"
694 " MOV R1, #0x3E \n"
695 " LDR R0, [R3] \n"
696 " BL sub_FFE81DD0 /*_ClearEventFlag*/ \n"
697 " MOV R1, #0 \n"
698 " LDRSH R0, [R4, #4] \n"
699 " BL sub_FFD0E964 \n"
700 " MOV R6, R0 \n"
701 " LDRSH R0, [R4, #6] \n"
702 " BL sub_FFD0EA30 \n"
703 " LDRSH R0, [R4, #8] \n"
704 " BL sub_FFD0EACC \n"
705 " LDRSH R0, [R4, #0xA] \n"
706 " BL sub_FFD0EB68 \n"
707 " LDRSH R0, [R4, #0xC] \n"
708 " BL sub_FFD0EC04 \n"
709 " LDR R3, [R4] \n"
710 " CMP R3, #9 \n"
711 " MOV R5, R0 \n"
712 " MOVEQ R5, #0 \n"
713 " MOVEQ R6, R5 \n"
714 " CMP R6, #1 \n"
715 " BNE loc_FFD0FD1C \n"
716 " MOV R2, #2 \n"
717 " LDRSH R0, [R4, #4] \n"
718 " LDR R1, =0xFFD0E884 \n"
719 " BL sub_FFE494DC \n"
720 " LDR R2, =0x1DEA8 \n"
721 " MOV R3, #0 \n"
722 " STR R3, [R2] \n"
723 " B loc_FFD0FD20 \n"
724
725 "loc_FFD0FD1C:\n"
726 " BL sub_FFD0ECA0 \n"
727
728 "loc_FFD0FD20:\n"
729 " STRH R0, [R4, #4] \n"
730 " CMP R5, #1 \n"
731 " BNE loc_FFD0FD40 \n"
732 " LDRSH R0, [R4, #0xC] \n"
733 " LDR R1, =0xFFD0E948 \n"
734 " MOV R2, #0x20 \n"
735 " BL sub_FFD0EFC4 \n"
736 " B loc_FFD0FD44 \n"
737
738 "loc_FFD0FD40:\n"
739 " BL sub_FFD0ECE0 \n"
740
741 "loc_FFD0FD44:\n"
742 " STRH R0, [R4, #0xC] \n"
743 " LDRSH R0, [R4, #6] \n"
744 " BL sub_FFCDCA94_my \n"
745 " LDRSH R0, [R4, #8] \n"
746 " MOV R1, #1 \n"
747 " BL sub_FFCDED48 \n"
748 " ADD R0, R4, #8 \n"
749 " MOV R1, #0 \n"
750 " BL sub_FFCDEE08 \n"
751 " LDRSH R0, [R4, #0xE] \n"
752 " BL sub_FFCFD61C \n"
753 " CMP R6, #1 \n"
754 " BNE loc_FFD0FDA8 \n"
755 " LDR R3, =0x1DE68 \n"
756 " MOV R2, #0xBB0 \n"
757 " LDR R0, [R3] \n"
758 " MOV R1, #2 \n"
759 " ADD R2, R2, #8 \n"
760 " BL sub_FFE81C24 /*_WaitForAllEventFlag*/ \n"
761 " TST R0, #1 \n"
762 " BEQ loc_FFD0FDA8 \n"
763 " MOV R1, #0x460 \n"
764 " LDR R0, =0xFFD0E7E0 /*'ExpDrv.c'*/ \n"
765 " ADD R1, R1, #2 \n"
766 " BL _DebugAssert \n"
767
768 "loc_FFD0FDA8:\n"
769 " CMP R5, #1 \n"
770 " LDMNEFD SP!, {R4-R6,PC} \n"
771 " LDR R3, =0x1DE68 \n"
772 " MOV R2, #0xBB0 \n"
773 " LDR R0, [R3] \n"
774 " MOV R1, #0x20 \n"
775 " ADD R2, R2, #8 \n"
776 " BL sub_FFE81C24 /*_WaitForAllEventFlag*/ \n"
777 " TST R0, #1 \n"
778 " LDMEQFD SP!, {R4-R6,PC} \n"
779 " MOV R1, #0x460 \n"
780 " LDR R0, =0xFFD0E7E0 /*'ExpDrv.c'*/ \n"
781 " ADD R1, R1, #7 \n"
782 " LDMFD SP!, {R4-R6,LR} \n"
783 " B _DebugAssert \n"
784 );
785 }
786
787
788
789 void __attribute__((naked,noinline)) sub_FFCDCA94_my() {
790 asm volatile (
791 " STMFD SP!, {R4,LR} \n"
792 " LDR R3, =0x593C \n"
793 " LDR R2, [R3] \n"
794 " MOV R1, #0x168 \n"
795 " MOV R3, R0, LSL#16 \n"
796 " CMP R2, #1 \n"
797 " ADD R1, R1, #3 \n"
798 " LDR R0, =0xFFCDC2B0 /*'Shutter.c'*/ \n"
799 " MOV R4, R3, ASR#16 \n"
800 " BEQ loc_FFCDCAC0 \n"
801 " BL _DebugAssert \n"
802
803 "loc_FFCDCAC0:\n"
804 " MOV R1, #0x170 \n"
805 " CMN R4, #0xC00 \n"
806 " LDR R3, =0x11A7E \n"
807 " LDR R0, =0xFFCDC2B0 /*'Shutter.c'*/ \n"
808 " ADD R1, R1, #1 \n"
809 " LDREQSH R4, [R3] \n"
810 " LDRNE R3, =0x11A7E \n"
811 " CMN R4, #0xC00 \n"
812 " STRH R4, [R3] \n"
813 " BNE loc_FFCDCAEC \n"
814 " BL _DebugAssert \n"
815
816 "loc_FFCDCAEC:\n"
817 " MOV R0, R4 \n"
818 " BL apex2us \n"
819 " LDR PC, =0xFFCDCAF4 \n"
820 );
821 }