root/platform/s110/sub/101b/capt_seq.c

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DEFINITIONS

This source file includes following definitions.
  1. block_sv_cooking
  2. capt_seq_task
  3. sub_F80C1C0C_my
  4. sub_F826747C_my
  5. exp_drv_task
  6. sub_F8109B08_my
  7. sub_F80F7290_my

   1 /*
   2  * capt_seq.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 
   8 #define USE_STUBS_NRFLAG 1          // see stubs_entry.S
   9 #define NR_AUTO (0)                 // have to explictly reset value back to 0 to enable auto
  10 #define PAUSE_FOR_FILE_COUNTER 300  // Enable delay in capt_seq_hook_raw_here to ensure file counter is updated
  11 
  12 #include "../../../generic/capt_seq.c"
  13 
  14 void __attribute__((naked,noinline)) block_sv_cooking()
  15 {
  16     // On G1X (possibly others), when Tv >= 1s and ISO >= 400, then the camera shoots at 1/2 ISO and cooks the JPG/CR2 image data to compensate
  17     // Setting this property blocks the firmware from doing this.
  18 asm volatile (
  19 "    MOV     R2, #2 \n"
  20 "    ADD     R1, PC, #4 \n"
  21 "    MOV     R0, #77 \n"
  22 "    B       _SetPropertyCase \n"
  23 "    .word   1 \n"
  24 );
  25 }
  26 
  27 /*************************************************************/
  28 //** capt_seq_task @ 0xF80C1810 - 0xF80C1AF0, length=185
  29 void __attribute__((naked,noinline)) capt_seq_task() {
  30 asm volatile (
  31 "    STMFD   SP!, {R3-R7,LR} \n"
  32 "    LDR     R4, =0xA31F0 \n"
  33 "    LDR     R7, =0x3EC8 \n"
  34 "    MOV     R6, #0 \n"
  35 
  36 "loc_F80C1820:\n"
  37 "    LDR     R0, [R7, #4] \n"
  38 "    MOV     R2, #0 \n"
  39 "    MOV     R1, SP \n"
  40 "    BL      sub_0068F164 /*_ReceiveMessageQueue*/ \n"
  41 "    TST     R0, #1 \n"
  42 "    BEQ     loc_F80C184C \n"
  43 "    LDR     R1, =0x491 \n"
  44 "    LDR     R0, =0xF80C1188 /*'SsShootTask.c'*/ \n"
  45 "    BL      _DebugAssert \n"
  46 "    BL      _ExitTask \n"
  47 "    LDMFD   SP!, {R3-R7,PC} \n"
  48 
  49 "loc_F80C184C:\n"
  50 "    LDR     R0, [SP] \n"
  51 "    LDR     R1, [R0] \n"
  52 "    CMP     R1, #0x27 \n"
  53 "    ADDCC   PC, PC, R1, LSL#2 \n"
  54 "    B       loc_F80C1AB8 \n"
  55 "    B       loc_F80C18FC \n"
  56 "    B       loc_F80C1914 \n"
  57 "    B       loc_F80C1920 \n"
  58 "    B       loc_F80C1934 \n"
  59 "    B       loc_F80C192C \n"
  60 "    B       loc_F80C1940 \n"
  61 "    B       loc_F80C1948 \n"
  62 "    B       loc_F80C1950 \n"
  63 "    B       loc_F80C196C \n"
  64 "    B       loc_F80C19C0 \n"
  65 "    B       loc_F80C1978 \n"
  66 "    B       loc_F80C1984 \n"
  67 "    B       loc_F80C198C \n"
  68 "    B       loc_F80C19A8 \n"
  69 "    B       loc_F80C19B0 \n"
  70 "    B       loc_F80C19B8 \n"
  71 "    B       loc_F80C19C8 \n"
  72 "    B       loc_F80C19D0 \n"
  73 "    B       loc_F80C19D8 \n"
  74 "    B       loc_F80C19E0 \n"
  75 "    B       loc_F80C19E8 \n"
  76 "    B       loc_F80C19F0 \n"
  77 "    B       loc_F80C19F8 \n"
  78 "    B       loc_F80C1A00 \n"
  79 "    B       loc_F80C1A08 \n"
  80 "    B       loc_F80C1A10 \n"
  81 "    B       loc_F80C1A1C \n"
  82 "    B       loc_F80C1A24 \n"
  83 "    B       loc_F80C1A30 \n"
  84 "    B       loc_F80C1A38 \n"
  85 "    B       loc_F80C1A40 \n"
  86 "    B       loc_F80C1A48 \n"
  87 "    B       loc_F80C1A50 \n"
  88 "    B       loc_F80C1A58 \n"
  89 "    B       loc_F80C1A60 \n"
  90 "    B       loc_F80C1A6C \n"
  91 "    B       loc_F80C1A74 \n"
  92 "    B       loc_F80C1A80 \n"
  93 "    B       loc_F80C1AC4 \n"
  94 
  95 "loc_F80C18FC:\n"
  96 "    BL      shooting_expo_iso_override\n"      // added
  97 "    BL      block_sv_cooking\n"                // added
  98 "    BL      sub_F80C20A0 \n"
  99 "    BL      shooting_expo_param_override\n"    // added
 100 "    BL      block_sv_cooking\n"                // added
 101 "    BL      sub_F80BE994 \n"
 102 "    MOV     R0, #0\n"                          // added
 103 "    STR     R0, [R4,#0x28]\n"                  // added, fixes overrides  behavior at short shutter press (from S95)
 104 //"  LDR     R0, [R4, #0x28] \n"  // above patch makes these three lines redundant
 105 //"  CMP     R0, #0 \n"
 106 //"  BLNE    _sub_F82676F4 \n"
 107 "    B       loc_F80C1AC4 \n"
 108 
 109 "loc_F80C1914:\n"
 110 "    LDR     R0, [R0, #0x10] \n"
 111 "    BL      sub_F80C1C0C_my \n"  // --> Patched. Old value = 0xF80C1C0C.
 112 "    B       loc_F80C1AC4 \n"
 113 
 114 "loc_F80C1920:\n"
 115 "    MOV     R0, #1 \n"
 116 "    BL      sub_F80C23DC \n"
 117 "    B       loc_F80C1AC4 \n"
 118 
 119 "loc_F80C192C:\n"
 120 "    BL      sub_F80C1D58 \n"
 121 "    B       loc_F80C1938 \n"
 122 
 123 "loc_F80C1934:\n"
 124 "    BL      sub_F80C2080 \n"
 125 
 126 "loc_F80C1938:\n"
 127 "    STR     R6, [R4, #0x28] \n"
 128 "    B       loc_F80C1AC4 \n"
 129 
 130 "loc_F80C1940:\n"
 131 "    BL      sub_F80C2088 \n"
 132 "    B       loc_F80C1AC4 \n"
 133 
 134 "loc_F80C1948:\n"
 135 "    BL      sub_F80C22B4 \n"
 136 "    B       loc_F80C1970 \n"
 137 
 138 "loc_F80C1950:\n"
 139 "    LDR     R5, [R0, #0x10] \n"
 140 "    MOV     R0, R5 \n"
 141 "    BL      sub_F82677C0 \n"
 142 "    MOV     R2, R5 \n"
 143 "    MOV     R1, #9 \n"
 144 "    BL      sub_F80BF418 \n"
 145 "    B       loc_F80C1AC4 \n"
 146 
 147 "loc_F80C196C:\n"
 148 "    BL      sub_F80C2344 \n"
 149 
 150 "loc_F80C1970:\n"
 151 "    BL      sub_F80BE994 \n"
 152 "    B       loc_F80C1AC4 \n"
 153 
 154 "loc_F80C1978:\n"
 155 "    LDR     R0, [R4, #0x58] \n"
 156 "    BL      sub_F80C2ED4 \n"
 157 "    B       loc_F80C1AC4 \n"
 158 
 159 "loc_F80C1984:\n"
 160 "    BL      sub_F80C326C \n"
 161 "    B       loc_F80C1AC4 \n"
 162 
 163 "loc_F80C198C:\n"
 164 "    LDRH    R0, [R4] \n"
 165 "    SUB     R1, R0, #0x8200 \n"
 166 "    SUBS    R1, R1, #0x39 \n"
 167 "    MOVNE   R0, #0 \n"
 168 "    MOVEQ   R0, #1 \n"
 169 "    BL      sub_F80C32D0 \n"
 170 "    B       loc_F80C1AC4 \n"
 171 
 172 "loc_F80C19A8:\n"
 173 "    BL      sub_F80C34B8 \n"
 174 "    B       loc_F80C1AC4 \n"
 175 
 176 "loc_F80C19B0:\n"
 177 "    BL      sub_F80C392C \n"
 178 "    B       loc_F80C1AC4 \n"
 179 
 180 "loc_F80C19B8:\n"
 181 "    BL      sub_F80C39E0 \n"
 182 "    B       loc_F80C1AC4 \n"
 183 
 184 "loc_F80C19C0:\n"
 185 "    BL      sub_F80C2080 \n"
 186 "    B       loc_F80C1AC4 \n"
 187 
 188 "loc_F80C19C8:\n"
 189 "    BL      sub_F8265508 \n"
 190 "    B       loc_F80C1AC4 \n"
 191 
 192 "loc_F80C19D0:\n"
 193 "    BL      sub_F826573C \n"
 194 "    B       loc_F80C1AC4 \n"
 195 
 196 "loc_F80C19D8:\n"
 197 "    BL      sub_F82657F4 \n"
 198 "    B       loc_F80C1AC4 \n"
 199 
 200 "loc_F80C19E0:\n"
 201 "    BL      sub_F82658A8 \n"
 202 "    B       loc_F80C1AC4 \n"
 203 
 204 "loc_F80C19E8:\n"
 205 "    BL      sub_F82659A8 \n"
 206 "    B       loc_F80C1AC4 \n"
 207 
 208 "loc_F80C19F0:\n"
 209 "    MOV     R0, #0 \n"
 210 "    B       loc_F80C1A14 \n"
 211 
 212 "loc_F80C19F8:\n"
 213 "    BL      sub_F8265BDC \n"
 214 "    B       loc_F80C1AC4 \n"
 215 
 216 "loc_F80C1A00:\n"
 217 "    BL      sub_F8265C70 \n"
 218 "    B       loc_F80C1AC4 \n"
 219 
 220 "loc_F80C1A08:\n"
 221 "    BL      sub_F8265D18 \n"
 222 "    B       loc_F80C1AC4 \n"
 223 
 224 "loc_F80C1A10:\n"
 225 "    MOV     R0, #1 \n"
 226 
 227 "loc_F80C1A14:\n"
 228 "    BL      sub_F8265A78 \n"
 229 "    B       loc_F80C1AC4 \n"
 230 
 231 "loc_F80C1A1C:\n"
 232 "    BL      sub_F80C25F0 \n"
 233 "    B       loc_F80C1AC4 \n"
 234 
 235 "loc_F80C1A24:\n"
 236 "    BL      sub_F80C2684 \n"
 237 "    BL      sub_F8268B74 \n"
 238 "    B       loc_F80C1AC4 \n"
 239 
 240 "loc_F80C1A30:\n"
 241 "    BL      sub_F80C294C \n"
 242 "    B       loc_F80C1AC4 \n"
 243 
 244 "loc_F80C1A38:\n"
 245 "    BL      sub_F80C2A84 \n"
 246 "    B       loc_F80C1AC4 \n"
 247 
 248 "loc_F80C1A40:\n"
 249 "    BL      sub_F8268C48 \n"
 250 "    B       loc_F80C1AC4 \n"
 251 
 252 "loc_F80C1A48:\n"
 253 "    BL      sub_F8036D20 \n"
 254 "    B       loc_F80C1AC4 \n"
 255 
 256 "loc_F80C1A50:\n"
 257 "    BL      sub_F80C7BA0 \n"
 258 "    B       loc_F80C1AC4 \n"
 259 
 260 "loc_F80C1A58:\n"
 261 "    BL      sub_F80C7CA0 \n"
 262 "    B       loc_F80C1AC4 \n"
 263 
 264 "loc_F80C1A60:\n"
 265 "    LDR     R0, [R0, #0xC] \n"
 266 "    BL      sub_F8265E20 \n"
 267 "    B       loc_F80C1AC4 \n"
 268 
 269 "loc_F80C1A6C:\n"
 270 "    BL      sub_F8265E90 \n"
 271 "    B       loc_F80C1AC4 \n"
 272 
 273 "loc_F80C1A74:\n"
 274 "    BL      sub_F80C7E2C \n"
 275 "    BL      sub_F80C7CF8 \n"
 276 "    B       loc_F80C1AC4 \n"
 277 
 278 "loc_F80C1A80:\n"
 279 "    MOV     R0, #1 \n"
 280 "    BL      sub_F8267FF0 \n"
 281 "    MOV     R0, #1 \n"
 282 "    BL      sub_F8268124 \n"
 283 "    LDRH    R0, [R4, #0xA4] \n"
 284 "    CMP     R0, #4 \n"
 285 "    LDRNEH  R0, [R4] \n"
 286 "    SUBNE   R1, R0, #0x4200 \n"
 287 "    SUBNES  R1, R1, #0x2E \n"
 288 "    BNE     loc_F80C1AC4 \n"
 289 "    BL      sub_F80C7CA0 \n"
 290 "    BL      sub_F80C8544 \n"
 291 "    BL      sub_F80C824C \n"
 292 "    B       loc_F80C1AC4 \n"
 293 
 294 "loc_F80C1AB8:\n"
 295 "    LDR     R1, =0x5F2 \n"
 296 "    LDR     R0, =0xF80C1188 /*'SsShootTask.c'*/ \n"
 297 "    BL      _DebugAssert \n"
 298 
 299 "loc_F80C1AC4:\n"
 300 "    LDR     R0, [SP] \n"
 301 "    LDR     R1, [R0, #4] \n"
 302 "    LDR     R0, [R7] \n"
 303 "    BL      sub_0068EED4 /*_SetEventFlag*/ \n"
 304 "    LDR     R5, [SP] \n"
 305 "    LDR     R0, [R5, #8] \n"
 306 "    CMP     R0, #0 \n"
 307 "    LDREQ   R1, =0x117 \n"
 308 "    LDREQ   R0, =0xF80C1188 /*'SsShootTask.c'*/ \n"
 309 "    BLEQ    _DebugAssert \n"
 310 "    STR     R6, [R5, #8] \n"
 311 "    B       loc_F80C1820 \n"
 312 );
 313 }
 314 
 315 /*************************************************************/
 316 //** sub_F80C1C0C_my @ 0xF80C1C0C - 0xF80C1CAC, length=41
 317 void __attribute__((naked,noinline)) sub_F80C1C0C_my() {
 318 asm volatile (
 319 "    STMFD   SP!, {R4-R6,LR} \n"
 320 "    LDR     R5, =0xA31F0 \n"
 321 "    MOV     R6, R0 \n"
 322 "    LDR     R0, [R5, #0x28] \n"
 323 "    CMP     R0, #0 \n"
 324 "    BNE     loc_F80C1C5C \n"
 325 "    LDR     R0, [R5, #0x94] \n"
 326 "    TST     R0, #0x30 \n"
 327 "    BLNE    sub_F80C6488 \n"
 328 "    BL      sub_F80C5F50 \n"
 329 "    MOV     R1, R6 \n"
 330 "    BL      sub_F80C5FA8 \n"
 331 "    LDR     R0, =0x10F \n"
 332 "    MOV     R2, #4 \n"
 333 "    ADD     R1, R6, #0x78 \n"
 334 "    BL      _SetPropertyCase \n"
 335 "    MOV     R2, #4 \n"
 336 "    ADD     R1, R6, #0x7C \n"
 337 "    MOV     R0, #0x2C \n"
 338 "    BL      _SetPropertyCase \n"
 339 
 340 "loc_F80C1C5C:\n"
 341 "    LDR     R0, [R5, #0x94] \n"
 342 "    TST     R0, #0x20 \n"
 343 "    MOV     R0, R6 \n"
 344 "    BEQ     loc_F80C1C74 \n"
 345 "    BL      sub_F82685BC \n"
 346 "    B       loc_F80C1C78 \n"
 347 
 348 "loc_F80C1C74:\n"
 349 "    BL      sub_F826747C_my \n"  // --> Patched. Old value = 0xF826747C.
 350 "    BL      capt_seq_hook_raw_here \n" // +++
 351 
 352 "loc_F80C1C78:\n"
 353 "    MOV     R4, R0 \n"
 354 "    MOV     R2, R6 \n"
 355 "    MOV     R1, #1 \n"
 356 "    BL      sub_F80BF418 \n"
 357 "    TST     R4, #1 \n"
 358 "    LDMNEFD SP!, {R4-R6,PC} \n"
 359 "    MOV     R0, R6 \n"
 360 "    BL      sub_F8266438 \n"
 361 "    LDR     R0, [R5, #0x94] \n"
 362 "    TST     R0, #2 \n"
 363 "    LDMEQFD SP!, {R4-R6,PC} \n"
 364 "    MOV     R0, R6 \n"
 365 "    LDMFD   SP!, {R4-R6,LR} \n"
 366 "    B       sub_F80BF5C0 \n"
 367 );
 368 }
 369 
 370 /*************************************************************/
 371 //** sub_F826747C_my @ 0xF826747C - 0xF82676F0, length=158
 372 void __attribute__((naked,noinline)) sub_F826747C_my() {
 373 asm volatile (
 374 "    STMFD   SP!, {R3-R7,LR} \n"
 375 "    LDR     R6, =0xA31F0 \n"
 376 "    MOV     R4, R0 \n"
 377 "    LDR     R0, [R6, #0x28] \n"
 378 "    LDR     R5, =0x420D \n"
 379 "    CMP     R0, #0 \n"
 380 "    MOV     R7, #0 \n"
 381 "    BNE     loc_F8267520 \n"
 382 "    LDR     R1, [R6, #0x94] \n"
 383 "    TST     R1, #6 \n"
 384 "    BNE     loc_F82674BC \n"
 385 "    MOV     R0, #0xC \n"
 386 "    BL      sub_F80CA308 \n"
 387 "    TST     R0, #1 \n"
 388 "    BEQ     loc_F8267520 \n"
 389 "    B       loc_F8267518 \n"
 390 
 391 "loc_F82674BC:\n"
 392 "    LDRH    R0, [R6] \n"
 393 "    CMP     R0, R5 \n"
 394 "    LDRNEH  R0, [R6, #0xA2] \n"
 395 "    CMPNE   R0, #3 \n"
 396 "    LDRNE   R0, [R4, #8] \n"
 397 "    CMPNE   R0, #1 \n"
 398 "    BLS     loc_F8267500 \n"
 399 "    LDRH    R0, [R6, #0x9E] \n"
 400 "    CMP     R0, #3 \n"
 401 "    BNE     loc_F82674EC \n"
 402 "    TST     R1, #2 \n"
 403 "    BNE     loc_F8267520 \n"
 404 
 405 "loc_F82674EC:\n"
 406 "    BL      sub_F801F980 \n"
 407 "    TST     R0, #1 \n"
 408 "    BEQ     loc_F8267520 \n"
 409 "    BL      sub_F80CA370 \n"
 410 "    B       loc_F8267518 \n"
 411 
 412 "loc_F8267500:\n"
 413 "    MOV     R0, #0xC \n"
 414 "    BL      sub_F80CA308 \n"
 415 "    TST     R0, #1 \n"
 416 "    BEQ     loc_F8267520 \n"
 417 "    BL      sub_F8267E6C \n"
 418 "    BL      sub_F80BF034 \n"
 419 
 420 "loc_F8267518:\n"
 421 "    MOV     R0, #1 \n"
 422 "    LDMFD   SP!, {R3-R7,PC} \n"
 423 
 424 "loc_F8267520:\n"
 425 "    MOV     R0, R4 \n"
 426 "    BL      sub_F8268CBC \n"
 427 "    BL      sub_F80C2090 \n"
 428 "    LDR     R0, [R6, #0x28] \n"
 429 "    CMP     R0, #0 \n"
 430 "    BNE     loc_F82676DC \n"
 431 "    MOV     R0, R4 \n"
 432 "    BL      sub_F8266324 \n"
 433 "    TST     R0, #1 \n"
 434 "    LDMNEFD SP!, {R3-R7,PC} \n"
 435 "    LDR     R0, [R6, #0x94] \n"
 436 "    AND     R0, R0, #0x40 \n"
 437 "    CMP     R0, #0 \n"
 438 "    LDRNEH  R0, [R6] \n"
 439 "    CMPNE   R0, R5 \n"
 440 "    LDRNEH  R0, [R6, #0xA2] \n"
 441 "    CMPNE   R0, #3 \n"
 442 "    LDRNE   R0, [R4, #8] \n"
 443 "    CMPNE   R0, #1 \n"
 444 "    BLS     loc_F826758C \n"
 445 "    BL      sub_F82682E4 \n"
 446 "    MOV     R3, #0xB3 \n"
 447 "    STR     R3, [SP] \n"
 448 "    LDR     R2, =0x3A98 \n"
 449 "    LDR     R3, =0xF826779C /*'SsCaptureSeq.c'*/ \n"
 450 "    MOV     R1, #0x8000 \n"
 451 "    BL      sub_F80CA580 \n"
 452 
 453 "loc_F826758C:\n"
 454 "    LDR     R0, [R6, #0x94] \n"
 455 "    AND     R0, R0, #4 \n"
 456 "    CMP     R0, #0 \n"
 457 "    LDRNEH  R0, [R6] \n"
 458 "    CMPNE   R0, R5 \n"
 459 "    LDRNEH  R0, [R6, #0xA2] \n"
 460 "    CMPNE   R0, #3 \n"
 461 "    LDRNE   R0, [R4, #8] \n"
 462 "    CMPNE   R0, #1 \n"
 463 "    BLS     loc_F82675C0 \n"
 464 "    LDR     R0, [R6, #0x98] \n"
 465 "    CMP     R0, #2 \n"
 466 "    BNE     loc_F82675CC \n"
 467 
 468 "loc_F82675C0:\n"
 469 "    MOV     R0, R4 \n"
 470 "    BL      sub_F826685C \n"
 471 "    BL      sub_F8267DB0 \n"
 472 
 473 //begin patch
 474 "    BL      wait_until_remote_button_is_released\n" // +++
 475 "    BL      capt_seq_hook_set_nr\n" // +++
 476 //end patch
 477 
 478 "loc_F82675CC:\n"
 479 "    LDRH    R0, [R6] \n"
 480 "    CMP     R0, R5 \n"
 481 "    LDRNEH  R0, [R6, #0xA2] \n"
 482 "    CMPNE   R0, #3 \n"
 483 "    LDRNE   R0, [R4, #8] \n"
 484 "    CMPNE   R0, #1 \n"
 485 "    MOVLS   R0, #4 \n"
 486 "    BLLS    sub_F81753B8 \n"
 487 "    LDR     R0, [R6, #0x94] \n"
 488 "    TST     R0, #4 \n"
 489 "    BEQ     loc_F8267624 \n"
 490 "    LDR     R0, [R6, #0x98] \n"
 491 "    CMP     R0, #2 \n"
 492 "    BNE     loc_F8267624 \n"
 493 "    LDRH    R0, [R6] \n"
 494 "    CMP     R0, R5 \n"
 495 "    LDRNEH  R0, [R6, #0xA2] \n"
 496 "    CMPNE   R0, #3 \n"
 497 "    LDRNE   R0, [R4, #8] \n"
 498 "    CMPNE   R0, #1 \n"
 499 "    MOVLS   R0, #3 \n"
 500 "    BLLS    sub_F81753B8 \n"
 501 
 502 "loc_F8267624:\n"
 503 "    LDR     R0, [R6, #0x94] \n"
 504 "    TST     R0, #0x40 \n"
 505 "    BEQ     loc_F826768C \n"
 506 "    LDR     R0, =0x181 \n"
 507 "    MOV     R2, #4 \n"
 508 "    MOV     R1, SP \n"
 509 "    BL      _GetPropertyCase \n"
 510 "    TST     R0, #1 \n"
 511 "    MOVNE   R1, #0xD4 \n"
 512 "    LDRNE   R0, =0xF826779C /*'SsCaptureSeq.c'*/ \n"
 513 "    BLNE    _DebugAssert \n"
 514 "    LDR     R0, [SP] \n"
 515 "    CMP     R0, #0 \n"
 516 "    BNE     loc_F826766C \n"
 517 "    BL      sub_F82682E4 \n"
 518 "    MOV     R1, #0x8000 \n"
 519 "    BL      sub_0068EED4 /*_SetEventFlag*/ \n"
 520 "    B       loc_F826768C \n"
 521 
 522 "loc_F826766C:\n"
 523 "    BL      sub_F82682E4 \n"
 524 "    MOV     R1, #0x8000 \n"
 525 "    BL      sub_0068EF08 /*_ClearEventFlag*/ \n"
 526 "    LDR     R2, =0xF8267468 \n"
 527 "    LDR     R0, [SP] \n"
 528 "    MOV     R3, #0x8000 \n"
 529 "    MOV     R1, R2 \n"
 530 "    BL      sub_F8039EA8 /*_SetTimerAfter*/ \n"
 531 
 532 "loc_F826768C:\n"
 533 "    LDR     R0, [R6, #0x94] \n"
 534 "    AND     R0, R0, #6 \n"
 535 "    CMP     R0, #0 \n"
 536 "    LDRNEH  R0, [R6] \n"
 537 "    CMPNE   R0, R5 \n"
 538 "    LDRNEH  R0, [R6, #0xA2] \n"
 539 "    CMPNE   R0, #3 \n"
 540 "    LDRNE   R0, [R4, #8] \n"
 541 "    CMPNE   R0, #1 \n"
 542 "    MOVLS   R0, #2 \n"
 543 "    BLLS    sub_F80CBB48 \n"
 544 "    LDR     R0, [R6, #0x94] \n"
 545 "    TST     R0, #0x10 \n"
 546 "    MOV     R0, R4 \n"
 547 "    BEQ     loc_F82676D0 \n"
 548 "    BL      sub_F8454D44 \n"
 549 "    B       loc_F82676D4 \n"
 550 
 551 "loc_F82676D0:\n"
 552 "    BL      sub_F8266EA4 \n"
 553 
 554 "loc_F82676D4:\n"
 555 "    MOV     R7, R0 \n"
 556 "    B       loc_F82676EC \n"
 557 
 558 "loc_F82676DC:\n"
 559 "    LDR     R0, =0xA5F0 \n"
 560 "    LDR     R0, [R0] \n"
 561 "    CMP     R0, #0 \n"
 562 "    MOVNE   R7, #0x1D \n"
 563 
 564 "loc_F82676EC:\n"
 565 "    MOV     R0, R7 \n"
 566 "    LDMFD   SP!, {R3-R7,PC} \n"
 567 );
 568 }
 569 
 570 /*************************************************************/
 571 //** exp_drv_task @ 0xF810CFA0 - 0xF810D630, length=421
 572 void __attribute__((naked,noinline)) exp_drv_task() {
 573 asm volatile (
 574 "    STMFD   SP!, {R4-R9,LR} \n"
 575 "    SUB     SP, SP, #0x2C \n"
 576 "    LDR     R6, =0x5438 \n"
 577 "    LDR     R7, =0xBB8 \n"
 578 "    LDR     R4, =0xC3A30 \n"
 579 "    MOV     R0, #0 \n"
 580 "    ADD     R5, SP, #0x1C \n"
 581 "    STR     R0, [SP, #0xC] \n"
 582 
 583 "loc_F810CFC0:\n"
 584 "    LDR     R0, [R6, #0x20] \n"
 585 "    MOV     R2, #0 \n"
 586 "    ADD     R1, SP, #0x28 \n"
 587 "    BL      sub_0068F164 /*_ReceiveMessageQueue*/ \n"
 588 "    LDR     R0, [SP, #0xC] \n"
 589 "    CMP     R0, #1 \n"
 590 "    BNE     loc_F810D00C \n"
 591 "    LDR     R0, [SP, #0x28] \n"
 592 "    LDR     R0, [R0] \n"
 593 "    CMP     R0, #0x14 \n"
 594 "    CMPNE   R0, #0x15 \n"
 595 "    CMPNE   R0, #0x16 \n"
 596 "    CMPNE   R0, #0x17 \n"
 597 "    BEQ     loc_F810D16C \n"
 598 "    CMP     R0, #0x2A \n"
 599 "    BEQ     loc_F810D0F4 \n"
 600 "    ADD     R1, SP, #0xC \n"
 601 "    MOV     R0, #0 \n"
 602 "    BL      sub_F810CF50 \n"
 603 
 604 "loc_F810D00C:\n"
 605 "    LDR     R0, [SP, #0x28] \n"
 606 "    LDR     R1, [R0] \n"
 607 "    CMP     R1, #0x30 \n"
 608 "    BNE     loc_F810D038 \n"
 609 "    BL      sub_F810E4D4 \n"
 610 "    LDR     R0, [R6, #0x1C] \n"
 611 "    MOV     R1, #1 \n"
 612 "    BL      sub_0068EED4 /*_SetEventFlag*/ \n"
 613 "    BL      _ExitTask \n"
 614 "    ADD     SP, SP, #0x2C \n"
 615 "    LDMFD   SP!, {R4-R9,PC} \n"
 616 
 617 "loc_F810D038:\n"
 618 "    CMP     R1, #0x2F \n"
 619 "    BNE     loc_F810D054 \n"
 620 "    LDR     R2, [R0, #0x8C]! \n"
 621 "    LDR     R1, [R0, #4] \n"
 622 "    MOV     R0, R1 \n"
 623 "    BLX     R2 \n"
 624 "    B       loc_F810D628 \n"
 625 
 626 "loc_F810D054:\n"
 627 "    CMP     R1, #0x28 \n"
 628 "    BNE     loc_F810D0A4 \n"
 629 "    LDR     R0, [R6, #0x1C] \n"
 630 "    MOV     R1, #0x80 \n"
 631 "    BL      sub_0068EF08 /*_ClearEventFlag*/ \n"
 632 "    LDR     R0, =0xF810869C \n"
 633 "    MOV     R1, #0x80 \n"
 634 "    BL      sub_F8229E9C \n"
 635 "    LDR     R0, [R6, #0x1C] \n"
 636 "    MOV     R2, R7 \n"
 637 "    MOV     R1, #0x80 \n"
 638 "    BL      sub_0068EE14 /*_WaitForAllEventFlag*/ \n"
 639 "    TST     R0, #1 \n"
 640 "    LDRNE   R1, =0x1643 \n"
 641 "    BNE     loc_F810D160 \n"
 642 
 643 "loc_F810D090:\n"
 644 "    LDR     R1, [SP, #0x28] \n"
 645 "    LDR     R0, [R1, #0x90] \n"
 646 "    LDR     R1, [R1, #0x8C] \n"
 647 "    BLX     R1 \n"
 648 "    B       loc_F810D628 \n"
 649 
 650 "loc_F810D0A4:\n"
 651 "    CMP     R1, #0x29 \n"
 652 "    BNE     loc_F810D0EC \n"
 653 "    ADD     R1, SP, #0xC \n"
 654 "    BL      sub_F810CF50 \n"
 655 "    LDR     R0, [R6, #0x1C] \n"
 656 "    MOV     R1, #0x100 \n"
 657 "    BL      sub_0068EF08 /*_ClearEventFlag*/ \n"
 658 "    LDR     R0, =0xF81086AC \n"
 659 "    MOV     R1, #0x100 \n"
 660 "    BL      sub_F822AC50 \n"
 661 "    LDR     R0, [R6, #0x1C] \n"
 662 "    MOV     R2, R7 \n"
 663 "    MOV     R1, #0x100 \n"
 664 "    BL      sub_0068EE14 /*_WaitForAllEventFlag*/ \n"
 665 "    TST     R0, #1 \n"
 666 "    BEQ     loc_F810D090 \n"
 667 "    LDR     R1, =0x164D \n"
 668 "    B       loc_F810D160 \n"
 669 
 670 "loc_F810D0EC:\n"
 671 "    CMP     R1, #0x2A \n"
 672 "    BNE     loc_F810D104 \n"
 673 
 674 "loc_F810D0F4:\n"
 675 "    LDR     R0, [SP, #0x28] \n"
 676 "    ADD     R1, SP, #0xC \n"
 677 "    BL      sub_F810CF50 \n"
 678 "    B       loc_F810D090 \n"
 679 
 680 "loc_F810D104:\n"
 681 "    CMP     R1, #0x2D \n"
 682 "    BNE     loc_F810D11C \n"
 683 "    BL      sub_F80F7544 \n"
 684 "    BL      sub_F80F831C \n"
 685 "    BL      sub_F80F7E2C \n"
 686 "    B       loc_F810D090 \n"
 687 
 688 "loc_F810D11C:\n"
 689 "    CMP     R1, #0x2E \n"
 690 "    BNE     loc_F810D16C \n"
 691 "    LDR     R0, [R6, #0x1C] \n"
 692 "    MOV     R1, #4 \n"
 693 "    BL      sub_0068EF08 /*_ClearEventFlag*/ \n"
 694 "    LDR     R1, =0xF81086CC \n"
 695 "    LDR     R0, =0xFFFFF400 \n"
 696 "    MOV     R2, #4 \n"
 697 "    BL      sub_F80F6F88 \n"
 698 "    BL      sub_F80F7224 \n"
 699 "    LDR     R0, [R6, #0x1C] \n"
 700 "    MOV     R2, R7 \n"
 701 "    MOV     R1, #4 \n"
 702 "    BL      sub_0068ED30 /*_WaitForAnyEventFlag*/ \n"
 703 "    TST     R0, #1 \n"
 704 "    BEQ     loc_F810D090 \n"
 705 "    LDR     R1, =0x1675 \n"
 706 
 707 "loc_F810D160:\n"
 708 "    LDR     R0, =0xF8108E4C /*'ExpDrv.c'*/ \n"
 709 "    BL      _DebugAssert \n"
 710 "    B       loc_F810D090 \n"
 711 
 712 "loc_F810D16C:\n"
 713 "    LDR     R0, [SP, #0x28] \n"
 714 "    MOV     R8, #1 \n"
 715 "    LDR     R1, [R0] \n"
 716 "    CMP     R1, #0x12 \n"
 717 "    CMPNE   R1, #0x13 \n"
 718 "    BNE     loc_F810D1D4 \n"
 719 "    LDR     R1, [R0, #0x7C] \n"
 720 "    ADD     R1, R1, R1, LSL#1 \n"
 721 "    ADD     R1, R0, R1, LSL#2 \n"
 722 "    SUB     R1, R1, #8 \n"
 723 "    LDMIA   R1, {R2,R3,R9} \n"
 724 "    STMIA   R5, {R2,R3,R9} \n"
 725 "    BL      sub_F810B410 \n"
 726 "    LDR     R0, [SP, #0x28] \n"
 727 "    LDR     R1, [R0, #0x7C] \n"
 728 "    LDR     R3, [R0, #0x8C] \n"
 729 "    LDR     R2, [R0, #0x90] \n"
 730 "    ADD     R0, R0, #4 \n"
 731 "    BLX     R3 \n"
 732 "    LDR     R0, [SP, #0x28] \n"
 733 "    BL      sub_F810E8E0 \n"
 734 "    LDR     R0, [SP, #0x28] \n"
 735 "    LDR     R1, [R0, #0x7C] \n"
 736 "    LDR     R2, [R0, #0x98] \n"
 737 "    LDR     R3, [R0, #0x94] \n"
 738 "    B       loc_F810D4EC \n"
 739 
 740 "loc_F810D1D4:\n"
 741 "    CMP     R1, #0x14 \n"
 742 "    CMPNE   R1, #0x15 \n"
 743 "    CMPNE   R1, #0x16 \n"
 744 "    CMPNE   R1, #0x17 \n"
 745 "    BNE     loc_F810D28C \n"
 746 "    ADD     R3, SP, #0xC \n"
 747 "    MOV     R2, SP \n"
 748 "    ADD     R1, SP, #0x1C \n"
 749 "    BL      sub_F810B674 \n"
 750 "    CMP     R0, #1 \n"
 751 "    MOV     R9, R0 \n"
 752 "    CMPNE   R9, #5 \n"
 753 "    BNE     loc_F810D228 \n"
 754 "    LDR     R0, [SP, #0x28] \n"
 755 "    MOV     R2, R9 \n"
 756 "    LDR     R1, [R0, #0x7C]! \n"
 757 "    LDR     R12, [R0, #0x10]! \n"
 758 "    LDR     R3, [R0, #4] \n"
 759 "    MOV     R0, SP \n"
 760 "    BLX     R12 \n"
 761 "    B       loc_F810D260 \n"
 762 
 763 "loc_F810D228:\n"
 764 "    LDR     R0, [SP, #0x28] \n"
 765 "    CMP     R9, #2 \n"
 766 "    LDR     R3, [R0, #0x90] \n"
 767 "    CMPNE   R9, #6 \n"
 768 "    BNE     loc_F810D274 \n"
 769 "    LDR     R12, [R0, #0x8C] \n"
 770 "    MOV     R2, R9 \n"
 771 "    MOV     R1, #1 \n"
 772 "    MOV     R0, SP \n"
 773 "    BLX     R12 \n"
 774 "    LDR     R0, [SP, #0x28] \n"
 775 "    MOV     R2, SP \n"
 776 "    ADD     R1, SP, #0x1C \n"
 777 "    BL      sub_F810CC40 \n"
 778 
 779 "loc_F810D260:\n"
 780 "    LDR     R0, [SP, #0x28] \n"
 781 "    LDR     R2, [SP, #0xC] \n"
 782 "    MOV     R1, R9 \n"
 783 "    BL      sub_F810CEF0 \n"
 784 "    B       loc_F810D4F4 \n"
 785 
 786 "loc_F810D274:\n"
 787 "    LDR     R1, [R0, #0x7C] \n"
 788 "    LDR     R12, [R0, #0x8C] \n"
 789 "    MOV     R2, R9 \n"
 790 "    ADD     R0, R0, #4 \n"
 791 "    BLX     R12 \n"
 792 "    B       loc_F810D4F4 \n"
 793 
 794 "loc_F810D28C:\n"
 795 "    CMP     R1, #0x24 \n"
 796 "    CMPNE   R1, #0x25 \n"
 797 "    BNE     loc_F810D2D8 \n"
 798 "    LDR     R1, [R0, #0x7C] \n"
 799 "    ADD     R1, R1, R1, LSL#1 \n"
 800 "    ADD     R1, R0, R1, LSL#2 \n"
 801 "    SUB     R1, R1, #8 \n"
 802 "    LDMIA   R1, {R2,R3,R9} \n"
 803 "    STMIA   R5, {R2,R3,R9} \n"
 804 "    BL      sub_F810A3D8 \n"
 805 "    LDR     R0, [SP, #0x28] \n"
 806 "    LDR     R1, [R0, #0x7C] \n"
 807 "    LDR     R3, [R0, #0x8C] \n"
 808 "    LDR     R2, [R0, #0x90] \n"
 809 "    ADD     R0, R0, #4 \n"
 810 "    BLX     R3 \n"
 811 "    LDR     R0, [SP, #0x28] \n"
 812 "    BL      sub_F810A834 \n"
 813 "    B       loc_F810D4F4 \n"
 814 
 815 "loc_F810D2D8:\n"
 816 "    ADD     R1, R0, #4 \n"
 817 "    LDMIA   R1, {R2,R3,R9} \n"
 818 "    STMIA   R5, {R2,R3,R9} \n"
 819 "    LDR     R1, [R0] \n"
 820 "    CMP     R1, #0x28 \n"
 821 "    ADDCC   PC, PC, R1, LSL#2 \n"
 822 "    B       loc_F810D4DC \n"
 823 "    B       loc_F810D394 \n"
 824 "    B       loc_F810D394 \n"
 825 "    B       loc_F810D39C \n"
 826 "    B       loc_F810D3A4 \n"
 827 "    B       loc_F810D3A4 \n"
 828 "    B       loc_F810D3A4 \n"
 829 "    B       loc_F810D394 \n"
 830 "    B       loc_F810D39C \n"
 831 "    B       loc_F810D3A4 \n"
 832 "    B       loc_F810D3A4 \n"
 833 "    B       loc_F810D3BC \n"
 834 "    B       loc_F810D3BC \n"
 835 "    B       loc_F810D4C8 \n"
 836 "    B       loc_F810D4D0 \n"
 837 "    B       loc_F810D4D0 \n"
 838 "    B       loc_F810D4D0 \n"
 839 "    B       loc_F810D4D0 \n"
 840 "    B       loc_F810D4D8 \n"
 841 "    B       loc_F810D4DC \n"
 842 "    B       loc_F810D4DC \n"
 843 "    B       loc_F810D4DC \n"
 844 "    B       loc_F810D4DC \n"
 845 "    B       loc_F810D4DC \n"
 846 "    B       loc_F810D4DC \n"
 847 "    B       loc_F810D3AC \n"
 848 "    B       loc_F810D3B4 \n"
 849 "    B       loc_F810D3B4 \n"
 850 "    B       loc_F810D3B4 \n"
 851 "    B       loc_F810D3C8 \n"
 852 "    B       loc_F810D3C8 \n"
 853 "    B       loc_F810D3D0 \n"
 854 "    B       loc_F810D408 \n"
 855 "    B       loc_F810D440 \n"
 856 "    B       loc_F810D478 \n"
 857 "    B       loc_F810D4B0 \n"
 858 "    B       loc_F810D4B0 \n"
 859 "    B       loc_F810D4DC \n"
 860 "    B       loc_F810D4DC \n"
 861 "    B       loc_F810D4B8 \n"
 862 "    B       loc_F810D4C0 \n"
 863 
 864 "loc_F810D394:\n"
 865 "    BL      sub_F8108C60 \n"
 866 "    B       loc_F810D4DC \n"
 867 
 868 "loc_F810D39C:\n"
 869 "    BL      sub_F8108FA0 \n"
 870 "    B       loc_F810D4DC \n"
 871 
 872 "loc_F810D3A4:\n"
 873 "    BL      sub_F810920C \n"
 874 "    B       loc_F810D4DC \n"
 875 
 876 "loc_F810D3AC:\n"
 877 "    BL      sub_F8109504 \n"
 878 "    B       loc_F810D4DC \n"
 879 
 880 "loc_F810D3B4:\n"
 881 "    BL      sub_F8109720 \n"
 882 "    B       loc_F810D4DC \n"
 883 
 884 "loc_F810D3BC:\n"
 885 "    BL      sub_F8109B08_my \n"  // --> Patched. Old value = 0xF8109B08.
 886 "    MOV     R8, #0 \n"
 887 "    B       loc_F810D4DC \n"
 888 
 889 "loc_F810D3C8:\n"
 890 "    BL      sub_F8109C48 \n"
 891 "    B       loc_F810D4DC \n"
 892 
 893 "loc_F810D3D0:\n"
 894 "    LDRH    R1, [R0, #4] \n"
 895 "    STRH    R1, [SP, #0x1C] \n"
 896 "    LDRH    R1, [R4, #2] \n"
 897 "    STRH    R1, [SP, #0x1E] \n"
 898 "    LDRH    R1, [R4, #4] \n"
 899 "    STRH    R1, [SP, #0x20] \n"
 900 "    LDRH    R1, [R4, #6] \n"
 901 "    STRH    R1, [SP, #0x22] \n"
 902 "    LDRH    R1, [R0, #0xC] \n"
 903 "    STRH    R1, [SP, #0x24] \n"
 904 "    LDRH    R1, [R4, #0xA] \n"
 905 "    STRH    R1, [SP, #0x26] \n"
 906 "    BL      sub_F810E568 \n"
 907 "    B       loc_F810D4DC \n"
 908 
 909 "loc_F810D408:\n"
 910 "    LDRH    R1, [R0, #4] \n"
 911 "    STRH    R1, [SP, #0x1C] \n"
 912 "    LDRH    R1, [R4, #2] \n"
 913 "    STRH    R1, [SP, #0x1E] \n"
 914 "    LDRH    R1, [R4, #4] \n"
 915 "    STRH    R1, [SP, #0x20] \n"
 916 "    LDRH    R1, [R4, #6] \n"
 917 "    STRH    R1, [SP, #0x22] \n"
 918 "    LDRH    R1, [R4, #8] \n"
 919 "    STRH    R1, [SP, #0x24] \n"
 920 "    LDRH    R1, [R4, #0xA] \n"
 921 "    STRH    R1, [SP, #0x26] \n"
 922 "    BL      sub_F810E6E0 \n"
 923 "    B       loc_F810D4DC \n"
 924 
 925 "loc_F810D440:\n"
 926 "    LDRH    R1, [R4] \n"
 927 "    STRH    R1, [SP, #0x1C] \n"
 928 "    LDRH    R1, [R0, #6] \n"
 929 "    STRH    R1, [SP, #0x1E] \n"
 930 "    LDRH    R1, [R4, #4] \n"
 931 "    STRH    R1, [SP, #0x20] \n"
 932 "    LDRH    R1, [R4, #6] \n"
 933 "    STRH    R1, [SP, #0x22] \n"
 934 "    LDRH    R1, [R4, #8] \n"
 935 "    STRH    R1, [SP, #0x24] \n"
 936 "    LDRH    R1, [R4, #0xA] \n"
 937 "    STRH    R1, [SP, #0x26] \n"
 938 "    BL      sub_F810E794 \n"
 939 "    B       loc_F810D4DC \n"
 940 
 941 "loc_F810D478:\n"
 942 "    LDRH    R1, [R4] \n"
 943 "    STRH    R1, [SP, #0x1C] \n"
 944 "    LDRH    R1, [R4, #2] \n"
 945 "    STRH    R1, [SP, #0x1E] \n"
 946 "    LDRH    R1, [R4, #4] \n"
 947 "    STRH    R1, [SP, #0x20] \n"
 948 "    LDRH    R1, [R4, #6] \n"
 949 "    STRH    R1, [SP, #0x22] \n"
 950 "    LDRH    R1, [R0, #0xC] \n"
 951 "    STRH    R1, [SP, #0x24] \n"
 952 "    LDRH    R1, [R4, #0xA] \n"
 953 "    STRH    R1, [SP, #0x26] \n"
 954 "    BL      sub_F810E83C \n"
 955 "    B       loc_F810D4DC \n"
 956 
 957 "loc_F810D4B0:\n"
 958 "    BL      sub_F810A16C \n"
 959 "    B       loc_F810D4DC \n"
 960 
 961 "loc_F810D4B8:\n"
 962 "    BL      sub_F810A938 \n"
 963 "    B       loc_F810D4DC \n"
 964 
 965 "loc_F810D4C0:\n"
 966 "    BL      sub_F810AC20 \n"
 967 "    B       loc_F810D4DC \n"
 968 
 969 "loc_F810D4C8:\n"
 970 "    BL      sub_F810AEDC \n"
 971 "    B       loc_F810D4DC \n"
 972 
 973 "loc_F810D4D0:\n"
 974 "    BL      sub_F810B09C \n"
 975 "    B       loc_F810D4DC \n"
 976 
 977 "loc_F810D4D8:\n"
 978 "    BL      sub_F810B204 \n"
 979 
 980 "loc_F810D4DC:\n"
 981 "    LDR     R0, [SP, #0x28] \n"
 982 "    LDR     R1, [R0, #0x7C] \n"
 983 "    LDR     R2, [R0, #0x90] \n"
 984 "    LDR     R3, [R0, #0x8C] \n"
 985 
 986 "loc_F810D4EC:\n"
 987 "    ADD     R0, R0, #4 \n"
 988 "    BLX     R3 \n"
 989 
 990 "loc_F810D4F4:\n"
 991 "    LDR     R0, [SP, #0x28] \n"
 992 "    LDR     R0, [R0] \n"
 993 "    CMP     R0, #0x10 \n"
 994 "    BEQ     loc_F810D52C \n"
 995 "    BGT     loc_F810D51C \n"
 996 "    CMP     R0, #1 \n"
 997 "    CMPNE   R0, #4 \n"
 998 "    CMPNE   R0, #0xE \n"
 999 "    BNE     loc_F810D560 \n"
1000 "    B       loc_F810D52C \n"
1001 
1002 "loc_F810D51C:\n"
1003 "    CMP     R0, #0x13 \n"
1004 "    CMPNE   R0, #0x17 \n"
1005 "    CMPNE   R0, #0x1A \n"
1006 "    BNE     loc_F810D560 \n"
1007 
1008 "loc_F810D52C:\n"
1009 "    LDRSH   R0, [R4] \n"
1010 "    CMN     R0, #0xC00 \n"
1011 "    LDRNESH R1, [R4, #8] \n"
1012 "    CMNNE   R1, #0xC00 \n"
1013 "    STRNEH  R0, [SP, #0x1C] \n"
1014 "    STRNEH  R1, [SP, #0x24] \n"
1015 "    BNE     loc_F810D560 \n"
1016 "    ADD     R0, SP, #0x10 \n"
1017 "    BL      sub_F810EAEC \n"
1018 "    LDRH    R0, [SP, #0x10] \n"
1019 "    STRH    R0, [SP, #0x1C] \n"
1020 "    LDRH    R0, [SP, #0x18] \n"
1021 "    STRH    R0, [SP, #0x24] \n"
1022 
1023 "loc_F810D560:\n"
1024 "    LDR     R0, [SP, #0x28] \n"
1025 "    CMP     R8, #1 \n"
1026 "    BNE     loc_F810D5B0 \n"
1027 "    LDR     R1, [R0, #0x7C] \n"
1028 "    MOV     R2, #0xC \n"
1029 "    ADD     R1, R1, R1, LSL#1 \n"
1030 "    ADD     R0, R0, R1, LSL#2 \n"
1031 "    SUB     R8, R0, #8 \n"
1032 "    LDR     R0, =0xC3A30 \n"
1033 "    ADD     R1, SP, #0x1C \n"
1034 "    BL      sub_006AB658 \n"
1035 "    LDR     R0, =0xC3A3C \n"
1036 "    MOV     R2, #0xC \n"
1037 "    ADD     R1, SP, #0x1C \n"
1038 "    BL      sub_006AB658 \n"
1039 "    LDR     R0, =0xC3A48 \n"
1040 "    MOV     R2, #0xC \n"
1041 "    MOV     R1, R8 \n"
1042 "    BL      sub_006AB658 \n"
1043 "    B       loc_F810D628 \n"
1044 
1045 "loc_F810D5B0:\n"
1046 "    LDR     R0, [R0] \n"
1047 "    MOV     R3, #1 \n"
1048 "    CMP     R0, #0xB \n"
1049 "    BNE     loc_F810D5F4 \n"
1050 "    MOV     R2, #0 \n"
1051 "    STRD    R2, [SP] \n"
1052 "    MOV     R2, R3 \n"
1053 "    MOV     R1, R3 \n"
1054 "    MOV     R0, #0 \n"
1055 "    BL      sub_F8108A34 \n"
1056 "    MOV     R3, #1 \n"
1057 "    MOV     R2, #0 \n"
1058 "    STRD    R2, [SP] \n"
1059 "    MOV     R2, R3 \n"
1060 "    MOV     R1, R3 \n"
1061 "    MOV     R0, #0 \n"
1062 "    B       loc_F810D624 \n"
1063 
1064 "loc_F810D5F4:\n"
1065 "    MOV     R2, #1 \n"
1066 "    STRD    R2, [SP] \n"
1067 "    MOV     R3, R2 \n"
1068 "    MOV     R1, R2 \n"
1069 "    MOV     R0, R2 \n"
1070 "    BL      sub_F8108A34 \n"
1071 "    MOV     R3, #1 \n"
1072 "    MOV     R2, R3 \n"
1073 "    MOV     R1, R3 \n"
1074 "    MOV     R0, R3 \n"
1075 "    STR     R3, [SP] \n"
1076 "    STR     R3, [SP, #4] \n"
1077 
1078 "loc_F810D624:\n"
1079 "    BL      sub_F8108BAC \n"
1080 
1081 "loc_F810D628:\n"
1082 "    LDR     R0, [SP, #0x28] \n"
1083 "    BL      sub_F810E4D4 \n"
1084 "    B       loc_F810CFC0 \n"
1085 );
1086 }
1087 
1088 /*************************************************************/
1089 //** sub_F8109B08_my @ 0xF8109B08 - 0xF8109C44, length=80
1090 void __attribute__((naked,noinline)) sub_F8109B08_my() {
1091 asm volatile (
1092 "    STMFD   SP!, {R4-R8,LR} \n"
1093 "    LDR     R7, =0x5438 \n"
1094 "    MOV     R4, R0 \n"
1095 "    LDR     R0, [R7, #0x1C] \n"
1096 "    MOV     R1, #0x3E \n"
1097 "    BL      sub_0068EF08 /*_ClearEventFlag*/ \n"
1098 "    MOV     R2, #0 \n"
1099 "    LDRSH   R0, [R4, #4] \n"
1100 "    MOV     R1, R2 \n"
1101 "    BL      sub_F8108734 \n"
1102 "    MOV     R6, R0 \n"
1103 "    LDRSH   R0, [R4, #6] \n"
1104 "    BL      sub_F8108894 \n"
1105 "    LDRSH   R0, [R4, #8] \n"
1106 "    BL      sub_F81088EC \n"
1107 "    LDRSH   R0, [R4, #0xA] \n"
1108 "    BL      sub_F8108944 \n"
1109 "    LDRSH   R0, [R4, #0xC] \n"
1110 "    MOV     R1, #0 \n"
1111 "    BL      sub_F810899C \n"
1112 "    MOV     R5, R0 \n"
1113 "    LDR     R0, [R4] \n"
1114 "    LDR     R8, =0xC3A48 \n"
1115 "    CMP     R0, #0xB \n"
1116 "    MOVEQ   R6, #0 \n"
1117 "    MOVEQ   R5, R6 \n"
1118 "    BEQ     loc_F8109B9C \n"
1119 "    CMP     R6, #1 \n"
1120 "    BNE     loc_F8109B9C \n"
1121 "    LDRSH   R0, [R4, #4] \n"
1122 "    LDR     R1, =0xF810868C \n"
1123 "    MOV     R2, #2 \n"
1124 "    BL      sub_F822A1BC \n"
1125 "    STRH    R0, [R4, #4] \n"
1126 "    MOV     R0, #0 \n"
1127 "    STR     R0, [R7, #0x28] \n"
1128 "    B       loc_F8109BA4 \n"
1129 
1130 "loc_F8109B9C:\n"
1131 "    LDRH    R0, [R8] \n"
1132 "    STRH    R0, [R4, #4] \n"
1133 
1134 "loc_F8109BA4:\n"
1135 "    CMP     R5, #1 \n"
1136 "    LDRNEH  R0, [R8, #8] \n"
1137 "    BNE     loc_F8109BC0 \n"
1138 "    LDRSH   R0, [R4, #0xC] \n"
1139 "    LDR     R1, =0xF8108710 \n"
1140 "    MOV     R2, #0x20 \n"
1141 "    BL      sub_F810E524 \n"
1142 
1143 "loc_F8109BC0:\n"
1144 "    STRH    R0, [R4, #0xC] \n"
1145 "    LDRSH   R0, [R4, #6] \n"
1146 "    BL      sub_F80F7290_my \n"  // --> Patched. Old value = 0xF80F7290.
1147 "    LDRSH   R0, [R4, #8] \n"
1148 "    MOV     R1, #1 \n"
1149 "    BL      sub_F80F7AE4 \n"
1150 "    MOV     R1, #0 \n"
1151 "    ADD     R0, R4, #8 \n"
1152 "    BL      sub_F80F7B6C \n"
1153 "    LDRSH   R0, [R4, #0xE] \n"
1154 "    BL      sub_F81028F8 \n"
1155 "    LDR     R4, =0xBB8 \n"
1156 "    CMP     R6, #1 \n"
1157 "    BNE     loc_F8109C18 \n"
1158 "    LDR     R0, [R7, #0x1C] \n"
1159 "    MOV     R2, R4 \n"
1160 "    MOV     R1, #2 \n"
1161 "    BL      sub_0068EE14 /*_WaitForAllEventFlag*/ \n"
1162 "    TST     R0, #1 \n"
1163 "    LDRNE   R0, =0xF8108E4C /*'ExpDrv.c'*/ \n"
1164 "    MOVNE   R1, #0x820 \n"
1165 "    BLNE    _DebugAssert \n"
1166 
1167 "loc_F8109C18:\n"
1168 "    CMP     R5, #1 \n"
1169 "    LDMNEFD SP!, {R4-R8,PC} \n"
1170 "    LDR     R0, [R7, #0x1C] \n"
1171 "    MOV     R2, R4 \n"
1172 "    MOV     R1, #0x20 \n"
1173 "    BL      sub_0068EE14 /*_WaitForAllEventFlag*/ \n"
1174 "    TST     R0, #1 \n"
1175 "    LDMEQFD SP!, {R4-R8,PC} \n"
1176 "    LDMFD   SP!, {R4-R8,LR} \n"
1177 "    LDR     R1, =0x825 \n"
1178 "    LDR     R0, =0xF8108E4C /*'ExpDrv.c'*/ \n"
1179 "    B       _DebugAssert \n"
1180 );
1181 }
1182 
1183 /*************************************************************/
1184 //** sub_F80F7290_my @ 0xF80F7290 - 0xF80F72F8, length=27
1185 void __attribute__((naked,noinline)) sub_F80F7290_my() {
1186 asm volatile (
1187 "    STMFD   SP!, {R4-R6,LR} \n"
1188 "    LDR     R5, =0x50A4 \n"
1189 "    MOV     R4, R0 \n"
1190 "    LDR     R0, [R5, #4] \n"
1191 "    CMP     R0, #1 \n"
1192 "    MOVNE   R1, #0x154 \n"
1193 "    LDRNE   R0, =0xF80F708C /*'Shutter.c'*/ \n"
1194 "    BLNE    _DebugAssert \n"
1195 "    CMN     R4, #0xC00 \n"
1196 "    LDREQSH R4, [R5, #2] \n"
1197 "    CMN     R4, #0xC00 \n"
1198 "    LDREQ   R1, =0x15A \n"
1199 "    LDREQ   R0, =0xF80F708C /*'Shutter.c'*/ \n"
1200 "    STRH    R4, [R5, #2] \n"
1201 "    BLEQ    _DebugAssert \n"
1202 "    MOV     R0, R4 \n"
1203 "    BL      apex2us \n"  // --> Patched. Old value = _apex2us.
1204 "    MOV     R4, R0 \n"
1205 //"  BL      _sub_F8174B6C \n"  // --> Nullsub call removed.
1206 "    MOV     R0, R4 \n"
1207 "    BL      sub_F817E2E4 \n"
1208 "    TST     R0, #1 \n"
1209 "    LDMEQFD SP!, {R4-R6,PC} \n"
1210 "    LDMFD   SP!, {R4-R6,LR} \n"
1211 "    LDR     R1, =0x15F \n"
1212 "    LDR     R0, =0xF80F708C /*'Shutter.c'*/ \n"
1213 "    B       _DebugAssert \n"
1214 );
1215 }

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