This source file includes following definitions.
- CreateTask_spytask
- taskCreateHook
- boot
- sub_FF8101A4_my
- sub_FF810FA0_my
- uHwSetup_my
- CreateTask_Startup_my
- task_Startup_my
- init_file_modules_task
- sub_FF86D8C0_my
- sub_FF84EF34_my
- sub_FF84ED70_my
- sub_FF84EB00_my
- jogdial_task_my
1
2
3
4 #include "lolevel.h"
5 #include "platform.h"
6 #include "core.h"
7
8 const char * const new_sa = &_end;
9
10 void __attribute__((naked,noinline)) jogdial_task_my();
11
12
13
14
15 void CreateTask_spytask() {
16 _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
17 };
18
19
20
21 void taskCreateHook(int *p) {
22 p-=16;
23 if (p[0]==(int)0xFF821ACC) p[0]=(int)mykbd_task;
24 if (p[0]==(int)0xFF842A44) p[0]=(int)jogdial_task_my;
25 if (p[0]==(int)0xFF85A004) p[0]=(int)movie_record_task;
26 if (p[0]==(int)0xFF85E03C) p[0]=(int)capt_seq_task;
27 if (p[0]==(int)0xFF878F84) p[0]=(int)init_file_modules_task;
28 if (p[0]==(int)0xFF8B6864) p[0]=(int)exp_drv_task;
29 if (p[0]==(int)0xFFA10248) p[0]=(int)filewritetask;
30 }
31
32 void boot()
33 {
34 long *canon_data_src = (void*)0xFFB1E3B0;
35 long *canon_data_dst = (void*)0x1900;
36 long canon_data_len = 0xF160 - 0x1900;
37 long *canon_bss_start = (void*)0xF160;
38 long canon_bss_len = 0xCBD40 - 0xF160;
39
40 long i;
41
42
43
44 asm volatile (
45 "MRC p15, 0, R0,c1,c0\n"
46 "ORR R0, R0, #0x1000\n"
47 "ORR R0, R0, #4\n"
48 "ORR R0, R0, #1\n"
49 "MCR p15, 0, R0,c1,c0\n"
50 :::"r0");
51
52 for(i=0;i<canon_data_len/4;i++)
53 canon_data_dst[i]=canon_data_src[i];
54
55 for(i=0;i<canon_bss_len/4;i++)
56 canon_bss_start[i]=0;
57
58
59 asm volatile ("B sub_FF8101A4_my\n");
60 };
61
62
63
64
65 void __attribute__((naked,noinline)) sub_FF8101A4_my() {
66
67 *(int*)0x1930=(int)taskCreateHook;
68
69
70
71 *(int*)(0x2290)= (*(int*)0xC02200F8) & 1 ? 0x200000 : 0x100000;
72
73 asm volatile (
74 " LDR R0, =0xFF81021C \n"
75 " MOV R1, #0 \n"
76 " LDR R3, =0xFF810254 \n"
77
78 "loc_FF8101B0:\n"
79 " CMP R0, R3 \n"
80 " LDRCC R2, [R0], #4 \n"
81 " STRCC R2, [R1], #4 \n"
82 " BCC loc_FF8101B0 \n"
83 " LDR R0, =0xFF810254 \n"
84 " MOV R1, #0x4B0 \n"
85 " LDR R3, =0xFF810468 \n"
86
87 "loc_FF8101CC:\n"
88 " CMP R0, R3 \n"
89 " LDRCC R2, [R0], #4 \n"
90 " STRCC R2, [R1], #4 \n"
91 " BCC loc_FF8101CC \n"
92 " MOV R0, #0xD2 \n"
93 " MSR CPSR_cxsf, R0 \n"
94 " MOV SP, #0x1000 \n"
95 " MOV R0, #0xD3 \n"
96 " MSR CPSR_cxsf, R0 \n"
97 " MOV SP, #0x1000 \n"
98 " LDR R0, =0x6C4 \n"
99 " LDR R2, =0xEEEEEEEE \n"
100 " MOV R3, #0x1000 \n"
101
102 "loc_FF810200:\n"
103 " CMP R0, R3 \n"
104 " STRCC R2, [R0], #4 \n"
105 " BCC loc_FF810200 \n"
106 " BL sub_FF810FA0_my \n"
107 );
108 }
109
110
111
112 void __attribute__((naked,noinline)) sub_FF810FA0_my() {
113 asm volatile (
114 " STR LR, [SP, #-4]! \n"
115 " SUB SP, SP, #0x74 \n"
116 " MOV R0, SP \n"
117 " MOV R1, #0x74 \n"
118 " BL sub_FFAAD8FC \n"
119 " MOV R0, #0x53000 \n"
120 " STR R0, [SP, #4] \n"
121
122 #if defined(CHDK_NOT_IN_CANON_HEAP)
123 " LDR R0, =0xCBD40 \n"
124 #else
125 " LDR R0, =new_sa\n"
126 " LDR R0, [R0]\n"
127 #endif
128
129 " LDR R2, =0x279C00 \n"
130 " LDR R1, =0x272968 \n"
131 " STR R0, [SP, #8] \n"
132 " SUB R0, R1, R0 \n"
133 " ADD R3, SP, #0xC \n"
134 " STR R2, [SP] \n"
135 " STMIA R3, {R0-R2} \n"
136 " MOV R0, #0x22 \n"
137 " STR R0, [SP, #0x18] \n"
138 " MOV R0, #0x68 \n"
139 " STR R0, [SP, #0x1C] \n"
140 " LDR R0, =0x19B \n"
141 " MOV R1, #0x64 \n"
142 " STRD R0, [SP, #0x20] \n"
143 " MOV R0, #0x78 \n"
144 " STRD R0, [SP, #0x28] \n"
145 " MOV R0, #0 \n"
146 " STR R0, [SP, #0x30] \n"
147 " STR R0, [SP, #0x34] \n"
148 " MOV R0, #0x10 \n"
149 " STR R0, [SP, #0x5C] \n"
150 " MOV R0, #0x800 \n"
151 " STR R0, [SP, #0x60] \n"
152 " MOV R0, #0xA0 \n"
153 " STR R0, [SP, #0x64] \n"
154 " MOV R0, #0x280 \n"
155 " STR R0, [SP, #0x68] \n"
156 " LDR R1, =uHwSetup_my \n"
157 " MOV R0, SP \n"
158 " MOV R2, #0 \n"
159 " BL sub_FF812D58 \n"
160 " ADD SP, SP, #0x74 \n"
161 " LDR PC, [SP], #4 \n"
162 );
163 }
164
165
166
167 void __attribute__((naked,noinline)) uHwSetup_my() {
168 asm volatile (
169 " STMFD SP!, {R4,LR} \n"
170 " BL sub_FF81094C \n"
171 " BL sub_FF819664 \n"
172 " CMP R0, #0 \n"
173 " LDRLT R0, =0xFF814EB8 /*'dmSetup'*/ \n"
174 " BLLT _err_init_task \n"
175 " BL sub_FF8149C8 \n"
176 " CMP R0, #0 \n"
177 " LDRLT R0, =0xFF814EC0 /*'termDriverInit'*/ \n"
178 " BLLT _err_init_task \n"
179 " LDR R0, =0xFF814ED0 /*'/_term'*/ \n"
180 " BL sub_FF814AB4 \n"
181 " CMP R0, #0 \n"
182 " LDRLT R0, =0xFF814ED8 /*'termDeviceCreate'*/ \n"
183 " BLLT _err_init_task \n"
184 " LDR R0, =0xFF814ED0 /*'/_term'*/ \n"
185 " BL sub_FF813564 \n"
186 " CMP R0, #0 \n"
187 " LDRLT R0, =0xFF814EEC /*'stdioSetup'*/ \n"
188 " BLLT _err_init_task \n"
189 " BL sub_FF8191EC \n"
190 " CMP R0, #0 \n"
191 " LDRLT R0, =0xFF814EF8 /*'stdlibSetup'*/ \n"
192 " BLLT _err_init_task \n"
193 " BL sub_FF8114B8 \n"
194 " CMP R0, #0 \n"
195 " LDRLT R0, =0xFF814F04 /*'armlib_setup'*/ \n"
196 " BLLT _err_init_task \n"
197 " LDMFD SP!, {R4,LR} \n"
198 " B CreateTask_Startup_my \n"
199 );
200 }
201
202
203
204 void __attribute__((naked,noinline)) CreateTask_Startup_my() {
205 asm volatile (
206 " STMFD SP!, {R3,LR} \n"
207
208 " BL sub_FF829EE0 \n"
209 " CMP R0, #0 \n"
210 " BNE loc_FF81CCEC \n"
211 " BL sub_FF84239C \n"
212 " CMP R0, #0 \n"
213 " BNE loc_FF81CCEC \n"
214 " LDR R1, =0xC0220000 \n"
215 " MOV R0, #0x44 \n"
216 " STR R0, [R1, #0x4C] \n"
217
218 "loc_FF81CCE8:\n"
219 " B loc_FF81CCE8 \n"
220
221 "loc_FF81CCEC:\n"
222
223
224 " BL sub_FF828268 \n"
225 " LDR R1, =0x2CE000 \n"
226 " MOV R0, #0 \n"
227 " BL sub_FF8284B0 \n"
228 " BL sub_FF82845C /*_EnableDispatch*/ \n"
229 " MOV R3, #0 \n"
230 " STR R3, [SP] \n"
231 " LDR R3, =task_Startup_my \n"
232 " MOV R2, #0 \n"
233 " MOV R1, #0x19 \n"
234 " LDR R0, =0xFF81CD34 /*'Startup'*/ \n"
235 " BL _CreateTask \n"
236 " MOV R0, #0 \n"
237 " LDMFD SP!, {R12,PC} \n"
238 );
239 }
240
241
242
243 void __attribute__((naked,noinline)) task_Startup_my() {
244 asm volatile (
245 " STMFD SP!, {R4,LR} \n"
246 " BL sub_FF81516C \n"
247 " BL sub_FF822D50 \n"
248 " BL sub_FF81FDF0 \n"
249 " BL sub_FF842988 \n"
250 " BL sub_FF82A0E8 \n"
251
252 " BL CreateTask_spytask\n"
253 " BL sub_FF8756E4 \n"
254 " BL sub_FF82A138 \n"
255 " BL sub_FF8277A8 \n"
256 " BL sub_FF82A2A0 \n"
257 " BL sub_FF821B00 \n"
258 " BL sub_FF824CB8 \n"
259 " BL sub_FF82A2B8 \n"
260
261 " BL sub_FF820FBC \n"
262 " BL sub_FF829CA8 \n"
263 " BL sub_FF821630 \n"
264 " BL _taskcreate_TempCheck \n"
265 " BL sub_FF82AD5C \n"
266 " BL sub_FF820E68 \n"
267 " LDMFD SP!, {R4,LR} \n"
268 " B sub_FF815070 \n"
269 );
270 }
271
272
273
274 void __attribute__((naked,noinline)) init_file_modules_task() {
275 asm volatile (
276 " STMFD SP!, {R4-R6,LR} \n"
277 " BL sub_FF86D894 \n"
278 " LDR R5, =0x5006 \n"
279 " MOVS R4, R0 \n"
280 " MOVNE R1, #0 \n"
281 " MOVNE R0, R5 \n"
282 " BLNE _PostLogicalEventToUI \n"
283 " BL sub_FF86D8C0_my \n"
284 " BL core_spytask_can_start\n"
285 " CMP R4, #0 \n"
286 " MOVEQ R0, R5 \n"
287 " LDMEQFD SP!, {R4-R6,LR} \n"
288 " MOVEQ R1, #0 \n"
289 " BEQ _PostLogicalEventToUI \n"
290 " LDMFD SP!, {R4-R6,PC} \n"
291 );
292 }
293
294
295
296 void __attribute__((naked,noinline)) sub_FF86D8C0_my() {
297 asm volatile (
298 " STMFD SP!, {R4,LR} \n"
299 " BL sub_FF84EF34_my \n"
300 " LDR R4, =0x57D0 \n"
301 " LDR R0, [R4, #4] \n"
302 " CMP R0, #0 \n"
303 " BNE loc_FF86D8F0 \n"
304 " BL sub_FF881B00 \n"
305 " BL sub_FF905374 \n"
306 " BL sub_FF881B00 \n"
307 " BL sub_FF84C924 \n"
308 " BL sub_FF881B10 \n"
309 " BL sub_FF905440 \n"
310
311 "loc_FF86D8F0:\n"
312 " MOV R0, #1 \n"
313 " STR R0, [R4] \n"
314 " LDMFD SP!, {R4,PC} \n"
315 );
316 }
317
318
319
320 void __attribute__((naked,noinline)) sub_FF84EF34_my() {
321 asm volatile (
322 " STMFD SP!, {R4-R6,LR} \n"
323 " MOV R6, #0 \n"
324 " MOV R0, R6 \n"
325 " BL sub_FF84E9F4 \n"
326 " LDR R4, =0x118C0 \n"
327 " MOV R5, #0 \n"
328 " LDR R0, [R4, #0x38] \n"
329 " BL sub_FF84F428 \n"
330 " CMP R0, #0 \n"
331 " LDREQ R0, =0x29D4 \n"
332 " STREQ R5, [R0, #0x10] \n"
333 " STREQ R5, [R0, #0x14] \n"
334 " STREQ R5, [R0, #0x18] \n"
335 " MOV R0, R6 \n"
336 " BL sub_FF84EA34 \n"
337 " MOV R0, R6 \n"
338 " BL sub_FF84ED70_my \n"
339 " MOV R5, R0 \n"
340 " MOV R0, R6 \n"
341 " BL sub_FF84EDDC \n"
342 " LDR R1, [R4, #0x3C] \n"
343 " AND R2, R5, R0 \n"
344 " CMP R1, #0 \n"
345 " MOV R0, #0 \n"
346 " MOVEQ R0, #0x80000001 \n"
347 " BEQ loc_FF84EFC8 \n"
348 " LDR R3, [R4, #0x2C] \n"
349 " CMP R3, #2 \n"
350 " MOVEQ R0, #4 \n"
351 " CMP R1, #5 \n"
352 " ORRNE R0, R0, #1 \n"
353 " BICEQ R0, R0, #1 \n"
354 " CMP R2, #0 \n"
355 " BICEQ R0, R0, #2 \n"
356 " ORREQ R0, R0, #0x80000000 \n"
357 " BICNE R0, R0, #0x80000000 \n"
358 " ORRNE R0, R0, #2 \n"
359
360 "loc_FF84EFC8:\n"
361 " STR R0, [R4, #0x40] \n"
362 " LDMFD SP!, {R4-R6,PC} \n"
363 );
364 }
365
366
367
368 void __attribute__((naked,noinline)) sub_FF84ED70_my() {
369 asm volatile (
370 " STMFD SP!, {R4-R6,LR} \n"
371 " LDR R5, =0x29D4 \n"
372 " MOV R6, R0 \n"
373 " LDR R0, [R5, #0x14] \n"
374 " CMP R0, #0 \n"
375 " MOVNE R0, #1 \n"
376 " LDMNEFD SP!, {R4-R6,PC} \n"
377 " MOV R0, #0x17 \n"
378 " MUL R1, R0, R6 \n"
379 " LDR R0, =0x118C0 \n"
380 " ADD R4, R0, R1, LSL#2 \n"
381 " LDR R0, [R4, #0x38] \n"
382 " MOV R1, R6 \n"
383 " BL sub_FF84EB00_my \n"
384 " CMP R0, #0 \n"
385 " LDMEQFD SP!, {R4-R6,PC} \n"
386 " LDR R0, [R4, #0x38] \n"
387 " MOV R1, R6 \n"
388 " BL sub_FF84EC68 \n"
389 " CMP R0, #0 \n"
390 " LDMEQFD SP!, {R4-R6,PC} \n"
391 " MOV R0, R6 \n"
392 " BL sub_FF84E5FC \n"
393 " CMP R0, #0 \n"
394 " MOVNE R1, #1 \n"
395 " STRNE R1, [R5, #0x14] \n"
396 " LDMFD SP!, {R4-R6,PC} \n"
397 );
398 }
399
400
401
402 void __attribute__((naked,noinline)) sub_FF84EB00_my() {
403 asm volatile (
404 " STMFD SP!, {R4-R8,LR} \n"
405 " MOV R8, R0 \n"
406 " MOV R0, #0x17 \n"
407 " MUL R1, R0, R1 \n"
408 " LDR R0, =0x118C0 \n"
409 " MOV R6, #0 \n"
410 " ADD R7, R0, R1, LSL#2 \n"
411 " LDR R0, [R7, #0x3C] \n"
412 " MOV R5, #0 \n"
413 " CMP R0, #6 \n"
414 " ADDLS PC, PC, R0, LSL#2 \n"
415 " B loc_FF84EC4C \n"
416 " B loc_FF84EB64 \n"
417 " B loc_FF84EB4C \n"
418 " B loc_FF84EB4C \n"
419 " B loc_FF84EB4C \n"
420 " B loc_FF84EB4C \n"
421 " B loc_FF84EC44 \n"
422 " B loc_FF84EB4C \n"
423
424 "loc_FF84EB4C:\n"
425 " MOV R2, #0 \n"
426 " MOV R1, #0x200 \n"
427 " MOV R0, #3 \n"
428 " BL _exmem_ualloc \n"
429 " MOVS R4, R0 \n"
430 " BNE loc_FF84EB6C \n"
431
432 "loc_FF84EB64:\n"
433 " MOV R0, #0 \n"
434 " LDMFD SP!, {R4-R8,PC} \n"
435
436 "loc_FF84EB6C:\n"
437 " LDR R12, [R7, #0x4C] \n"
438 " MOV R3, R4 \n"
439 " MOV R2, #1 \n"
440 " MOV R1, #0 \n"
441 " MOV R0, R8 \n"
442 " BLX R12 \n"
443 " CMP R0, #1 \n"
444 " BNE loc_FF84EB98 \n"
445 " MOV R0, #3 \n"
446 " BL _exmem_ufree \n"
447 " B loc_FF84EB64 \n"
448
449 "loc_FF84EB98:\n"
450 " MOV R0, R8 \n"
451 " BL sub_FF922B9C \n"
452
453 " MOV R1, R4\n"
454 " BL mbr_read_dryos\n"
455
456
457
458
459
460
461 " MOV R12, R4\n"
462 " MOV LR, R4\n"
463 " MOV R1, #1\n"
464 " B dg_sd_fat32_enter\n"
465 "dg_sd_fat32:\n"
466 " CMP R1, #4\n"
467 " BEQ dg_sd_fat32_end\n"
468 " ADD R12, R12, #0x10\n"
469 " ADD R1, R1, #1\n"
470 "dg_sd_fat32_enter:\n"
471 " LDRB R2, [R12, #0x1BE]\n"
472 " LDRB R3, [R12, #0x1C2]\n"
473 " CMP R3, #0xB\n"
474 " CMPNE R3, #0xC\n"
475 " CMPNE R3, #0x7\n"
476 " BNE dg_sd_fat32\n"
477 " CMP R2, #0x00\n"
478 " CMPNE R2, #0x80\n"
479 " BNE dg_sd_fat32\n"
480
481 " MOV R4, R12\n"
482
483 "dg_sd_fat32_end:\n"
484
485
486 " LDRB R1, [R4, #0x1C9] \n"
487 " LDRB R3, [R4, #0x1C8] \n"
488 " LDRB R12, [R4, #0x1CC] \n"
489 " MOV R1, R1, LSL#24 \n"
490 " ORR R1, R1, R3, LSL#16 \n"
491 " LDRB R3, [R4, #0x1C7] \n"
492 " LDRB R2, [R4, #0x1BE] \n"
493
494 " ORR R1, R1, R3, LSL#8 \n"
495 " LDRB R3, [R4, #0x1C6] \n"
496 " CMP R2, #0 \n"
497 " CMPNE R2, #0x80 \n"
498 " ORR R1, R1, R3 \n"
499 " LDRB R3, [R4, #0x1CD] \n"
500 " MOV R3, R3, LSL#24 \n"
501 " ORR R3, R3, R12, LSL#16 \n"
502 " LDRB R12, [R4, #0x1CB] \n"
503 " ORR R3, R3, R12, LSL#8 \n"
504 " LDRB R12, [R4, #0x1CA] \n"
505 " ORR R3, R3, R12 \n"
506
507
508 " LDRB R12, [LR,#0x1FE]\n"
509 " LDRB LR, [LR,#0x1FF]\n"
510
511 " MOV R4, #0 \n"
512 " BNE loc_FF84EC20 \n"
513 " CMP R0, R1 \n"
514 " BCC loc_FF84EC20 \n"
515 " ADD R2, R1, R3 \n"
516 " CMP R2, R0 \n"
517 " CMPLS R12, #0x55 \n"
518 " CMPEQ LR, #0xAA \n"
519 " MOVEQ R6, R1 \n"
520 " MOVEQ R5, R3 \n"
521 " MOVEQ R4, #1 \n"
522
523 "loc_FF84EC20:\n"
524 " MOV R0, #3 \n"
525 " BL _exmem_ufree \n"
526 " CMP R4, #0 \n"
527 " BNE loc_FF84EC58 \n"
528 " MOV R6, #0 \n"
529 " MOV R0, R8 \n"
530 " BL sub_FF922B9C \n"
531 " MOV R5, R0 \n"
532 " B loc_FF84EC58 \n"
533
534 "loc_FF84EC44:\n"
535 " MOV R5, #0x40 \n"
536 " B loc_FF84EC58 \n"
537
538 "loc_FF84EC4C:\n"
539 " MOV R1, #0x374 \n"
540 " LDR R0, =0xFF84EAF4 /*'Mounter.c'*/ \n"
541 " BL _DebugAssert \n"
542
543 "loc_FF84EC58:\n"
544 " STR R6, [R7, #0x44]! \n"
545 " MOV R0, #1 \n"
546 " STR R5, [R7, #4] \n"
547 " LDMFD SP!, {R4-R8,PC} \n"
548 );
549 }
550
551
552
553 void __attribute__((naked,noinline)) jogdial_task_my() {
554 asm volatile (
555 " STMFD SP!, {R3-R11,LR} \n"
556 " BL sub_FF842BF4 \n"
557 " LDR R11, =0x80000B01 \n"
558 " LDR R8, =0xFFAB168C \n"
559 " LDR R7, =0xC0240000 \n"
560 " LDR R6, =0x22A0 \n"
561 " MOV R9, #1 \n"
562 " MOV R10, #0 \n"
563
564 "loc_FF842A64:\n"
565 " LDR R3, =0x1A1 \n"
566 " LDR R0, [R6, #0xC] \n"
567 " LDR R2, =0xFF842C9C /*'JogDial.c'*/ \n"
568 " MOV R1, #0 \n"
569 " BL sub_FF81BBD8 /*_TakeSemaphoreStrictly*/ \n"
570 " MOV R0, #0x28 \n"
571 " BL _SleepTask \n"
572
573 "labelA:\n"
574 " LDR R0, =jogdial_stopped\n"
575 " LDR R0, [R0]\n"
576 " CMP R0, #1\n"
577 " BNE labelB\n"
578 " MOV R0, #40\n"
579 " BL _SleepTask\n"
580 " B labelA\n"
581 "labelB:\n"
582
583
584 " LDR R0, [R7, #0x104] \n"
585 " MOV R0, R0, ASR#16 \n"
586 " STRH R0, [R6] \n"
587 " LDRSH R2, [R6, #2] \n"
588 " SUB R1, R0, R2 \n"
589 " CMP R1, #0 \n"
590 " BEQ loc_FF842B28 \n"
591 " MOV R5, R1 \n"
592 " RSBLT R5, R5, #0 \n"
593 " MOVLE R4, #0 \n"
594 " MOVGT R4, #1 \n"
595 " CMP R5, #0xFF \n"
596 " BLS loc_FF842ADC \n"
597 " CMP R1, #0 \n"
598 " RSBLE R1, R2, #0xFF \n"
599 " ADDLE R1, R1, #0x7F00 \n"
600 " ADDLE R0, R1, R0 \n"
601 " RSBGT R0, R0, #0xFF \n"
602 " ADDGT R0, R0, #0x7F00 \n"
603 " ADDGT R0, R0, R2 \n"
604 " ADD R5, R0, #0x8000 \n"
605 " ADD R5, R5, #1 \n"
606 " EOR R4, R4, #1 \n"
607
608 "loc_FF842ADC:\n"
609 " LDR R0, [R6, #0x14] \n"
610 " CMP R0, #0 \n"
611 " BEQ loc_FF842B20 \n"
612 " LDR R0, [R6, #0x1C] \n"
613 " CMP R0, #0 \n"
614 " BEQ loc_FF842B08 \n"
615 " LDR R1, [R8, R4, LSL#2] \n"
616 " CMP R1, R0 \n"
617 " BEQ loc_FF842B10 \n"
618 " LDR R0, =0xB01 \n"
619 " BL sub_FF87511C \n"
620
621 "loc_FF842B08:\n"
622 " MOV R0, R11 \n"
623 " BL sub_FF87511C \n"
624
625 "loc_FF842B10:\n"
626 " LDR R0, [R8, R4, LSL#2] \n"
627 " MOV R1, R5 \n"
628 " STR R0, [R6, #0x1C] \n"
629 " BL sub_FF875064 \n"
630
631 "loc_FF842B20:\n"
632 " LDRH R0, [R6] \n"
633 " STRH R0, [R6, #2] \n"
634
635 "loc_FF842B28:\n"
636 " STR R10, [R7, #0x100] \n"
637 " STR R9, [R7, #0x108] \n"
638 " LDR R0, [R6, #0x10] \n"
639 " CMP R0, #0 \n"
640 " BLNE _SleepTask \n"
641 " B loc_FF842A64 \n"
642 );
643 }