root/platform/sx200is/sub/100c/boot.c

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DEFINITIONS

This source file includes following definitions.
  1. taskCreateHook
  2. CreateTask_spytask
  3. boot
  4. sub_FF8101A0_my
  5. sub_FF810FC4_my
  6. sub_FF814D38_my
  7. taskcreate_Startup_my
  8. task_Startup_my
  9. init_file_modules_task
  10. sub_FF874BB4_my
  11. sub_FF857704_my
  12. sub_FF8574A4_my
  13. sub_FF857234_my
  14. JogDial_task_my

   1 /*
   2  * boot.c - auto-generated by CHDK code_gen.
   3  */
   4 #include "lolevel.h"
   5 #include "platform.h"
   6 #include "core.h"
   7 #include "dryos31.h"
   8 
   9 #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
  10 
  11 const char * const new_sa = &_end;
  12 
  13 extern void task_CaptSeq();
  14 extern void task_PhySw();
  15 extern void task_RotaryEncoder();
  16 extern void task_InitFileModules();
  17 extern void task_MovieRecord();
  18 extern void task_ExpDrv();
  19 extern void task_FileWrite();
  20 
  21 void JogDial_task_my(void);
  22 
  23 void taskCreateHook(context_t **context) {
  24     task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context));
  25 
  26     if (tcb->entry == (void*)task_CaptSeq)           tcb->entry = (void*)capt_seq_task;
  27     if (tcb->entry == (void*)task_PhySw)             tcb->entry = (void*)mykbd_task;
  28     if (tcb->entry == (void*)task_RotaryEncoder)     tcb->entry = (void*)JogDial_task_my;
  29     if (tcb->entry == (void*)task_InitFileModules)   tcb->entry = (void*)init_file_modules_task;
  30     if (tcb->entry == (void*)task_MovieRecord)       tcb->entry = (void*)movie_record_task;
  31     if (tcb->entry == (void*)task_ExpDrv)            tcb->entry = (void*)exp_drv_task;
  32     if (tcb->entry == (void*)task_FileWrite)         tcb->entry = (void*)filewritetask;
  33 }
  34 
  35 void CreateTask_spytask() {
  36         _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
  37 };
  38 
  39 
  40 /*************************************************************/
  41 //** boot @ 0xFF81000C - 0xFF810160, length=86
  42 void __attribute__((naked,noinline)) boot() {
  43 asm volatile (
  44 "    LDR     R1, =0xC0410000 \n"
  45 "    MOV     R0, #0 \n"
  46 "    STR     R0, [R1] \n"
  47 "    MOV     R1, #0x78 \n"
  48 "    MCR     p15, 0, R1, c1, c0 \n"
  49 "    MOV     R1, #0 \n"
  50 "    MCR     p15, 0, R1, c7, c10, 4 \n"
  51 "    MCR     p15, 0, R1, c7, c5 \n"
  52 "    MCR     p15, 0, R1, c7, c6 \n"
  53 "    MOV     R0, #0x3D \n"
  54 "    MCR     p15, 0, R0, c6, c0 \n"
  55 "    MOV     R0, #0xC000002F \n"
  56 "    MCR     p15, 0, R0, c6, c1 \n"
  57 "    MOV     R0, #0x33 \n"
  58 "    MCR     p15, 0, R0, c6, c2 \n"
  59 "    MOV     R0, #0x40000033 \n"
  60 "    MCR     p15, 0, R0, c6, c3 \n"
  61 "    MOV     R0, #0x80000017 \n"
  62 "    MCR     p15, 0, R0, c6, c4 \n"
  63 "    LDR     R0, =0xFF80002D \n"
  64 "    MCR     p15, 0, R0, c6, c5 \n"
  65 "    MOV     R0, #0x34 \n"
  66 "    MCR     p15, 0, R0, c2, c0 \n"
  67 "    MOV     R0, #0x34 \n"
  68 "    MCR     p15, 0, R0, c2, c0, 1 \n"
  69 "    MOV     R0, #0x34 \n"
  70 "    MCR     p15, 0, R0, c3, c0 \n"
  71 "    LDR     R0, =0x3333330 \n"
  72 "    MCR     p15, 0, R0, c5, c0, 2 \n"
  73 "    LDR     R0, =0x3333330 \n"
  74 "    MCR     p15, 0, R0, c5, c0, 3 \n"
  75 "    MRC     p15, 0, R0, c1, c0 \n"
  76 "    ORR     R0, R0, #0x1000 \n"
  77 "    ORR     R0, R0, #4 \n"
  78 "    ORR     R0, R0, #1 \n"
  79 "    MCR     p15, 0, R0, c1, c0 \n"
  80 "    MOV     R1, #0x80000006 \n"
  81 "    MCR     p15, 0, R1, c9, c1 \n"
  82 "    MOV     R1, #6 \n"
  83 "    MCR     p15, 0, R1, c9, c1, 1 \n"
  84 "    MRC     p15, 0, R1, c1, c0 \n"
  85 "    ORR     R1, R1, #0x50000 \n"
  86 "    MCR     p15, 0, R1, c1, c0 \n"
  87 "    LDR     R2, =0xC0200000 \n"
  88 "    MOV     R1, #1 \n"
  89 "    STR     R1, [R2, #0x10C] \n"
  90 "    MOV     R1, #0xFF \n"
  91 "    STR     R1, [R2, #0xC] \n"
  92 "    STR     R1, [R2, #0x1C] \n"
  93 "    STR     R1, [R2, #0x2C] \n"
  94 "    STR     R1, [R2, #0x3C] \n"
  95 "    STR     R1, [R2, #0x4C] \n"
  96 "    STR     R1, [R2, #0x5C] \n"
  97 "    STR     R1, [R2, #0x6C] \n"
  98 "    STR     R1, [R2, #0x7C] \n"
  99 "    STR     R1, [R2, #0x8C] \n"
 100 "    STR     R1, [R2, #0x9C] \n"
 101 "    STR     R1, [R2, #0xAC] \n"
 102 "    STR     R1, [R2, #0xBC] \n"
 103 "    STR     R1, [R2, #0xCC] \n"
 104 "    STR     R1, [R2, #0xDC] \n"
 105 "    STR     R1, [R2, #0xEC] \n"
 106 "    STR     R1, [R2, #0xFC] \n"
 107 "    LDR     R1, =0xC0400008 \n"
 108 "    LDR     R2, =0x430005 \n"
 109 "    STR     R2, [R1] \n"
 110 "    MOV     R1, #1 \n"
 111 "    LDR     R2, =0xC0243100 \n"
 112 "    STR     R2, [R1] \n"
 113 "    LDR     R2, =0xC0242010 \n"
 114 "    LDR     R1, [R2] \n"
 115 "    ORR     R1, R1, #1 \n"
 116 "    STR     R1, [R2] \n"
 117 "    LDR     R0, =0xFFB91B18 \n"
 118 "    LDR     R1, =0x1900 \n"
 119 "    LDR     R3, =0xDBCC \n"
 120 
 121 "loc_FF81013C:\n"
 122 "    CMP     R1, R3 \n"
 123 "    LDRCC   R2, [R0], #4 \n"
 124 "    STRCC   R2, [R1], #4 \n"
 125 "    BCC     loc_FF81013C \n"
 126 "    LDR     R1, =0x12351C \n"
 127 "    MOV     R2, #0 \n"
 128 
 129 "loc_FF810154:\n"
 130 "    CMP     R3, R1 \n"
 131 "    STRCC   R2, [R3], #4 \n"
 132 "    BCC     loc_FF810154 \n"
 133 "    B       sub_FF8101A0_my \n"  // --> Patched. Old value = 0xFF8101A0.
 134 );
 135 }
 136 
 137 /*************************************************************/
 138 //** sub_FF8101A0_my @ 0xFF8101A0 - 0xFF810208, length=27
 139 void __attribute__((naked,noinline)) sub_FF8101A0_my() {
 140    *(int*)0x1934=(int)taskCreateHook;
 141    *(int*)0x1938=(int)taskCreateHook;
 142    *(int*)0x1930=(int)taskCreateHook; //  don't know why but movie will only work with 1930 and card lock only with 1934 - 1938
 143    *(int*)(0x24C0+4)= (*(int*)0xC0220128)&1 ? 0x2000000 : 0x1000000; // replacement of sub_FF821BD4 for correct power-on.
 144 asm volatile (
 145 "    LDR     R0, =0xFF810218 \n"
 146 "    MOV     R1, #0 \n"
 147 "    LDR     R3, =0xFF810250 \n"
 148 
 149 "loc_FF8101AC:\n"
 150 "    CMP     R0, R3 \n"
 151 "    LDRCC   R2, [R0], #4 \n"
 152 "    STRCC   R2, [R1], #4 \n"
 153 "    BCC     loc_FF8101AC \n"
 154 "    LDR     R0, =0xFF810250 \n"
 155 "    MOV     R1, #0x4B0 \n"
 156 "    LDR     R3, =0xFF810464 \n"
 157 
 158 "loc_FF8101C8:\n"
 159 "    CMP     R0, R3 \n"
 160 "    LDRCC   R2, [R0], #4 \n"
 161 "    STRCC   R2, [R1], #4 \n"
 162 "    BCC     loc_FF8101C8 \n"
 163 "    MOV     R0, #0xD2 \n"
 164 "    MSR     CPSR_cxsf, R0 \n"
 165 "    MOV     SP, #0x1000 \n"
 166 "    MOV     R0, #0xD3 \n"
 167 "    MSR     CPSR_cxsf, R0 \n"
 168 "    MOV     SP, #0x1000 \n"
 169 "    LDR     R0, =0x6C4 \n"
 170 "    LDR     R2, =0xEEEEEEEE \n"
 171 "    MOV     R3, #0x1000 \n"
 172 
 173 "loc_FF8101FC:\n"
 174 "    CMP     R0, R3 \n"
 175 "    STRCC   R2, [R0], #4 \n"
 176 "    BCC     loc_FF8101FC \n"
 177 "    BL      sub_FF810FC4_my \n"  // --> Patched. Old value = 0xFF810FC4.
 178 );
 179 }
 180 
 181 /*************************************************************/
 182 //** sub_FF810FC4_my @ 0xFF810FC4 - 0xFF811070, length=44
 183 void __attribute__((naked,noinline)) sub_FF810FC4_my() {
 184 asm volatile (
 185 "    STR     LR, [SP, #-4]! \n"
 186 "    SUB     SP, SP, #0x74 \n"
 187 "    MOV     R0, SP \n"
 188 "    MOV     R1, #0x74 \n"
 189 "    BL      sub_FFAF8D3C \n"
 190 "    MOV     R0, #0x53000 \n"
 191 "    STR     R0, [SP, #4] \n"
 192 #if defined(CHDK_NOT_IN_CANON_HEAP)
 193 "    LDR     R0, =0x12351C \n"
 194 #else
 195 "    LDR     R0, =new_sa\n"        // +
 196 "    LDR     R0, [R0]\n"           // +
 197 #endif
 198 "    LDR     R2, =0x2F9C00 \n"
 199 "    LDR     R1, =0x2F24A8 \n"
 200 "    STR     R0, [SP, #8] \n"
 201 "    SUB     R0, R1, R0 \n"
 202 "    ADD     R3, SP, #0xC \n"
 203 "    STR     R2, [SP] \n"
 204 "    STMIA   R3, {R0-R2} \n"
 205 "    MOV     R0, #0x22 \n"
 206 "    STR     R0, [SP, #0x18] \n"
 207 "    MOV     R0, #0x68 \n"
 208 "    STR     R0, [SP, #0x1C] \n"
 209 "    LDR     R0, =0x19B \n"
 210 "    LDR     R1, =sub_FF814D38_my \n"  // --> Patched. Old value = 0xFF814D38.
 211 "    STR     R0, [SP, #0x20] \n"
 212 "    MOV     R0, #0x96 \n"
 213 "    STR     R0, [SP, #0x24] \n"
 214 "    MOV     R0, #0x78 \n"
 215 "    STR     R0, [SP, #0x28] \n"
 216 "    MOV     R0, #0x64 \n"
 217 "    STR     R0, [SP, #0x2C] \n"
 218 "    MOV     R0, #0 \n"
 219 "    STR     R0, [SP, #0x30] \n"
 220 "    STR     R0, [SP, #0x34] \n"
 221 "    MOV     R0, #0x10 \n"
 222 "    STR     R0, [SP, #0x5C] \n"
 223 "    MOV     R0, #0x800 \n"
 224 "    STR     R0, [SP, #0x60] \n"
 225 "    MOV     R0, #0xA0 \n"
 226 "    STR     R0, [SP, #0x64] \n"
 227 "    MOV     R0, #0x280 \n"
 228 "    STR     R0, [SP, #0x68] \n"
 229 "    MOV     R0, SP \n"
 230 "    MOV     R2, #0 \n"
 231 "    BL      sub_FF812D68 \n"
 232 "    ADD     SP, SP, #0x74 \n"
 233 "    LDR     PC, [SP], #4 \n"
 234 );
 235 }
 236 
 237 /*************************************************************/
 238 //** sub_FF814D38_my @ 0xFF814D38 - 0xFF814DAC, length=30
 239 void __attribute__((naked,noinline)) sub_FF814D38_my() {
 240 asm volatile (
 241 "    STMFD   SP!, {R4,LR} \n"
 242 "    BL      sub_FF810954 \n"
 243 "    BL      sub_FF8190B4 \n"
 244 "    CMP     R0, #0 \n"
 245 "    LDRLT   R0, =0xFF814E4C /*'dmSetup'*/ \n"
 246 "    BLLT    _err_init_task \n"
 247 "    BL      sub_FF814974 \n"
 248 "    CMP     R0, #0 \n"
 249 "    LDRLT   R0, =0xFF814E54 /*'termDriverInit'*/ \n"
 250 "    BLLT    _err_init_task \n"
 251 "    LDR     R0, =0xFF814E64 /*'/_term'*/ \n"
 252 "    BL      sub_FF814A5C \n"
 253 "    CMP     R0, #0 \n"
 254 "    LDRLT   R0, =0xFF814E6C /*'termDeviceCreate'*/ \n"
 255 "    BLLT    _err_init_task \n"
 256 "    LDR     R0, =0xFF814E64 /*'/_term'*/ \n"
 257 "    BL      sub_FF813578 \n"
 258 "    CMP     R0, #0 \n"
 259 "    LDRLT   R0, =0xFF814E80 /*'stdioSetup'*/ \n"
 260 "    BLLT    _err_init_task \n"
 261 "    BL      sub_FF818BCC \n"
 262 "    CMP     R0, #0 \n"
 263 "    LDRLT   R0, =0xFF814E8C /*'stdlibSetup'*/ \n"
 264 "    BLLT    _err_init_task \n"
 265 "    BL      sub_FF8114A8 \n"
 266 "    CMP     R0, #0 \n"
 267 "    LDRLT   R0, =0xFF814E98 /*'armlib_setup'*/ \n"
 268 "    BLLT    _err_init_task \n"
 269 "    LDMFD   SP!, {R4,LR} \n"
 270 "    B       taskcreate_Startup_my \n"  // --> Patched. Old value = 0xFF81C260.
 271 );
 272 }
 273 
 274 /*************************************************************/
 275 //** taskcreate_Startup_my @ 0xFF81C260 - 0xFF81C2D4, length=30
 276 void __attribute__((naked,noinline)) taskcreate_Startup_my() {
 277 asm volatile (
 278 "    STMFD   SP!, {R3,LR} \n"
 279 //"  BL      _sub_FF847A00 \n"  // --> Nullsub call removed.
 280 "    BL      sub_FF829050 \n"
 281 "    CMP     R0, #0 \n"
 282 "    BNE     loc_FF81C298 \n"
 283 "    BL      sub_FF8479E4 \n"
 284 "    CMP     R0, #0 \n"
 285 "    BNE     loc_FF81C298 \n"
 286 "    BL      sub_FF8212BC \n"
 287 "    LDR     R1, =0xC0220000 \n"
 288 "    MOV     R0, #0x44 \n"
 289 "    STR     R0, [R1, #0x1C] \n"
 290 "    BL      sub_FF8214A8 \n"
 291 
 292 "loc_FF81C294:\n"
 293 "    B       loc_FF81C294 \n"
 294 
 295 "loc_FF81C298:\n"
 296 //"  BL      _sub_FF847A08 \n"  // -- replaced for power button startup
 297 //"  BL      _sub_FF847A04 \n"  // --> Nullsub call removed.
 298 "    BL      sub_FF827308 \n"
 299 "    LDR     R1, =0x34E000 \n"
 300 "    MOV     R0, #0 \n"
 301 "    BL      sub_FF827750 \n"
 302 "    BL      sub_FF8274FC \n"
 303 "    MOV     R3, #0 \n"
 304 "    STR     R3, [SP] \n"
 305 "    LDR     R3, =task_Startup_my \n"  // --> Patched. Old value = 0xFF81C1FC.
 306 "    MOV     R2, #0 \n"
 307 "    MOV     R1, #0x19 \n"
 308 "    LDR     R0, =0xFF81C2E0 /*'Startup'*/ \n"  // Startup
 309 "    BL      _CreateTask \n"
 310 "    MOV     R0, #0 \n"
 311 "    LDMFD   SP!, {R12,PC} \n"
 312 );
 313 }
 314 
 315 /*************************************************************/
 316 //** task_Startup_my @ 0xFF81C1FC - 0xFF81C25C, length=25
 317 void __attribute__((naked,noinline)) task_Startup_my() {
 318 asm volatile (
 319 "    STMFD   SP!, {R4,LR} \n"
 320 "    BL      sub_FF815394 \n"
 321 "    BL      sub_FF822CB0 \n"
 322 "    BL      sub_FF820F70 \n"
 323 //"  BL      _sub_FF8484AC \n"  // --> Nullsub call removed.
 324 "    BL      sub_FF829274 \n"
 325 //"  BL      _sub_FF829124 \n"  // start diskboot.bin
 326 "    BL      sub_FF87BF10 \n"
 327 "    BL      sub_FF81FB90 \n"
 328 "    BL      sub_FF8292A4 \n"
 329 "    BL      sub_FF826908 \n"
 330 "    BL      sub_FF82941C \n"
 331 //"BL debug_blink\n"
 332 "    BL      CreateTask_spytask\n"    // +
 333 //"BL debug_blink\n"
 334 #if defined(OPT_RUN_WITH_BATT_COVER_OPEN)
 335 "    LDR     R0, =0xE0000\n"    // Pause for startup with battery door open
 336 "batt_delay:\n"
 337 "    NOP\n"
 338 "    SUBS    R0,R0,#1\n"
 339 "    BNE     batt_delay\n"
 340 #endif
 341 "    BL      sub_FF821AC4 \n"  // taskcreate_PhySw
 342 "    BL      sub_FF824B14 \n"
 343 "    BL      sub_FF829434 \n"
 344 //"  BL      _sub_FF81EFB0 \n"  // --> Nullsub call removed.
 345 "    BL      sub_FF82087C \n"
 346 "    BL      sub_FF828E2C \n"
 347 "    BL      sub_FF820F20 \n"
 348 "    BL      sub_FF820788 \n"  // taskcreate_TempCheck
 349 "    BL      sub_FF81FBC4 \n"
 350 "    BL      sub_FF829F18 \n"
 351 "    BL      sub_FF820760 \n"
 352 "    LDMFD   SP!, {R4,LR} \n"
 353 "    B       sub_FF8154B4 \n"
 354 );
 355 }
 356 
 357 /*************************************************************/
 358 //** init_file_modules_task @ 0xFF87F81C - 0xFF87F850, length=14
 359 void __attribute__((naked,noinline)) init_file_modules_task() {
 360 asm volatile (
 361 "    STMFD   SP!, {R4-R6,LR} \n"
 362 "    BL      sub_FF874B88 \n"
 363 "    LDR     R5, =0x5006 \n"
 364 "    MOVS    R4, R0 \n"
 365 "    MOVNE   R1, #0 \n"
 366 "    MOVNE   R0, R5 \n"
 367 "    BLNE    _PostLogicalEventToUI \n"
 368 "    BL      sub_FF874BB4_my \n"  // --> Patched. Old value = 0xFF874BB4.
 369 "    BL      core_spytask_can_start\n"    // +
 370 "    CMP     R4, #0 \n"
 371 "    MOVEQ   R0, R5 \n"
 372 "    LDMEQFD SP!, {R4-R6,LR} \n"
 373 "    MOVEQ   R1, #0 \n"
 374 "    BEQ     _PostLogicalEventToUI \n"
 375 "    LDMFD   SP!, {R4-R6,PC} \n"
 376 );
 377 }
 378 
 379 /*************************************************************/
 380 //** sub_FF874BB4_my @ 0xFF874BB4 - 0xFF874BF4, length=17
 381 void __attribute__((naked,noinline)) sub_FF874BB4_my() {
 382 asm volatile (
 383 "    STMFD   SP!, {R4,LR} \n"
 384 "    MOV     R0, #3 \n"
 385 "    BL      sub_FF857704_my \n"  // --> Patched. Old value = 0xFF857704.
 386 //"  BL      _sub_FF91572C \n"  // --> Nullsub call removed.
 387 "    LDR     R4, =0x2F04 \n"
 388 "    LDR     R0, [R4, #4] \n"
 389 "    CMP     R0, #0 \n"
 390 "    BNE     loc_FF874BEC \n"
 391 "    BL      sub_FF856AC8 \n"
 392 "    BL      sub_FF909DC4 \n"
 393 "    BL      sub_FF856AC8 \n"
 394 "    BL      sub_FF852B1C \n"
 395 "    BL      sub_FF8569C8 \n"
 396 "    BL      sub_FF909E90 \n"
 397 
 398 "loc_FF874BEC:\n"
 399 "    MOV     R0, #1 \n"
 400 "    STR     R0, [R4] \n"
 401 "    LDMFD   SP!, {R4,PC} \n"
 402 );
 403 }
 404 
 405 /*************************************************************/
 406 //** sub_FF857704_my @ 0xFF857704 - 0xFF8577D0, length=52
 407 void __attribute__((naked,noinline)) sub_FF857704_my() {
 408 asm volatile (
 409 "    STMFD   SP!, {R4-R8,LR} \n"
 410 "    MOV     R6, R0 \n"
 411 "    BL      sub_FF85766C \n"
 412 "    LDR     R1, =0x11840 \n"
 413 "    MOV     R5, R0 \n"
 414 "    ADD     R4, R1, R0, LSL#7 \n"
 415 "    LDR     R0, [R4, #0x70] \n"
 416 "    CMP     R0, #4 \n"
 417 "    LDREQ   R1, =0x6D8 \n"
 418 "    LDREQ   R0, =0xFF857190 /*'Mounter.c'*/ \n"
 419 "    BLEQ    _DebugAssert \n"
 420 "    MOV     R1, R6 \n"
 421 "    MOV     R0, R5 \n"
 422 "    BL      sub_FF8570D8 \n"
 423 "    LDR     R0, [R4, #0x38] \n"
 424 "    BL      sub_FF857C30 \n"
 425 "    CMP     R0, #0 \n"
 426 "    STREQ   R0, [R4, #0x70] \n"
 427 "    MOV     R0, R5 \n"
 428 "    BL      sub_FF8571B0 \n"
 429 "    MOV     R0, R5 \n"
 430 "    BL      sub_FF8574A4_my \n"  // --> Patched. Old value = 0xFF8574A4.
 431 "    MOV     R7, R0 \n"
 432 "    MOV     R0, R5 \n"
 433 "    BL      sub_FF857508 \n"
 434 "    LDR     R1, [R4, #0x3C] \n"
 435 "    AND     R2, R7, R0 \n"
 436 "    CMP     R1, #0 \n"
 437 "    MOV     R0, #0 \n"
 438 "    MOVEQ   R0, #0x80000001 \n"
 439 "    BEQ     loc_FF8577AC \n"
 440 "    LDR     R3, [R4, #0x2C] \n"
 441 "    CMP     R3, #2 \n"
 442 "    MOVEQ   R0, #4 \n"
 443 "    CMP     R1, #5 \n"
 444 "    ORRNE   R0, R0, #1 \n"
 445 "    BICEQ   R0, R0, #1 \n"
 446 "    CMP     R2, #0 \n"
 447 "    BICEQ   R0, R0, #2 \n"
 448 "    ORREQ   R0, R0, #0x80000000 \n"
 449 "    BICNE   R0, R0, #0x80000000 \n"
 450 "    ORRNE   R0, R0, #2 \n"
 451 
 452 "loc_FF8577AC:\n"
 453 "    CMP     R6, #7 \n"
 454 "    STR     R0, [R4, #0x40] \n"
 455 "    LDMNEFD SP!, {R4-R8,PC} \n"
 456 "    MOV     R0, R6 \n"
 457 "    BL      sub_FF8576BC \n"
 458 "    CMP     R0, #0 \n"
 459 "    LDMEQFD SP!, {R4-R8,LR} \n"
 460 "    LDREQ   R0, =0xFF8579A8 /*'EMEM MOUNT ERROR!!!\n'*/ \n"
 461 "    BEQ     sub_FF8115A8 \n"
 462 "    LDMFD   SP!, {R4-R8,PC} \n"
 463 );
 464 }
 465 
 466 /*************************************************************/
 467 //** sub_FF8574A4_my @ 0xFF8574A4 - 0xFF857504, length=25
 468 void __attribute__((naked,noinline)) sub_FF8574A4_my() {
 469 asm volatile (
 470 "    STMFD   SP!, {R4-R6,LR} \n"
 471 "    MOV     R5, R0 \n"
 472 "    LDR     R0, =0x11840 \n"
 473 "    ADD     R4, R0, R5, LSL#7 \n"
 474 "    LDR     R0, [R4, #0x70] \n"
 475 "    TST     R0, #2 \n"
 476 "    MOVNE   R0, #1 \n"
 477 "    LDMNEFD SP!, {R4-R6,PC} \n"
 478 "    LDR     R0, [R4, #0x38] \n"
 479 "    MOV     R1, R5 \n"
 480 "    BL      sub_FF857234_my \n"  // --> Patched. Old value = 0xFF857234.
 481 "    CMP     R0, #0 \n"
 482 "    LDMEQFD SP!, {R4-R6,PC} \n"
 483 "    LDR     R0, [R4, #0x38] \n"
 484 "    MOV     R1, R5 \n"
 485 "    BL      sub_FF8573A0 \n"
 486 "    CMP     R0, #0 \n"
 487 "    LDMEQFD SP!, {R4-R6,PC} \n"
 488 "    MOV     R0, R5 \n"
 489 "    BL      sub_FF856CC0 \n"
 490 "    CMP     R0, #0 \n"
 491 "    LDRNE   R1, [R4, #0x70] \n"
 492 "    ORRNE   R1, R1, #2 \n"
 493 "    STRNE   R1, [R4, #0x70] \n"
 494 "    LDMFD   SP!, {R4-R6,PC} \n"
 495 );
 496 }
 497 
 498 /*************************************************************/
 499 //** sub_FF857234_my @ 0xFF857234 - 0xFF85739C, length=91
 500 void __attribute__((naked,noinline)) sub_FF857234_my() {
 501 asm volatile (
 502 "    STMFD   SP!, {R4-R8,LR} \n"
 503 "    MOV     R8, R0 \n"
 504 "    LDR     R0, =0x11840 \n"
 505 "    MOV     R7, #0 \n"
 506 "    ADD     R5, R0, R1, LSL#7 \n"
 507 "    LDR     R0, [R5, #0x3C] \n"
 508 "    MOV     R6, #0 \n"
 509 "    CMP     R0, #7 \n"
 510 "    ADDLS   PC, PC, R0, LSL#2 \n"
 511 "    B       loc_FF857384 \n"
 512 "    B       loc_FF857294 \n"
 513 "    B       loc_FF85727C \n"
 514 "    B       loc_FF85727C \n"
 515 "    B       loc_FF85727C \n"
 516 "    B       loc_FF85727C \n"
 517 "    B       loc_FF85737C \n"
 518 "    B       loc_FF85727C \n"
 519 "    B       loc_FF85727C \n"
 520 
 521 "loc_FF85727C:\n"
 522 "    MOV     R2, #0 \n"
 523 "    MOV     R1, #0x200 \n"
 524 "    MOV     R0, #2 \n"
 525 "    BL      sub_FF86EC80 \n"
 526 "    MOVS    R4, R0 \n"
 527 "    BNE     loc_FF85729C \n"
 528 
 529 "loc_FF857294:\n"
 530 "    MOV     R0, #0 \n"
 531 "    LDMFD   SP!, {R4-R8,PC} \n"
 532 
 533 "loc_FF85729C:\n"
 534 "    LDR     R12, [R5, #0x4C] \n"
 535 "    MOV     R3, R4 \n"
 536 "    MOV     R2, #1 \n"
 537 "    MOV     R1, #0 \n"
 538 "    MOV     R0, R8 \n"
 539 "    BLX     R12 \n"
 540 "    CMP     R0, #1 \n"
 541 "    BNE     loc_FF8572C8 \n"
 542 "    MOV     R0, #2 \n"
 543 "    BL      sub_FF86EDCC \n"
 544 "    B       loc_FF857294 \n"
 545 
 546 "loc_FF8572C8:\n"
 547 "    LDR     R1, [R5, #0x68] \n"
 548 "    MOV     R0, R8 \n"
 549 "    BLX     R1 \n"
 550 
 551 "    MOV     R1, R4\n"              //  pointer to MBR in R1
 552 "    BL      mbr_read_dryos\n"      //  total sectors count in R0 before and after call
 553 
 554 // Start of DataGhost's FAT32 autodetection code
 555 // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
 556 // According to the code below, we can use R1, R2, R3 and R12.
 557 // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
 558 // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
 559 "    MOV     R12, R4\n"             // Copy the MBR start address so we have something to work with
 560 "    MOV     LR, R4\n"              // Save old offset for MBR signature
 561 "    MOV     R1, #1\n"              // Note the current partition number
 562 "    B       dg_sd_fat32_enter\n"   // We actually need to check the first partition as well, no increments yet!
 563 "dg_sd_fat32:\n"
 564 "    CMP     R1, #4\n"              // Did we already see the 4th partition?
 565 "    BEQ     dg_sd_fat32_end\n"     // Yes, break. We didn't find anything, so don't change anything.
 566 "    ADD     R12, R12, #0x10\n"     // Second partition
 567 "    ADD     R1, R1, #1\n"          // Second partition for the loop
 568 "dg_sd_fat32_enter:\n"
 569 "    LDRB    R2, [R12, #0x1BE]\n"   // Partition status
 570 "    LDRB    R3, [R12, #0x1C2]\n"   // Partition type (FAT32 = 0xB)
 571 "    CMP     R3, #0xB\n"            // Is this a FAT32 partition?
 572 "    CMPNE   R3, #0xC\n"            // Not 0xB, is it 0xC (FAT32 LBA) then?
 573 "    CMPNE   R3, #0x7\n"            // exFat?
 574 "    BNE     dg_sd_fat32\n"         // No, it isn't. Loop again.
 575 "    CMP     R2, #0x00\n"           // It is, check the validity of the partition type
 576 "    CMPNE   R2, #0x80\n"
 577 "    BNE     dg_sd_fat32\n"         // Invalid, go to next partition
 578                                     // This partition is valid, it's the first one, bingo!
 579 "    MOV     R4, R12\n"             // Move the new MBR offset for the partition detection.
 580 
 581 "dg_sd_fat32_end:\n"
 582 // End of DataGhost's FAT32 autodetection code
 583 
 584 "    LDRB    R1, [R4, #0x1C9] \n"
 585 "    LDRB    R3, [R4, #0x1C8] \n"
 586 "    LDRB    R12, [R4, #0x1CC] \n"
 587 "    MOV     R1, R1, LSL#24 \n"
 588 "    ORR     R1, R1, R3, LSL#16 \n"
 589 "    LDRB    R3, [R4, #0x1C7] \n"
 590 "    LDRB    R2, [R4, #0x1BE] \n"
 591 //"  LDRB    LR, [R4, #0x1FF] \n"  // replaced below
 592 "    ORR     R1, R1, R3, LSL#8 \n"
 593 "    LDRB    R3, [R4, #0x1C6] \n"
 594 "    CMP     R2, #0 \n"
 595 "    CMPNE   R2, #0x80 \n"
 596 "    ORR     R1, R1, R3 \n"
 597 "    LDRB    R3, [R4, #0x1CD] \n"
 598 "    MOV     R3, R3, LSL#24 \n"
 599 "    ORR     R3, R3, R12, LSL#16 \n"
 600 "    LDRB    R12, [R4, #0x1CB] \n"
 601 "    ORR     R3, R3, R12, LSL#8 \n"
 602 "    LDRB    R12, [R4, #0x1CA] \n"
 603 "    ORR     R3, R3, R12 \n"
 604 //"  LDRB    R12, [R4, #0x1FE] \n"  // replaced below
 605 "    LDRB    R12, [LR,#0x1FE]\n"    // replace instructions above - First MBR signature byte (0x55), LR is original offset.
 606 "    LDRB    LR, [LR,#0x1FF]\n"     // replace instructions above - Last MBR signature byte (0xAA), LR is original offset.
 607 "    MOV     R4, #0 \n"
 608 "    BNE     loc_FF857354 \n"
 609 "    CMP     R0, R1 \n"
 610 "    BCC     loc_FF857354 \n"
 611 "    ADD     R2, R1, R3 \n"
 612 "    CMP     R2, R0 \n"
 613 "    CMPLS   R12, #0x55 \n"
 614 "    CMPEQ   LR, #0xAA \n"
 615 "    MOVEQ   R7, R1 \n"
 616 "    MOVEQ   R6, R3 \n"
 617 "    MOVEQ   R4, #1 \n"
 618 
 619 "loc_FF857354:\n"
 620 "    MOV     R0, #2 \n"
 621 "    BL      sub_FF86EDCC \n"
 622 "    CMP     R4, #0 \n"
 623 "    BNE     loc_FF857390 \n"
 624 "    LDR     R1, [R5, #0x68] \n"
 625 "    MOV     R7, #0 \n"
 626 "    MOV     R0, R8 \n"
 627 "    BLX     R1 \n"
 628 "    MOV     R6, R0 \n"
 629 "    B       loc_FF857390 \n"
 630 
 631 "loc_FF85737C:\n"
 632 "    MOV     R6, #0x40 \n"
 633 "    B       loc_FF857390 \n"
 634 
 635 "loc_FF857384:\n"
 636 "    LDR     R1, =0x5C9 \n"
 637 "    LDR     R0, =0xFF857190 /*'Mounter.c'*/ \n"
 638 "    BL      _DebugAssert \n"
 639 
 640 "loc_FF857390:\n"
 641 "    STR     R7, [R5, #0x44]! \n"
 642 "    MOV     R0, #1 \n"
 643 "    STR     R6, [R5, #4] \n"
 644 "    LDMFD   SP!, {R4-R8,PC} \n"
 645 );
 646 }
 647 
 648 /*************************************************************/
 649 //** JogDial_task_my @ 0xFF84856C - 0xFF848664, length=63
 650 void __attribute__((naked,noinline)) JogDial_task_my() {
 651 asm volatile (
 652 "    STMFD   SP!, {R3-R11,LR} \n"
 653 "    BL      sub_FF84871C \n"
 654 "    LDR     R11, =0x80000B01 \n"
 655 "    LDR     R8, =0xFFAFE608 \n"
 656 "    LDR     R7, =0xC0240000 \n"
 657 "    LDR     R6, =0x24E4 \n"
 658 "    MOV     R9, #1 \n"
 659 "    MOV     R10, #0 \n"
 660 
 661 "loc_FF84858C:\n"
 662 "    LDR     R3, =0x1BB \n"
 663 "    LDR     R0, [R6, #0xC] \n"
 664 "    LDR     R2, =0xFF8487C4 /*'JogDial.c'*/ \n"
 665 "    MOV     R1, #0 \n"
 666 "    BL      sub_FF827638 /*_TakeSemaphoreStrictly*/ \n"
 667 "    MOV     R0, #0x28 \n"
 668 "    BL      _SleepTask \n"
 669 //------------------  added code ---------------------
 670 "labelA:\n"
 671 "    LDR     R0, =jogdial_stopped\n"
 672 "    LDR     R0, [R0]\n"
 673 "    CMP     R0, #1\n"
 674 "    BNE     labelB\n"
 675 "    MOV     R0, #40\n"
 676 "    BL      _SleepTask\n"
 677 "    B       labelA\n"
 678 "labelB:\n"
 679 //------------------  original code ------------------
 680 "    LDR     R0, [R7, #0x104] \n"
 681 "    MOV     R0, R0, ASR#16 \n"
 682 "    STRH    R0, [R6] \n"
 683 "    LDRSH   R2, [R6, #2] \n"
 684 "    SUB     R1, R0, R2 \n"
 685 "    CMP     R1, #0 \n"
 686 "    BEQ     loc_FF848650 \n"
 687 "    MOV     R5, R1 \n"
 688 "    RSBLT   R5, R5, #0 \n"
 689 "    MOVLE   R4, #0 \n"
 690 "    MOVGT   R4, #1 \n"
 691 "    CMP     R5, #0xFF \n"
 692 "    BLS     loc_FF848604 \n"
 693 "    CMP     R1, #0 \n"
 694 "    RSBLE   R1, R2, #0xFF \n"
 695 "    ADDLE   R1, R1, #0x7F00 \n"
 696 "    ADDLE   R0, R1, R0 \n"
 697 "    RSBGT   R0, R0, #0xFF \n"
 698 "    ADDGT   R0, R0, #0x7F00 \n"
 699 "    ADDGT   R0, R0, R2 \n"
 700 "    ADD     R5, R0, #0x8000 \n"
 701 "    ADD     R5, R5, #1 \n"
 702 "    EOR     R4, R4, #1 \n"
 703 
 704 "loc_FF848604:\n"
 705 "    LDR     R0, [R6, #0x14] \n"
 706 "    CMP     R0, #0 \n"
 707 "    BEQ     loc_FF848648 \n"
 708 "    LDR     R0, [R6, #0x1C] \n"
 709 "    CMP     R0, #0 \n"
 710 "    BEQ     loc_FF848630 \n"
 711 "    LDR     R1, [R8, R4, LSL#2] \n"
 712 "    CMP     R1, R0 \n"
 713 "    BEQ     loc_FF848638 \n"
 714 "    LDR     R0, =0xB01 \n"
 715 "    BL      sub_FF87B9B8 \n"
 716 
 717 "loc_FF848630:\n"
 718 "    MOV     R0, R11 \n"
 719 "    BL      sub_FF87B9B8 \n"
 720 
 721 "loc_FF848638:\n"
 722 "    LDR     R0, [R8, R4, LSL#2] \n"
 723 "    MOV     R1, R5 \n"
 724 "    STR     R0, [R6, #0x1C] \n"
 725 "    BL      sub_FF87B8E8 \n"
 726 
 727 "loc_FF848648:\n"
 728 "    LDRH    R0, [R6] \n"
 729 "    STRH    R0, [R6, #2] \n"
 730 
 731 "loc_FF848650:\n"
 732 "    STR     R10, [R7, #0x100] \n"
 733 "    STR     R9, [R7, #0x108] \n"
 734 "    LDR     R0, [R6, #0x10] \n"
 735 "    CMP     R0, #0 \n"
 736 "    BLNE    _SleepTask \n"
 737 "    B       loc_FF84858C \n"
 738 );
 739 }

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